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MingcongBaiKexyBiscuit
MingcongBai
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KexyBiscuit
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FROMLIST: drm/xe/guc: use GUC_SIZE (SZ_4K) for alignment
Per the "Firmware" chapter in "drm/xe Intel GFX Driver", as well as "Volume 8: Command Stream Programming" in "Intel® Arc™ A-Series Graphics and Intel Data Center GPU Flex Series Open-Source Programmer's Reference Manual For the discrete GPUs code named "Alchemist" and "Arctic Sound-M"" and "Intel® Iris® Xe MAX Graphics Open Source Programmer's Reference Manual For the 2020 Discrete GPU formerly named "DG1"": "The RINGBUF register sets (defined in Memory Interface Registers) are used to specify the ring buffer memory areas. The ring buffer must start on a 4KB boundary and be allocated in linear memory. The length of any one ring buffer is limited to 2MB." The Graphics micro (μ) Controller (GuC) really expects command buffers aligned to 4KiB boundaries. Current implementation uses `PAGE_SIZE' as an assumed alignment reference but 4KiB kernel page sizes is by no means a guarantee. On 16KiB-paged kernels, this causes driver failures after loading the GuC firmware: [ 7.398317] xe 0000:09:00.0: [drm] Found dg2/g10 (device ID 56a1) display version 13.00 stepping C0 [ 7.410429] xe 0000:09:00.0: [drm] Using GuC firmware from i915/dg2_guc_70.bin version 70.36.0 [ 10.719989] xe 0000:09:00.0: [drm] *ERROR* GT0: load failed: status = 0x800001EC, time = 3297ms, freq = 2400MHz (req 2400MHz), done = 0 [ 10.732106] xe 0000:09:00.0: [drm] *ERROR* GT0: load failed: status: Reset = 0, BootROM = 0x76, UKernel = 0x01, MIA = 0x00, Auth = 0x02 [ 10.744214] xe 0000:09:00.0: [drm] *ERROR* CRITICAL: Xe has declared device 0000:09:00.0 as wedged. Please file a _new_ bug report at https://gitlab.freedesktop.org/drm/xe/kernel/issues/new [ 10.828908] xe 0000:09:00.0: [drm] *ERROR* GT0: GuC mmio request 0x4100: no reply 0x4100 Correct this by defining `GUC_ALIGN' as `SZ_4K' in accordance with the references above, and revising all instances of `PAGE_SIZE' as `GUC_ALIGN'. Then, revise `PAGE_ALIGN()' calls as `ALIGN()' with `GUC_ALIGN' as their second argument (overriding `PAGE_SIZE'). Cc: stable@vger.kernel.org Fixes: 84d15f4 ("drm/xe/guc: Add capture size check in GuC log buffer") Fixes: 9c8c7a7 ("drm/xe/guc: Prepare GuC register list and update ADS size for error capture") Fixes: dd08ebf ("drm/xe: Introduce a new DRM driver for Intel GPUs") Tested-by: Mingcong Bai <jeffbai@aosc.io> Tested-by: Wenbin Fang <fangwenbin@vip.qq.com> Tested-by: Haien Liang <27873200@qq.com> Tested-by: Jianfeng Liu <liujianfeng1994@gmail.com> Tested-by: Shirong Liu <lsr1024@qq.com> Tested-by: Haofeng Wu <s2600cw2@126.com> Link: FanFansfan@22c55ab Link: https://t.me/c/1109254909/768552 Co-developed-by: Shang Yatsen <429839446@qq.com> Signed-off-by: Shang Yatsen <429839446@qq.com> Signed-off-by: Mingcong Bai <jeffbai@aosc.io> Link: https://lore.kernel.org/all/20250613-upstream-xe-non-4k-v2-v2-2-934f82249f8a@aosc.io/ Signed-off-by: Kexy Biscuit <kexybiscuit@aosc.io>
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‎drivers/gpu/drm/xe/xe_guc.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -90,7 +90,7 @@ static u32 guc_ctl_feature_flags(struct xe_guc *guc)
9090

9191
static u32 guc_ctl_log_params_flags(struct xe_guc *guc)
9292
{
93-
u32 offset = guc_bo_ggtt_addr(guc, guc->log.bo) >> PAGE_SHIFT;
93+
u32 offset = guc_bo_ggtt_addr(guc, guc->log.bo) >> XE_PTE_SHIFT;
9494
u32 flags;
9595

9696
#if (((CRASH_BUFFER_SIZE) % SZ_1M) == 0)
@@ -143,7 +143,7 @@ static u32 guc_ctl_log_params_flags(struct xe_guc *guc)
143143

144144
static u32 guc_ctl_ads_flags(struct xe_guc *guc)
145145
{
146-
u32 ads = guc_bo_ggtt_addr(guc, guc->ads.bo) >> PAGE_SHIFT;
146+
u32 ads = guc_bo_ggtt_addr(guc, guc->ads.bo) >> XE_PTE_SHIFT;
147147
u32 flags = ads << GUC_ADS_ADDR_SHIFT;
148148

149149
return flags;

‎drivers/gpu/drm/xe/xe_guc.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,9 @@
2323
#define GUC_FIRMWARE_VER(guc) \
2424
MAKE_GUC_VER_STRUCT((guc)->fw.versions.found[XE_UC_FW_VER_RELEASE])
2525

26+
/* GuC really expects command buffers aligned to 4K boundaries. */
27+
#define GUC_ALIGN SZ_4K
28+
2629
struct drm_printer;
2730

2831
void xe_guc_comm_init_early(struct xe_guc *guc);

‎drivers/gpu/drm/xe/xe_guc_ads.c

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -143,17 +143,17 @@ static size_t guc_ads_regset_size(struct xe_guc_ads *ads)
143143

144144
static size_t guc_ads_golden_lrc_size(struct xe_guc_ads *ads)
145145
{
146-
return PAGE_ALIGN(ads->golden_lrc_size);
146+
return ALIGN(ads->golden_lrc_size, GUC_ALIGN);
147147
}
148148

149149
static u32 guc_ads_waklv_size(struct xe_guc_ads *ads)
150150
{
151-
return PAGE_ALIGN(ads->ads_waklv_size);
151+
return ALIGN(ads->ads_waklv_size, GUC_ALIGN);
152152
}
153153

154154
static size_t guc_ads_capture_size(struct xe_guc_ads *ads)
155155
{
156-
return PAGE_ALIGN(ads->capture_size);
156+
return ALIGN(ads->capture_size, GUC_ALIGN);
157157
}
158158

159159
static size_t guc_ads_um_queues_size(struct xe_guc_ads *ads)
@@ -168,7 +168,7 @@ static size_t guc_ads_um_queues_size(struct xe_guc_ads *ads)
168168

169169
static size_t guc_ads_private_data_size(struct xe_guc_ads *ads)
170170
{
171-
return PAGE_ALIGN(ads_to_guc(ads)->fw.private_data_size);
171+
return ALIGN(ads_to_guc(ads)->fw.private_data_size, GUC_ALIGN);
172172
}
173173

174174
static size_t guc_ads_regset_offset(struct xe_guc_ads *ads)
@@ -183,7 +183,7 @@ static size_t guc_ads_golden_lrc_offset(struct xe_guc_ads *ads)
183183
offset = guc_ads_regset_offset(ads) +
184184
guc_ads_regset_size(ads);
185185

186-
return PAGE_ALIGN(offset);
186+
return ALIGN(offset, GUC_ALIGN);
187187
}
188188

189189
static size_t guc_ads_waklv_offset(struct xe_guc_ads *ads)
@@ -193,7 +193,7 @@ static size_t guc_ads_waklv_offset(struct xe_guc_ads *ads)
193193
offset = guc_ads_golden_lrc_offset(ads) +
194194
guc_ads_golden_lrc_size(ads);
195195

196-
return PAGE_ALIGN(offset);
196+
return ALIGN(offset, GUC_ALIGN);
197197
}
198198

199199
static size_t guc_ads_capture_offset(struct xe_guc_ads *ads)
@@ -203,7 +203,7 @@ static size_t guc_ads_capture_offset(struct xe_guc_ads *ads)
203203
offset = guc_ads_waklv_offset(ads) +
204204
guc_ads_waklv_size(ads);
205205

206-
return PAGE_ALIGN(offset);
206+
return ALIGN(offset, GUC_ALIGN);
207207
}
208208

209209
static size_t guc_ads_um_queues_offset(struct xe_guc_ads *ads)
@@ -213,7 +213,7 @@ static size_t guc_ads_um_queues_offset(struct xe_guc_ads *ads)
213213
offset = guc_ads_capture_offset(ads) +
214214
guc_ads_capture_size(ads);
215215

216-
return PAGE_ALIGN(offset);
216+
return ALIGN(offset, GUC_ALIGN);
217217
}
218218

219219
static size_t guc_ads_private_data_offset(struct xe_guc_ads *ads)
@@ -223,7 +223,7 @@ static size_t guc_ads_private_data_offset(struct xe_guc_ads *ads)
223223
offset = guc_ads_um_queues_offset(ads) +
224224
guc_ads_um_queues_size(ads);
225225

226-
return PAGE_ALIGN(offset);
226+
return ALIGN(offset, GUC_ALIGN);
227227
}
228228

229229
static size_t guc_ads_size(struct xe_guc_ads *ads)
@@ -276,7 +276,7 @@ static size_t calculate_golden_lrc_size(struct xe_guc_ads *ads)
276276
continue;
277277

278278
real_size = xe_gt_lrc_size(gt, class);
279-
alloc_size = PAGE_ALIGN(real_size);
279+
alloc_size = ALIGN(real_size, GUC_ALIGN);
280280
total_size += alloc_size;
281281
}
282282

@@ -646,12 +646,12 @@ static int guc_capture_prep_lists(struct xe_guc_ads *ads)
646646
offsetof(struct __guc_ads_blob, system_info));
647647

648648
/* first, set aside the first page for a capture_list with zero descriptors */
649-
total_size = PAGE_SIZE;
649+
total_size = GUC_ALIGN;
650650
if (!xe_guc_capture_getnullheader(guc, &ptr, &size))
651651
xe_map_memcpy_to(ads_to_xe(ads), ads_to_map(ads), capture_offset, ptr, size);
652652

653653
null_ggtt = ads_ggtt + capture_offset;
654-
capture_offset += PAGE_SIZE;
654+
capture_offset += GUC_ALIGN;
655655

656656
/*
657657
* Populate capture list : at this point adps is already allocated and
@@ -715,10 +715,10 @@ static int guc_capture_prep_lists(struct xe_guc_ads *ads)
715715
}
716716
}
717717

718-
if (ads->capture_size != PAGE_ALIGN(total_size))
718+
if (ads->capture_size != ALIGN(total_size, GUC_ALIGN))
719719
xe_gt_dbg(gt, "Updated ADS capture size %d (was %d)\n",
720-
PAGE_ALIGN(total_size), ads->capture_size);
721-
return PAGE_ALIGN(total_size);
720+
ALIGN(total_size, GUC_ALIGN), ads->capture_size);
721+
return ALIGN(total_size, GUC_ALIGN);
722722
}
723723

724724
static void guc_mmio_regset_write_one(struct xe_guc_ads *ads,
@@ -966,7 +966,7 @@ static void guc_golden_lrc_populate(struct xe_guc_ads *ads)
966966
xe_gt_assert(gt, gt->default_lrc[class]);
967967

968968
real_size = xe_gt_lrc_size(gt, class);
969-
alloc_size = PAGE_ALIGN(real_size);
969+
alloc_size = ALIGN(real_size, GUC_ALIGN);
970970
total_size += alloc_size;
971971

972972
xe_map_memcpy_to(xe, ads_to_map(ads), offset,

‎drivers/gpu/drm/xe/xe_guc_capture.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -591,8 +591,8 @@ guc_capture_getlistsize(struct xe_guc *guc, u32 owner, u32 type,
591591
return -ENODATA;
592592

593593
if (size)
594-
*size = PAGE_ALIGN((sizeof(struct guc_debug_capture_list)) +
595-
(num_regs * sizeof(struct guc_mmio_reg)));
594+
*size = ALIGN((sizeof(struct guc_debug_capture_list)) +
595+
(num_regs * sizeof(struct guc_mmio_reg)), GUC_ALIGN);
596596

597597
return 0;
598598
}
@@ -739,7 +739,7 @@ size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc)
739739
* sequence, that is, during the pre-hwconfig phase before we have
740740
* the exact engine fusing info.
741741
*/
742-
total_size = PAGE_SIZE; /* Pad a page in front for empty lists */
742+
total_size = GUC_ALIGN; /* Pad a page in front for empty lists */
743743
for (i = 0; i < GUC_CAPTURE_LIST_INDEX_MAX; i++) {
744744
for (j = 0; j < GUC_CAPTURE_LIST_CLASS_MAX; j++) {
745745
if (xe_guc_capture_getlistsize(guc, i,
@@ -759,7 +759,7 @@ size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc)
759759
total_size += global_size;
760760
}
761761

762-
return PAGE_ALIGN(total_size);
762+
return ALIGN(total_size, GUC_ALIGN);
763763
}
764764

765765
static int guc_capture_output_size_est(struct xe_guc *guc)

‎drivers/gpu/drm/xe/xe_guc_ct.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -214,7 +214,7 @@ int xe_guc_ct_init(struct xe_guc_ct *ct)
214214
struct xe_bo *bo;
215215
int err;
216216

217-
xe_gt_assert(gt, !(guc_ct_size() % PAGE_SIZE));
217+
xe_gt_assert(gt, !(guc_ct_size() % GUC_ALIGN));
218218

219219
ct->g2h_wq = alloc_ordered_workqueue("xe-g2h-wq", WQ_MEM_RECLAIM);
220220
if (!ct->g2h_wq)

‎drivers/gpu/drm/xe/xe_guc_log.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@
1515
#include "xe_force_wake.h"
1616
#include "xe_gt.h"
1717
#include "xe_gt_printk.h"
18+
#include "xe_guc.h"
1819
#include "xe_map.h"
1920
#include "xe_mmio.h"
2021
#include "xe_module.h"
@@ -58,7 +59,7 @@ static size_t guc_log_size(void)
5859
* | Capture logs |
5960
* +===============================+ + CAPTURE_SIZE
6061
*/
61-
return PAGE_SIZE + CRASH_BUFFER_SIZE + DEBUG_BUFFER_SIZE +
62+
return GUC_ALIGN + CRASH_BUFFER_SIZE + DEBUG_BUFFER_SIZE +
6263
CAPTURE_BUFFER_SIZE;
6364
}
6465

@@ -328,7 +329,7 @@ u32 xe_guc_get_log_buffer_size(struct xe_guc_log *log, enum guc_log_buffer_type
328329
u32 xe_guc_get_log_buffer_offset(struct xe_guc_log *log, enum guc_log_buffer_type type)
329330
{
330331
enum guc_log_buffer_type i;
331-
u32 offset = PAGE_SIZE;/* for the log_buffer_states */
332+
u32 offset = GUC_ALIGN; /* for the log_buffer_states */
332333

333334
for (i = GUC_LOG_BUFFER_CRASH_DUMP; i < GUC_LOG_BUFFER_TYPE_MAX; ++i) {
334335
if (i == type)

‎drivers/gpu/drm/xe/xe_guc_pc.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1190,7 +1190,7 @@ int xe_guc_pc_start(struct xe_guc_pc *pc)
11901190
{
11911191
struct xe_device *xe = pc_to_xe(pc);
11921192
struct xe_gt *gt = pc_to_gt(pc);
1193-
u32 size = PAGE_ALIGN(sizeof(struct slpc_shared_data));
1193+
u32 size = ALIGN(sizeof(struct slpc_shared_data), GUC_ALIGN);
11941194
unsigned int fw_ref;
11951195
ktime_t earlier;
11961196
int ret;
@@ -1318,7 +1318,7 @@ int xe_guc_pc_init(struct xe_guc_pc *pc)
13181318
struct xe_tile *tile = gt_to_tile(gt);
13191319
struct xe_device *xe = gt_to_xe(gt);
13201320
struct xe_bo *bo;
1321-
u32 size = PAGE_ALIGN(sizeof(struct slpc_shared_data));
1321+
u32 size = ALIGN(sizeof(struct slpc_shared_data), GUC_ALIGN);
13221322
int err;
13231323

13241324
if (xe->info.skip_guc_pc)

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