Some suggestions for changes to the silkscreen for shield v1.5

[t0mpr1c3]

• Change custom header outline to Molex 5267 where appropriate to make orientation clearer.
• Change outline of 2mm headers to match the clearer design used on the interface.
• Add AYAB logo, OSHW logo, license, and certification mark.
• Add back I2C pull resistors R1 and R2 to the schematic.
• Change the pin sockets to pin headers on the bottom of the shield.

[VIPQualityPost]

We can't add the OSHW mark yet, because there is not an OSHW cert associated with this board. I will fill an application this week for that so we can get the ball rolling.
Add back I2C resistors: Good catch, I'm not sure why DRC did not complain about this - thank you.
Pin socket to pin header : be careful with this, the pinouts are flipped, you should just change the 3D model and not the actual symbol on the schematic.
I think there is further discussion on discord that we should revisit this weekend or something to make sure we've covered all the bases.

[t0mpr1c3]

By the way, the I2C standard specifies 5K pullups rather than 10K, not that it is going to make much difference.

I'll fix the header/socket thing.

[VIPQualityPost]

Is that so? I usually see 5k but I think this has more to do with bus speed than an actual spec. If that is the case I don't see a reason to not change it to 5k...

[t0mpr1c3]

I can't remember the calculations exactly but 4.7K is recommended for 100kHz, given the typical capacitance of the pin. If there is a lot of inductance on the line you might need to go lower.

[jonathanperret]

I looked into why a workflow was failing on this PR (https://github.com/AllYarnsAreBeautiful/ayab-hardware/actions/runs/14829758750/job/41628560875?pr=54) and it turns out this is caused by missing footprints and manufacturer info on the added resistors:

…
JP9,1X5 2.5mm,Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical,1,Molex,22-28-4056
R1,10K,,1,,
R2,10K,,1,,
R3,150,Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P2.54mm_Vertical,1,Vishay,RL07S151GRE6
…

Also, I get an error message when opening the footprint browser (press A) in the PCB Editor:

Note that the first error also occurs on main. Also note that the error only appears once, you have to delete the fp-info-cache for it to show up again.

Another sign that things are not all in order is that when I click "Update PCB from Schematic" in the PCB Editor, it wants to do a number of changes:

Again, some of those also happen on main:

I'm not that experienced with KiCad but as far as I understand, "Update PCB from Schematic" should not report anything?

I would try to fix those on main but with KiCad files being almost impossible to merge I don't think that would be helpful with this PR in progress.

[t0mpr1c3]

Thanks for the investigation, I'll ad the missing part manufacturer and part number information.

It seems that Kicad doesn't like device names that don't end in a numeral. I propose changing the JPnA and JPnB device names to JPAn and JPBn respectively.

[jonathanperret]

It seems that Kicad doesn't like device names that don't end in a numeral. I propose changing the JPnA and JPnB device names to JPAn and JPBn respectively.

Oh right, that's an often mentioned limitation of KiCad reference designators, they absolutely need to end in a number.

[jonathanperret]

Another thing, I noticed this PR has some copper changes, not just on the silkscreen, are those intentional or accidental?

[t0mpr1c3]

Oh I see, the ground plane is slightly different in the bottom right. That is accidental. Some of the features of the footprint for JP4B other than the silkscreen must have changed a bit.

I don't think it matters all that much but I would suggest sprinkling vias here and there to help connect the planes up.

[t0mpr1c3]

Hopefully that has fixed most of these issues now.

By the way I changed the I2C pullup resistors from 10K to 4K7 while I was putting in their part numbers.

[VIPQualityPost]

Thanks Tom! I'll review it a bit more thoroughly tomorrow too.
By the way, you don't need to delete the Reference folder, it's added/modified by the workflow.

[jonathanperret]

Thanks for the updates @t0mpr1c3. I see the bottom-left copper pour is back now (below JPB4) but it is broken off from the rest so it looks like it's just an island now, which might or might not be an issue? Anyway I'll let @VIPQualityPost judge that.

I'm wondering what the new text Margin on the right is for though?

[jonathanperret]

Also I'm still getting the path errors I mentioned here when opening the footprint browser.

And I discovered another issue: some 3D models don't seem to be referenced correctly, as they don't show up in the 3D renders for me. Specifically the SPOX connectors:

The render made in CI has many more missing 3D models, but that's probably a separate issue:

(edit: it is indeed a different issue, the standard KiCad library of 3D models is not installed. I created a PR to fix this: #59)

[t0mpr1c3]

@jonathanperret is the 3D OK now? It's hard for me to tell because the problem relates to the unavailability of files local to my machine.

@VIPQualityPost

Thanks Tom! I'll review it a bit more thoroughly tomorrow too. By the way, you don't need to delete the Reference folder, it's added/modified by the workflow.

The CI tests fail unless I delete it before committing.

[t0mpr1c3]

I tied the MYLAR1/2 inputs to ground so they won't float. Not really a bug, just tidying up.

[jonathanperret]

@jonathanperret is the 3D OK now? It's hard for me to tell because the problem relates to the unavailability of files local to my machine.

Sure, I can see how that makes it difficult.

One option is to look at the CI log — the STEP export job helpfully lists all files it couldn't find, see e.g. https://github.com/AllYarnsAreBeautiful/ayab-hardware/actions/runs/14953516288/job/42006060344#step:4:65 . Note that most of the missing files are caused by the standard KiCad packages not being installed (and that's fixed by #59, if you rebase this branch it will be better).

Another option is to look at the KiCad files as text and search for suspicious paths. Here's how I'd do it with grep for example:

$ fgrep -r '(model' ayab-*|egrep -v 'KICAD|KIPRJMOD' 
ayab-shield/arduino_shield.kicad_pcb:           (model "C:/Users/Tom/Downloads/exports(4)/022035105.stp"
ayab-shield/arduino_shield.kicad_pcb:           (model "C:/Users/Tom/Downloads/exports(3)/022035085.stp"
ayab-shield/arduino_shield.kicad_pcb:           (model "C:/Users/Tom/Downloads/exports(2)/022035055.stp"

Thanks Tom! I'll review it a bit more thoroughly tomorrow too. By the way, you don't need to delete the Reference folder, it's added/modified by the workflow.

The CI tests fail unless I delete it before committing.

I think this is fixed by #61, once it is merged you can rebase this branch onto main and it should go better.

[t0mpr1c3]

OK, I think this is successfully rebased now.

[VIPQualityPost]

Let's roll this in, I can do the silkscreen changes we talked about in the meeting today later.

[jonathanperret]

I just squashed the commits on this branch, which had a complicated history (@t0mpr1c3 I suspect your rebase was actually a merge, or something went wrong because most commits were duplicated).
The contents are unchanged but all in a single commit, rebased on main.