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docs/guides/redundancy.md

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# Introduction to Intel Top Swap A/B Redundancy for coreboot
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The problem addressed by this functionality is that when a
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platform's firmware crashes during the boot process, the only mode
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of recovery is usually taking apart the platform, attaching an
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SPI clip and flashing recovery firmware as per our recovery guides
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([example](https://docs.dasharo.com/unified/protectli/recovery/)).
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With the Top Swap A/B redundancy, there are two firmware slots - **A** and
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**B**, of which **A** is a read-only golden copy, and **B** is the update
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partition. A firmware update is going to target the **B** slot, and boot from
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it. Should the new firmware fail, the platform can be brought back to life by
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performing a **CMOS reset**, which will cause the platform to boot from the safe
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slot **A** again.
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This should significantly reduce the friction of testing the firmware,
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especially during development and at early beta stages.
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## How It Works
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* **Top Swap Control**: The Intel Top Swap feature allows the PCH to take two
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physically topmost chunks of the BIOS flash chip, and decide in which order
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to map them - effectively allowing to swap the two chunks.
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* **A/B Slot Setup**: The top of the firmware is divided into two slots:
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`BOOTBLOCK` and `TOPSWAP`, which contain bootblocks "chosen" by the Top
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Swap mechanism. They in turn choose `COREBOOT` and `COREBOOT_TS` regions
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respectively to load consecutive stages from.
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* **Runtime CMOS Control**: The CMOS option `attempt_slot_b` controls the Top
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Swap state, also enabling users to manually select the active slot by setting
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this value via nvramtool. If the option is set, the platform will attempt
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booting slot **B**.
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## Updating Firmware with Flashrom
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If you wish to update the firmware using Flashrom, you need to follow
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these additional steps:
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```bash
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sudo flashrom -p internal -w coreboot.rom --fmap -i TOPSWAP -i COREBOOT_TS --noverify-all
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sudo nvramtool -w attempt_slot_b=Enable
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```
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This command sequence writes the new firmware image into the appropriate regions
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(`TOPSWAP` and `COREBOOT_TS`) and enables the Top Swap feature by setting the
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`attempt_slot_b` CMOS option to "Enable". This ensures that after the next
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reboot, the system will boot from the newly updated slot.
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## Further reading
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For a more detailed documentation of the implementation, please read the
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[upstream coreboot documentation](https://doc.coreboot.org/soc/intel)
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(_"doc.coreboot.org/soc/intel/redundancy.html"_, not yet available as of
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February 25th 2026, can also be viewed
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[here](https://github.com/coreboot/coreboot/blob/main/Documentation/soc/intel/redundancy.md)).

mkdocs.yml

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- 'Verifying signatures': guides/signature-verification.md
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- 'Verifying reproducible builds': guides/reproducible-build-verification.md
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- 'Boot logo replacement': guides/logo-customization.md
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- 'Top Swap Redundancy': guides/redundancy.md
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- 'Lab Assembly':
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- 'ASRock SPC741D8-2L2T/BCM': guides/lab-assembly/asrock_spc741d8.md
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- 'Gigabyte MZ33-AR1': guides/lab-assembly/gigabyte_mz33_ar1.md

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