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| 1 | +/* |
| 2 | + * FreeRTOS Kernel <DEVELOPMENT BRANCH> |
| 3 | + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. |
| 4 | + * |
| 5 | + * SPDX-License-Identifier: MIT |
| 6 | + * |
| 7 | + * Permission is hereby granted, free of charge, to any person obtaining a copy of |
| 8 | + * this software and associated documentation files (the "Software"), to deal in |
| 9 | + * the Software without restriction, including without limitation the rights to |
| 10 | + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of |
| 11 | + * the Software, and to permit persons to whom the Software is furnished to do so, |
| 12 | + * subject to the following conditions: |
| 13 | + * |
| 14 | + * The above copyright notice and this permission notice shall be included in all |
| 15 | + * copies or substantial portions of the Software. |
| 16 | + * |
| 17 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 18 | + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS |
| 19 | + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR |
| 20 | + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER |
| 21 | + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 22 | + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 23 | + * |
| 24 | + * https://www.FreeRTOS.org |
| 25 | + * https://github.com/FreeRTOS |
| 26 | + * |
| 27 | + */ |
| 28 | + |
| 29 | +// Copyright: Copyright (C) Texas Instruments Incorporated |
| 30 | +// All rights reserved not granted herein. |
| 31 | +// |
| 32 | +// Redistribution and use in source and binary forms, with or without |
| 33 | +// modification, are permitted provided that the following conditions |
| 34 | +// are met: |
| 35 | +// |
| 36 | +// Redistributions of source code must retain the above copyright |
| 37 | +// notice, this list of conditions and the following disclaimer. |
| 38 | +// |
| 39 | +// Redistributions in binary form must reproduce the above copyright |
| 40 | +// notice, this list of conditions and the following disclaimer in the |
| 41 | +// documentation and/or other materials provided with the |
| 42 | +// distribution. |
| 43 | +// |
| 44 | +// Neither the name of Texas Instruments Incorporated nor the names of |
| 45 | +// its contributors may be used to endorse or promote products derived |
| 46 | +// from this software without specific prior written permission. |
| 47 | +// |
| 48 | +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 49 | +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 50 | +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 51 | +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 52 | +// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 53 | +// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 54 | +// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 55 | +// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 56 | +// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 57 | +// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 58 | +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 59 | +// |
| 60 | + |
| 61 | +//------------------------------------------------------------------------------------------------- |
| 62 | +// Scheduler includes. |
| 63 | +//------------------------------------------------------------------------------------------------- |
| 64 | +#include "FreeRTOS.h" |
| 65 | +#include "task.h" |
| 66 | + |
| 67 | +#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 |
| 68 | + /* Check the configuration. */ |
| 69 | + #if ( configMAX_PRIORITIES > 32 ) |
| 70 | + #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. |
| 71 | + #endif |
| 72 | +#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ |
| 73 | + |
| 74 | +//------------------------------------------------------------------------------------------------- |
| 75 | +// Implementation of functions defined in portable.h for the C29x port. |
| 76 | +//------------------------------------------------------------------------------------------------- |
| 77 | + |
| 78 | +// Constants required for hardware setup. |
| 79 | +#define portINITIAL_CRITICAL_NESTING ( ( uint16_t ) 10 ) |
| 80 | +#define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x010000 ) // DSTS LP INT ENABLE |
| 81 | + |
| 82 | +// Register descriptions of C29 Architecture |
| 83 | +#define A_REGISTERS 16 // Addressing registers |
| 84 | +#define D_REGISTERS 16 // Fixed point registers |
| 85 | +#define M_REGISTERS 32 // Floating point registers |
| 86 | +#define A4_REGISTER_POSITION 4U |
| 87 | + |
| 88 | +// |
| 89 | +// DO NOT MAKE as pdFALSE, the C29 compiler currently uses some FPU registers even when FPU |
| 90 | +// operations are not done, hence we should save/restore FPU always |
| 91 | +// |
| 92 | +#define TASK_HAS_FPU_CONTEXT_ON_TASK_START pdTRUE |
| 93 | + |
| 94 | +void vPortSetupTimerInterrupt( void ); |
| 95 | +void vPortSetupSWInterrupt( void ); |
| 96 | + |
| 97 | +// Each task maintains a count of the critical section nesting depth. Each |
| 98 | +// time a critical section is entered the count is incremented. Each time a |
| 99 | +// critical section is exited the count is decremented - with interrupts only |
| 100 | +// being re-enabled if the count is zero. |
| 101 | +// |
| 102 | +// ulCriticalNesting will get set to zero when the scheduler starts, but must |
| 103 | +// not be initialised to zero as this will cause problems during the startup |
| 104 | +// sequence. |
| 105 | +// |
| 106 | +// ulCriticalNesting should be 32 bit value to keep stack alignment unchanged. |
| 107 | +volatile uint32_t ulCriticalNesting = portINITIAL_CRITICAL_NESTING; |
| 108 | + |
| 109 | +// |
| 110 | +// Saved as part of the task context. Value set here has no effect. |
| 111 | +// Value set in pxPortInitialiseStack is the initial value when a task starts |
| 112 | +// |
| 113 | +uint32_t ulTaskHasFPUContext = TASK_HAS_FPU_CONTEXT_ON_TASK_START; |
| 114 | + |
| 115 | +//------------------------------------------------------------------------------------------------- |
| 116 | +// Initialise the stack of a task to look exactly as if |
| 117 | +// timer interrupt was executed. |
| 118 | +//------------------------------------------------------------------------------------------------- |
| 119 | +StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) |
| 120 | +{ |
| 121 | + uint16_t i; |
| 122 | + uint16_t base = 0; |
| 123 | + |
| 124 | + pxTopOfStack[base] = (uint32_t)vPortEndScheduler; |
| 125 | + base+=1; // Alignment |
| 126 | + pxTopOfStack[base] = 0x07F90001; |
| 127 | + base+=1; // Alignment , DSTS if RETI |
| 128 | + pxTopOfStack[base] = 0xABABABAB; |
| 129 | + base+=1 ; // A14 |
| 130 | + pxTopOfStack[base] = ((uint32_t)pxCode) & 0xFFFFFFFEU; |
| 131 | + base+=1; //RPC or PC (first task) after return |
| 132 | + pxTopOfStack[base] = 0x07F90001; |
| 133 | + base+=1; // DSTS |
| 134 | + pxTopOfStack[base] = 0x00020101; |
| 135 | + base+=1; // ESTS |
| 136 | + |
| 137 | + // Fill the rest of the registers with dummy values. |
| 138 | + for(i = 0; i <= (A_REGISTERS + D_REGISTERS + M_REGISTERS -2 -1); i++) |
| 139 | + { |
| 140 | + uint32_t value = 0xDEADDEAD; |
| 141 | + |
| 142 | + // Function parameters are passed in A4. |
| 143 | + if(i == A4_REGISTER_POSITION) |
| 144 | + { |
| 145 | + value = (uint32_t)pvParameters; |
| 146 | + } |
| 147 | + pxTopOfStack[base + i] = value; |
| 148 | + } |
| 149 | + base += i ; |
| 150 | + |
| 151 | + // Save (or) Don't save FPU registers when a task starts |
| 152 | + pxTopOfStack[base] = TASK_HAS_FPU_CONTEXT_ON_TASK_START; |
| 153 | + base+=1; // FPU context |
| 154 | + base+=1; // Alignment |
| 155 | + |
| 156 | + // Return a pointer to the top of the stack we have generated so this can |
| 157 | + // be stored in the task control block for the task. |
| 158 | + return pxTopOfStack + base; |
| 159 | +} |
| 160 | + |
| 161 | +//------------------------------------------------------------------------------------------------- |
| 162 | +// See header file for description. |
| 163 | +//------------------------------------------------------------------------------------------------- |
| 164 | +BaseType_t xPortStartScheduler(void) |
| 165 | +{ |
| 166 | + // Yield interrupt |
| 167 | + vPortSetupSWInterrupt(); |
| 168 | + // Tick timer interrupt |
| 169 | + vPortSetupTimerInterrupt(); |
| 170 | + |
| 171 | + ulCriticalNesting = 0; |
| 172 | + |
| 173 | + portENABLE_INTERRUPTS(); |
| 174 | + portRESTORE_FIRST_CONTEXT(); |
| 175 | + |
| 176 | + // This line should not be reached |
| 177 | + return pdFAIL; |
| 178 | +} |
| 179 | + |
| 180 | +//------------------------------------------------------------------------------------------------- |
| 181 | +void vPortEndScheduler( void ) |
| 182 | +{ |
| 183 | + // It is unlikely that the C29x port will get stopped. |
| 184 | + // If required simply disable the tick interrupt here. |
| 185 | +} |
| 186 | + |
| 187 | +//------------------------------------------------------------------------------------------------- |
| 188 | +void vPortSetupTimerInterrupt( void ) |
| 189 | +{ |
| 190 | + CPUTimer_stopTimer(PORT_TICK_TIMER_BASE); |
| 191 | + CPUTimer_setPeriod(PORT_TICK_TIMER_BASE, ((uint32_t)((configCPU_CLOCK_HZ / configTICK_RATE_HZ)))); |
| 192 | + CPUTimer_setPreScaler(PORT_TICK_TIMER_BASE, 0U); |
| 193 | + CPUTimer_reloadTimerCounter(PORT_TICK_TIMER_BASE); |
| 194 | + CPUTimer_setEmulationMode(PORT_TICK_TIMER_BASE, CPUTIMER_EMULATIONMODE_STOPAFTERNEXTDECREMENT); |
| 195 | + CPUTimer_clearOverflowFlag(PORT_TICK_TIMER_BASE); |
| 196 | + CPUTimer_enableInterrupt(PORT_TICK_TIMER_BASE); |
| 197 | + |
| 198 | + Interrupt_disable(PORT_TICK_TIMER_INT); |
| 199 | + Interrupt_clearFlag(PORT_TICK_TIMER_INT); |
| 200 | + Interrupt_clearOverflowFlag(PORT_TICK_TIMER_INT); |
| 201 | + Interrupt_register(PORT_TICK_TIMER_INT, &portTICK_ISR); |
| 202 | + Interrupt_setPriority(PORT_TICK_TIMER_INT, PORT_TICK_TIMER_INT_PRI); |
| 203 | + Interrupt_enable(PORT_TICK_TIMER_INT); |
| 204 | + |
| 205 | + CPUTimer_startTimer(PORT_TICK_TIMER_BASE); |
| 206 | +} |
| 207 | + |
| 208 | +//------------------------------------------------------------------------------------------------- |
| 209 | +void vPortSetupSWInterrupt( void ) |
| 210 | +{ |
| 211 | + Interrupt_disable(PORT_TASK_SWITCH_INT); |
| 212 | + Interrupt_clearFlag(PORT_TASK_SWITCH_INT); |
| 213 | + Interrupt_clearOverflowFlag(PORT_TASK_SWITCH_INT); |
| 214 | + Interrupt_register(PORT_TASK_SWITCH_INT, &vPortYield); |
| 215 | + Interrupt_setPriority(PORT_TASK_SWITCH_INT, PORT_TASK_SWITCH_INT_PRI); |
| 216 | + Interrupt_enable(PORT_TASK_SWITCH_INT); |
| 217 | +} |
| 218 | + |
| 219 | +//------------------------------------------------------------------------------------------------- |
| 220 | +void vPortEnterCritical( void ) |
| 221 | +{ |
| 222 | + portDISABLE_INTERRUPTS(); |
| 223 | + ulCriticalNesting++; |
| 224 | +} |
| 225 | + |
| 226 | +//------------------------------------------------------------------------------------------------- |
| 227 | +void vPortExitCritical( void ) |
| 228 | +{ |
| 229 | + ulCriticalNesting--; |
| 230 | + if( ulCriticalNesting == 0 ) |
| 231 | + { |
| 232 | + portENABLE_INTERRUPTS(); |
| 233 | + } |
| 234 | +} |
| 235 | + |
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