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Merge tag 'v6.18.8' into HEAD
 * Linux 6.18.8 Signed-off-by: Yang Jeong Hun <onyxclover9931@gmail.com>
2 parents 791d94d + d905362 commit 29affc9

249 files changed

Lines changed: 1889 additions & 875 deletions

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‎Documentation/netlink/specs/fou.yaml‎

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@@ -39,6 +39,8 @@ attribute-sets:
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-
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name: ipproto
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type: u8
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checks:
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min: 1
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-
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name: type
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type: u8

‎Makefile‎

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# SPDX-License-Identifier: GPL-2.0
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VERSION = 6
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PATCHLEVEL = 18
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SUBLEVEL = 7
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SUBLEVEL = 8
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EXTRAVERSION =
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NAME = Baby Opossum Posse
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‎arch/arm/boot/dts/microchip/sama7d65.dtsi‎

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@@ -527,7 +527,7 @@
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <0>;
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dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>,
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<&dma0 AT91_XDMAC_DT_PERID(11)>;
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dma-names = "tx", "rx";
@@ -676,7 +676,7 @@
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flx9: flexcom@e2820000 {
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compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
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reg = <0xe2820000 0x200>;
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ranges = <0x0 0xe281c000 0x800>;
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ranges = <0x0 0xe2820000 0x800>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
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#address-cells = <1>;
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#size-cells = <1>;

‎arch/arm64/boot/dts/qcom/sc8280xp.dtsi‎

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@@ -5773,8 +5773,12 @@
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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power-domains = <&rpmhpd SC8280XP_NSP>;
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power-domain-names = "nsp";
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power-domains = <&rpmhpd SC8280XP_NSP>,
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<&rpmhpd SC8280XP_CX>,
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<&rpmhpd SC8280XP_MXC>;
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power-domain-names = "nsp",
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"cx",
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"mxc";
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memory-region = <&pil_nsp0_mem>;
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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power-domains = <&rpmhpd SC8280XP_NSP>;
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power-domain-names = "nsp";
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power-domains = <&rpmhpd SC8280XP_NSP>,
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<&rpmhpd SC8280XP_CX>,
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<&rpmhpd SC8280XP_MXC>;
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power-domain-names = "nsp",
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"cx",
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"mxc";
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memory-region = <&pil_nsp1_mem>;
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‎arch/arm64/boot/dts/qcom/sm6150.dtsi‎

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<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
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<&gcc GCC_UFS_PHY_AHB_CLK>,
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<&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,
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<&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
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<&rpmhcc RPMH_CXO_CLK>,
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<&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
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<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>;
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<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
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<&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
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clock-names = "core_clk",
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"bus_aggr_clk",
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"iface_clk",

‎arch/arm64/boot/dts/qcom/sm8550.dtsi‎

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usb_1: usb@a600000 {
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compatible = "qcom,sm8550-dwc3", "qcom,snps-dwc3";
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reg = <0x0 0x0a600000 0x0 0xfc100>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
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<&gcc GCC_USB30_PRIM_MASTER_CLK>,

‎arch/arm64/boot/dts/qcom/sm8650.dtsi‎

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dma-coherent;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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ports {

‎arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts‎

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&pcie0 {
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ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
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max-link-speed = <2>;
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num-lanes = <2>;
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pinctrl-names = "default";
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status = "okay";

‎arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dtsi‎

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};
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&pcie0 {
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max-link-speed = <1>;
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num-lanes = <1>;
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vpcie3v3-supply = <&vcc3v3_sys>;
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};

‎arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts‎

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button-up {
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label = "Volume Up";
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linux,code = <KEY_VOLUMEUP>;
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press-threshold-microvolt = <100000>;
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press-threshold-microvolt = <2000>;
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};
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button-down {
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label = "Volume Down";
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linux,code = <KEY_VOLUMEDOWN>;
49-
press-threshold-microvolt = <600000>;
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press-threshold-microvolt = <300000>;
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};
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};
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