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cpu/stm32: add initial STM32U3 and nucleo-u385rg-q support#22175

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cpu/stm32: add initial STM32U3 and nucleo-u385rg-q support#22175
itsadarshnair wants to merge 17 commits intoRIOT-OS:masterfrom
itsadarshnair:stm32u385-port

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@itsadarshnair itsadarshnair commented Apr 5, 2026

Contribution description

This PR adds initial support for the STM32U3 family and the NUCLEO-U385RG-Q board.

It includes:

  • initial STM32U3 CPU family support under cpu/stm32
  • board support for boards/nucleo-u385rg-q
  • basic clock and peripheral configuration required for bring-up

At the moment, this is an initial bring-up PR. The board boots and the LED blinking example was verified on hardware. Other peripherals and features may still be incomplete or untested.

At this stage, OpenOCD flashing support is not yet available. The board was programmed using STM32CubeProgrammer.

Testing procedure

The changes were tested with the examples/basic/blinky application on the nucleo-u385rg-q board.

Build:
bash
make -C examples/basic/blinky BOARD=nucleo-u385rg-q

Issues/PRs references

Progress for Tracking Issue #19264.

Declaration of AI-Tools / LLMs usage:

AI-Tools / LLMs that were used are:

  • ChatGPT for understanding the porting process, code generation/suggestions, with user review
  • Gemini for understanding the porting process and code suggestions, with user review

@github-actions github-actions bot added Platform: ARM Platform: This PR/issue effects ARM-based platforms Area: doc Area: Documentation Area: build system Area: Build system Area: boards Area: Board ports Area: cpu Area: CPU/MCU ports Area: Kconfig Area: Kconfig integration labels Apr 5, 2026
@crasbe crasbe added Type: new feature The issue requests / The PR implemements a new feature for RIOT State: needs rebase State: The codebase was changed since the creation of the PR, making a rebase necessary labels Apr 5, 2026
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Thank you for creating the Pull Request with the STM32U3 support.

This is the first review round that is has mostly style related comments. I will do a second round once everything style-wise is in order.

There are merge conflicts that have to be resolved before this can be merged.

Comment thread features.yaml Outdated
Comment thread cpu/stm32/stm32_mem_lengths.mk Outdated
Comment thread cpu/stm32/stm32_info.mk Outdated
Comment thread cpu/stm32/kconfigs/u3/Kconfig Outdated
Comment thread boards/nucleo-u385rg-q/include/periph_conf.h
Comment thread cpu/stm32/include/periph/cpu_common.h Outdated
Comment thread cpu/stm32/include/periph/cpu_common.h
Comment thread cpu/stm32/periph/pm.c Outdated
Comment thread cpu/stm32/Makefile.cmsis Outdated
Comment thread cpu/stm32/Makefile.features Outdated
Comment thread boards/nucleo-u385rg-q/include/periph_conf.h Outdated
@crasbe crasbe added CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR and removed State: needs rebase State: The codebase was changed since the creation of the PR, making a rebase necessary labels Apr 6, 2026
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riot-ci commented Apr 6, 2026

Murdock results

✔️ PASSED

9565281 Re-addressed and fixed the review comments

Success Failures Total Runtime
11025 0 11026 14m:45s

Artifacts

@crasbe crasbe self-assigned this Apr 8, 2026
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Please run dist/tools/compile_and_test_for_board/compile_and_test_for_board.py . nucleo-u385rg-q on your local computer. There are still a lot of compilation errors from missing definitions. Unfortunately that does not show in our CI because the newly added board is not in the quickbuild list.

Comment on lines +125 to +126
/* Deduct the needed flash wait states from the core clock frequency */
#define FLASH_WAITSTATES FLASH_ACR_LATENCY_2
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The comment says something different than the code.

Comment on lines +82 to +84
/* Check if PLL is required
* - When PLLQ is used as 48MHz clock source
*/
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This comment block does not have a code block that belongs to it?

Comment on lines +1 to +14
/*
* SPDX-FileCopyrightText: 2026 Technische Universität Hamburg
* SPDX-License-Identifier: LGPL-2.1-only
*/

/**
* @ingroup cpu_stm32
* @{
*
* @file
* @brief STM32U3 clock initialization
*
* @author Adarsh Nair Mullachery
*/
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The file looks like it was inspired by cpu/stm32/stmclk/stmclk_l5.c, right?

You should retain the copyright of the original authors if you copy a file.
If you added/changed a significant amount of it, you can add your own authorship and copyright, but you can never remove someone else's as long as there is code from the original author(s). And even then we usually keep it out of respect.

Comment on lines +2 to +5
# SPDX-License-Identifier: LGPL-2.1-only


# CPU lines
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Suggested change
# SPDX-License-Identifier: LGPL-2.1-only
# CPU lines
# SPDX-License-Identifier: LGPL-2.1-only
# CPU lines

Unnecessary empty line.

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Labels

Area: boards Area: Board ports Area: build system Area: Build system Area: cpu Area: CPU/MCU ports Area: doc Area: Documentation Area: Kconfig Area: Kconfig integration CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR Platform: ARM Platform: This PR/issue effects ARM-based platforms Type: new feature The issue requests / The PR implemements a new feature for RIOT

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3 participants