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Merged
ronlieb
merged 16 commits into
amd-staging
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amd/merge/upstream_merge_20251115081655
Nov 15, 2025
Merged
merge main into amd-staging #597
ronlieb
merged 16 commits into
amd-staging
from
amd/merge/upstream_merge_20251115081655
Nov 15, 2025
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Some cases are relying on SIFixSGPRCopies to force VALU reg_sequence inputs with SGPR inputs to use all VGPR inputs, but this doesn't always happen if the reg_sequence isn't invalid. Make sure we use a vgpr up-front here so we don't rely on something later.
As in title. Without this, fpext behaves in selectionDAG as always having no fast-math flags.
) This PR improves the lowering of vectors of fp16 when using fpext. Previously vectors of fp16 were scalarized leading to lots of extra instructions. Now, vectors of fp16 will be lowered when extended to fp64 via the preexisting lowering logic for extends. To make use of the existing logic, we need to add elements until we reach the next power of 2.
Handle this for consistency with the zext case.
…lvm#168168) This probably should have turned into a regular integer constant earlier. This is to defend against future regressions.
The main improvement is to the mfma tests. There are some mild regressions scattered around, and a few major ones. The worst regressions are in some of the bitcast tests; these are cases where the SGPR argument list runs out and uses VGPRs, and the copies-from-VGPR are misidentified as divergent. Most of the shufflevector tests are also regressions. These end up with cleaner MIR, but then get poor regalloc decisions.
Implement support for the OffsetOfExpr
Upstream ExtVectorElementExpr with result Vector type
…#166724) Per [LWG554](https://cplusplus.github.io/LWG/issue554), the rationale is that even if `true / false` traps, the values causing trap are the converted `int` values produced by usual arithmetic conversion, but not the original `bool` values. This is also true for all other non-promoted integer types. As a result, `std::numeric_limits<I>` should be `false` if `I` is a non non-promoted integer type. Fixes llvm#166053.
…llvm#165779) (llvm#168034) Refer to llvm#158276 for previous hotfix. In Z3, boolean expressions are incompatible with bitvec operators. However, C expressions like `-(5 && a)` will generate such symbolic expressions, which will be further used as an integer. To be compatible with such usages, this fix converts such expressions to integer using the existing `fromCast`.
Update test to capture unnamed VPValues in variables, making it easier to update with future VPlan changes.
…n. (llvm#167965) Extend willNotFreeBetween to perform simple checking across blocks to support the case where CtxI is in a successor of the block that contains the assume, but the assume's parent is the single predecessor of CtxI's block. This enables using _builtin_assume_dereferenceable to vectorize std::find_if and co in practice. End-to-end reproducer: https://godbolt.org/z/6jbsd4EjT PR: llvm#167965
hopefully resolves oclConformance fails
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dpalermo
approved these changes
Nov 15, 2025
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