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Merged
merged 1 commit into from
Jun 5, 2025
Merged

Add support for ATtiny261A, ATtiny461A, ATtiny861A #179

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3 changes: 3 additions & 0 deletions Cargo.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -65,12 +65,14 @@ attiny214 = ["device-selected"]
attiny2313 = ["device-selected"]
attiny2313a = ["device-selected"]
attiny26 = ["device-selected"]
attiny261a = ["device-selected"]
attiny402 = ["device-selected"]
attiny404 = ["device-selected"]
attiny412 = ["device-selected"]
attiny414 = ["device-selected"]
attiny416 = ["device-selected"]
attiny44a = ["device-selected"]
attiny461a = ["device-selected"]
attiny804 = ["device-selected"]
attiny816 = ["device-selected"]
attiny828 = ["device-selected"]
Expand All @@ -79,6 +81,7 @@ attiny841 = ["device-selected"]
attiny84a = ["device-selected"]
attiny85 = ["device-selected"]
attiny861 = ["device-selected"]
attiny861a = ["device-selected"]
attiny88 = ["device-selected"]
attiny1604 = ["device-selected"]
attiny1606 = ["device-selected"]
Expand Down
26 changes: 15 additions & 11 deletions README.md
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Expand Up @@ -20,21 +20,25 @@ Via the feature you can select which chip you want the register specifications f
| `atmega644` | `atmega32u4` | `atmega4809` | `at90can32` | `attiny204` |
| `atmega88p` | `avr64du32` | | | `attiny212` |
| `atmega16` | `avr64du28` | | | `attiny214` |
| `atmega168` | | | | `attiny402` |
| `atmega324pa` | | | | `attiny404` |
| `atmega328p` | | | | `attiny412` |
| `atmega328pb` | | | | `attiny414` |
| `atmega32a` | | | | `attiny416` |
| `atmega1280` | | | | `attiny44a` |
| `atmega1284p` | | | | `attiny84` |
| `atmega128a` | | | | `attiny85` |
| `atmega128rfa1` | | | | `attiny88` |
| `atmega2560` | | | | `attiny804` |
| `atmega164pa` | | | | `attiny816` |
| `atmega168` | | | | `attiny26` |
| `atmega324pa` | | | | `attiny261a` |
| `atmega328p` | | | | `attiny402` |
| `atmega328pb` | | | | `attiny404` |
| `atmega32a` | | | | `attiny412` |
| `atmega1280` | | | | `attiny414` |
| `atmega1284p` | | | | `attiny416` |
| `atmega128a` | | | | `attiny44a` |
| `atmega128rfa1` | | | | `attiny461a` |
| `atmega2560` | | | | `attiny84` |
| `atmega164pa` | | | | `attiny85` |
| | | | | `attiny88` |
| | | | | `attiny804` |
| | | | | `attiny816` |
| | | | | `attiny828` |
| | | | | `attiny841` |
| | | | | `attiny84a` |
| | | | | `attiny861` |
| | | | | `attiny861a` |
| | | | | `attiny1604` |
| | | | | `attiny1606` |
| | | | | `attiny1614` |
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209 changes: 1 addition & 208 deletions patch/attiny26.yaml
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Expand Up @@ -2,6 +2,7 @@ _include:
- "common/ac.yaml"
- "common/wdt.yaml"
- "common/tiny/usi.yaml"
- "common/tiny/attinyx61a-ports.yaml"

# All FUSEs are read-only from the CPU.
FUSE:
Expand Down Expand Up @@ -74,211 +75,3 @@ ADC:
AREF: [1, "External Voltage Reference at AREF pin, Internal Voltage Reference turned off"]
INTERNAL: [2, "Internal 2.56V Voltage Reference without external bypass"]
INTERNAL_BYPASS: [3, "Internal 2.56V Voltage Reference with external bypass capacitor at AREF pin"]

PORTA:
DDRA:
_add:
PA0:
description: "Pin A0"
bitRange: "[0:0]"
access: read-write
PA1:
description: "Pin A1"
bitRange: "[1:1]"
access: read-write
PA2:
description: "Pin A2"
bitRange: "[2:2]"
access: read-write
PA3:
description: "Pin A3"
bitRange: "[3:3]"
access: read-write
PA4:
description: "Pin A4"
bitRange: "[4:4]"
access: read-write
PA5:
description: "Pin A5"
bitRange: "[5:5]"
access: read-write
PA6:
description: "Pin A6"
bitRange: "[6:6]"
access: read-write
PA7:
description: "Pin A7"
bitRange: "[7:7]"
access: read-write
PINA:
_add:
PA0:
description: "Pin A0"
bitRange: "[0:0]"
access: read-write
PA1:
description: "Pin A1"
bitRange: "[1:1]"
access: read-write
PA2:
description: "Pin A2"
bitRange: "[2:2]"
access: read-write
PA3:
description: "Pin A3"
bitRange: "[3:3]"
access: read-write
PA4:
description: "Pin A4"
bitRange: "[4:4]"
access: read-write
PA5:
description: "Pin A5"
bitRange: "[5:5]"
access: read-write
PA6:
description: "Pin A6"
bitRange: "[6:6]"
access: read-write
PA7:
description: "Pin A7"
bitRange: "[7:7]"
access: read-write
PORTA:
_add:
PA0:
description: "Pin A0"
bitRange: "[0:0]"
access: read-write
PA1:
description: "Pin A1"
bitRange: "[1:1]"
access: read-write
PA2:
description: "Pin A2"
bitRange: "[2:2]"
access: read-write
PA3:
description: "Pin A3"
bitRange: "[3:3]"
access: read-write
PA4:
description: "Pin A4"
bitRange: "[4:4]"
access: read-write
PA5:
description: "Pin A5"
bitRange: "[5:5]"
access: read-write
PA6:
description: "Pin A6"
bitRange: "[6:6]"
access: read-write
PA7:
description: "Pin A7"
bitRange: "[7:7]"
access: read-write

PORTB:
DDRB:
_add:
PB0:
description: "Pin B0"
bitRange: "[0:0]"
access: read-write
PB1:
description: "Pin B1"
bitRange: "[1:1]"
access: read-write
PB2:
description: "Pin B2"
bitRange: "[2:2]"
access: read-write
PB3:
description: "Pin B3"
bitRange: "[3:3]"
access: read-write
PB4:
description: "Pin B4"
bitRange: "[4:4]"
access: read-write
PB5:
description: "Pin B5"
bitRange: "[5:5]"
access: read-write
PB6:
description: "Pin B6"
bitRange: "[6:6]"
access: read-write
PB7:
description: "Pin B7"
bitRange: "[7:7]"
access: read-write
PINB:
_add:
PB0:
description: "Pin B0"
bitRange: "[0:0]"
access: read-write
PB1:
description: "Pin B1"
bitRange: "[1:1]"
access: read-write
PB2:
description: "Pin B2"
bitRange: "[2:2]"
access: read-write
PB3:
description: "Pin B3"
bitRange: "[3:3]"
access: read-write
PB4:
description: "Pin B4"
bitRange: "[4:4]"
access: read-write
PB5:
description: "Pin B5"
bitRange: "[5:5]"
access: read-write
PB6:
description: "Pin B6"
bitRange: "[6:6]"
access: read-write
PB7:
description: "Pin B7"
bitRange: "[7:7]"
access: read-write
PORTB:
_add:
PB0:
description: "Pin B0"
bitRange: "[0:0]"
access: read-write
PB1:
description: "Pin B1"
bitRange: "[1:1]"
access: read-write
PB2:
description: "Pin B2"
bitRange: "[2:2]"
access: read-write
PB3:
description: "Pin B3"
bitRange: "[3:3]"
access: read-write
PB4:
description: "Pin B4"
bitRange: "[4:4]"
access: read-write
PB5:
description: "Pin B5"
bitRange: "[5:5]"
access: read-write
PB6:
description: "Pin B6"
bitRange: "[6:6]"
access: read-write
PB7:
description: "Pin B7"
bitRange: "[7:7]"
access: read-write
16 changes: 16 additions & 0 deletions patch/attiny261a.yaml
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@@ -0,0 +1,16 @@
_svd: ../svd/attiny261a.svd

_include:
- "common/ac.yaml"
- "common/tiny/attinyx61a-adc.yaml"
- "common/tiny/attinyx61a-ports.yaml"
- "common/tiny/usi.yaml"
- "common/wdt.yaml"
- "timer/attiny861.yaml"
- "common/tiny/attinyx61a-timers.yaml"

# All FUSEs are read-only from the CPU.
FUSE:
_modify:
"*":
access: read-only
16 changes: 16 additions & 0 deletions patch/attiny461a.yaml
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@@ -0,0 +1,16 @@
_svd: ../svd/attiny461a.svd

_include:
- "common/ac.yaml"
- "common/tiny/attinyx61a-adc.yaml"
- "common/tiny/attinyx61a-ports.yaml"
- "common/tiny/usi.yaml"
- "common/wdt.yaml"
- "timer/attiny861.yaml"
- "common/tiny/attinyx61a-timers.yaml"

# All FUSEs are read-only from the CPU.
FUSE:
_modify:
"*":
access: read-only
16 changes: 16 additions & 0 deletions patch/attiny861a.yaml
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@@ -0,0 +1,16 @@
_svd: ../svd/attiny861a.svd

_include:
- "common/ac.yaml"
- "common/tiny/attinyx61a-adc.yaml"
- "common/tiny/attinyx61a-ports.yaml"
- "common/tiny/usi.yaml"
- "common/wdt.yaml"
- "timer/attiny861.yaml"
- "common/tiny/attinyx61a-timers.yaml"

# All FUSEs are read-only from the CPU.
FUSE:
_modify:
"*":
access: read-only
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