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Commit 49b98ad

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IgnoreWarnings
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fix main
1 parent fd9c8d1 commit 49b98ad

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-57
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1 file changed

+4
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src/platform.cpp

Lines changed: 4 additions & 57 deletions
Original file line numberDiff line numberDiff line change
@@ -161,61 +161,6 @@ setupCard(const std::string &configFilePath, const std::string &fpgaName)
161161
return card;
162162
}
163163

164-
int writeTest(std::shared_ptr<fpga::ip::Dma> dma){
165-
auto &alloc = villas::HostRam::getAllocator();
166-
const std::shared_ptr<villas::MemoryBlock> block
167-
= alloc.allocateBlock(0x200 * sizeof(float));
168-
villas::MemoryAccessor<float> mem = *block;
169-
dma->makeAccesibleFromVA(block);
170-
171-
logger->info("Trying to write Values");
172-
173-
mem[0] = (float)1337;
174-
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// Itiate write transfer
176-
bool state = dma->write(*block, 0x200 * sizeof(float));
177-
if(!state)
178-
logger->error("Failed to write to device");
179-
180-
volatile auto writeComp = dma->writeComplete();
181-
}
182-
183-
int readTest(std::shared_ptr<fpga::ip::Dma> dma){
184-
auto &alloc = villas::HostRam::getAllocator();
185-
186-
const std::shared_ptr<villas::MemoryBlock> block[]
187-
= { alloc.allocateBlock(0x200 * sizeof(uint32_t)),
188-
alloc.allocateBlock(0x200 * sizeof(uint32_t)) };
189-
190-
villas::MemoryAccessor<int32_t> mem[] = { *block[0], *block[1] };
191-
192-
for(auto b : block) {
193-
dma->makeAccesibleFromVA(b);
194-
}
195-
196-
// Setup read transfer
197-
dma->read(*block[0], block[0]->getSize());
198-
199-
size_t cur = 0, next = 1;
200-
while(true) {
201-
logger->trace("Read from stream and write to address {}:{:p}",
202-
block[next]->getAddrSpaceId(),
203-
block[next]->getOffset());
204-
205-
dma->read(*block[next], block[next]->getSize());
206-
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auto c = dma->readComplete();
208-
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logger->debug("bytes: {}, intrs: {}, bds: {}",
210-
c.bytes,
211-
c.interrupts,
212-
c.bds);
213-
214-
cur = next;
215-
next = (next + 1) % (sizeof(mem) / sizeof(mem[0]));
216-
}
217-
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}
219164

220165
int main()
221166
{
@@ -231,8 +176,10 @@ int main()
231176

232177
axi_switch->connectInternal("S00_AXIS", "M00_AXIS");
233178

234-
writeTest(dma);
235-
readTest(dma);
179+
// std::string outputFormat = "short";
180+
// auto formatter = fpga::getBufferedSampleFormatter(outputFormat, 16);
181+
// readFromDmaToStdOut(dma, std::move(formatter));
182+
writeToDmaFromStdIn(dma);
236183

237184
return 0;
238185
}

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