Skip to content

Commit 1b2405e

Browse files
authored
feat: Implement ARM CPU feature detection across Linux, Android, BSD, Windows, macOS, and iOS
**Description:** This PR replaces the stub `// TODO` implementations in `TArmSimdFeatures` with real, cross-platform ARM hardware capability detection, enabling runtime SIMD dispatch on ARM targets. ### New Units - **`HlpArmHwCapProvider`** — Platform-abstracted ARM HWCAP provider: - **Linux/Android:** Resolves `getauxval` via `dlsym` to query `AT_HWCAP`/`AT_HWCAP2` - **BSD (FreeBSD, NetBSD, DragonFlyBSD):** Resolves `elf_aux_info` / `_elf_aux_info` via `dlsym` - **Windows ARM64:** Wraps `IsProcessorFeaturePresent` for `PF_ARM_V8_*` constants - Includes HWCAP bit definitions for both AArch64 and ARM32 - **`HlpDarwinSysCtl`** — Darwin-specific (macOS/iOS) feature detection via `sysctlbyname`, resolved dynamically through `dlsym`. Supports modern `FEAT_*` sysctl keys (macOS 12+) with automatic fallback to legacy keys (macOS 11). ### Changes to Existing Units - **`HlpArmSimdFeatures`** — All `CPUHas*` methods now contain real detection logic for NEON, AES, SHA1, SHA256, SHA512, SHA3, PMULL, SVE, and SVE2. Added `CPUHasCRC32` / `HasCRC32` for CRC32 instruction detection. - **`HlpX86SimdFeatures`** — Renamed `FSimdLevel` → `FActiveSimdLevel` and `GetSimdLevel()` → `GetActiveSimdLevel()` for consistency and clarity. - **`HlpCpuFeatures`** — `TCpuFeatures.X86` and `TCpuFeatures.Arm` properties are now conditionally compiled under `HASHLIB_X86` / `HASHLIB_ARM` respectively, so only the relevant architecture code is included in each build. - **Include files (`HashLib.inc`, `HashLibFPC.inc`):** - Renamed `HASHLIB_ARM` (which previously meant ARM32) to `HASHLIB_ARM32` and `HASHLIB_ARM_ASM` to `HASHLIB_ARM32_ASM` to avoid ambiguity - Introduced `HASHLIB_X86` (= I386 or X86_64) and `HASHLIB_ARM` (= ARM32 or AArch64) as architecture-family defines - Normalized indentation throughout - **All dispatch units** (`HlpAdler32Dispatch`, `HlpCRCDispatch`, `HlpBlake2BDispatch`, `HlpBlake2SDispatch`, `HlpBlake3Dispatch`, `HlpSHA1Dispatch`, `HlpSHA2_256Dispatch`, `HlpSHA2_512Dispatch`, `HlpSHA3Dispatch`, `HlpXXHash3Dispatch`, `HlpArgon2Dispatch`, `HlpScryptDispatch`) — Updated to call `GetActiveSimdLevel()` instead of `GetSimdLevel()`. ### Design Notes - All platform API resolution uses `dlopen(nil)` + `dlsym` at runtime, avoiding hard static imports and gracefully degrading when symbols are unavailable. - ARM32 vs AArch64 differences in HWCAP register layout (e.g., ARM32 crypto extensions live in `HWCAP2` while AArch64 uses `HWCAP`) are handled via conditional compilation. - On Windows ARM64, `PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE` bundles AES, PMULL, SHA1, and SHA256 together per Microsoft's documentation. SHA3/SHA512 use the newer `PF_ARM_V82_*` constants.
1 parent 87c70b8 commit 1b2405e

24 files changed

Lines changed: 805 additions & 115 deletions

HashLib.Benchmark/Delphi/PerformanceBenchmarkConsole.dpr

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -128,6 +128,8 @@ uses
128128
HlpX86SimdFeatures in '..\..\HashLib\src\Utils\HlpX86SimdFeatures.pas',
129129
HlpArmSimdFeatures in '..\..\HashLib\src\Utils\HlpArmSimdFeatures.pas',
130130
HlpSimdLevels in '..\..\HashLib\src\Utils\HlpSimdLevels.pas',
131+
HlpArmHwCapProvider in '..\..\HashLib\src\Utils\HlpArmHwCapProvider.pas',
132+
HlpDarwinSysCtl in '..\..\HashLib\src\Utils\HlpDarwinSysCtl.pas',
131133
HlpHashLibTypes in '..\..\HashLib\src\Utils\HlpHashLibTypes.pas',
132134
HlpArrayUtils in '..\..\HashLib\src\Utils\HlpArrayUtils.pas';
133135

HashLib.Tests/Delphi.Tests/HashLib.Tests.dpr

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -146,6 +146,8 @@ uses
146146
HlpX86SimdFeatures in '..\..\HashLib\src\Utils\HlpX86SimdFeatures.pas',
147147
HlpArmSimdFeatures in '..\..\HashLib\src\Utils\HlpArmSimdFeatures.pas',
148148
HlpSimdLevels in '..\..\HashLib\src\Utils\HlpSimdLevels.pas',
149+
HlpArmHwCapProvider in '..\..\HashLib\src\Utils\HlpArmHwCapProvider.pas',
150+
HlpDarwinSysCtl in '..\..\HashLib\src\Utils\HlpDarwinSysCtl.pas',
149151
HlpHashLibTypes in '..\..\HashLib\src\Utils\HlpHashLibTypes.pas',
150152
HlpArrayUtils in '..\..\HashLib\src\Utils\HlpArrayUtils.pas',
151153
HashLibTestBase in '..\src\HashLibTestBase.pas',

HashLib/src/Checksum/HlpAdler32Dispatch.pas

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -201,7 +201,7 @@ procedure InitDispatch();
201201
end;
202202
{$ENDIF}
203203
{$IFDEF HASHLIB_X86_64_ASM}
204-
case TCpuFeatures.X86.GetSimdLevel() of
204+
case TCpuFeatures.X86.GetActiveSimdLevel() of
205205
TX86SimdLevel.AVX2:
206206
begin
207207
Adler32_Update := @Adler32_Update_Avx2;

HashLib/src/Checksum/HlpCRCDispatch.pas

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -521,7 +521,7 @@ procedure InitDispatch();
521521
end;
522522
{$ENDIF HASHLIB_I386_ASM}
523523
{$IFDEF HASHLIB_X86_64_ASM}
524-
case TCpuFeatures.X86.GetSimdLevel() of
524+
case TCpuFeatures.X86.GetActiveSimdLevel() of
525525
TX86SimdLevel.AVX2, TX86SimdLevel.SSSE3, TX86SimdLevel.SSE2:
526526
BindSse2CrcFold;
527527
end;

HashLib/src/Crypto/HlpBlake2BDispatch.pas

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -140,7 +140,7 @@ procedure InitDispatch();
140140
end;
141141
{$ENDIF}
142142
{$IFDEF HASHLIB_X86_64_ASM}
143-
case TCpuFeatures.X86.GetSimdLevel() of
143+
case TCpuFeatures.X86.GetActiveSimdLevel() of
144144
TX86SimdLevel.AVX2:
145145
begin
146146
Blake2B_Compress := @Blake2B_Compress_Avx2;

HashLib/src/Crypto/HlpBlake2SDispatch.pas

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -138,7 +138,7 @@ procedure InitDispatch();
138138
end;
139139
{$ENDIF}
140140
{$IFDEF HASHLIB_X86_64_ASM}
141-
case TCpuFeatures.X86.GetSimdLevel() of
141+
case TCpuFeatures.X86.GetActiveSimdLevel() of
142142
TX86SimdLevel.AVX2:
143143
begin
144144
Blake2S_Compress := @Blake2S_Compress_Avx2;

HashLib/src/Crypto/HlpBlake3Dispatch.pas

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -723,7 +723,7 @@ procedure InitDispatch();
723723
end;
724724
{$ENDIF}
725725
{$IFDEF HASHLIB_X86_64_ASM}
726-
case TCpuFeatures.X86.GetSimdLevel() of
726+
case TCpuFeatures.X86.GetActiveSimdLevel() of
727727
TX86SimdLevel.AVX2:
728728
begin
729729
Blake3_Compress := @Blake3_Compress_Avx2;

HashLib/src/Crypto/HlpSHA1Dispatch.pas

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -193,7 +193,7 @@ procedure InitDispatch();
193193
SHA1_Compress := @SHA1_Compress_ShaNi_Wrap;
194194
Exit;
195195
end;
196-
case TCpuFeatures.X86.GetSimdLevel() of
196+
case TCpuFeatures.X86.GetActiveSimdLevel() of
197197
TX86SimdLevel.AVX2:
198198
begin
199199
SHA1_Compress := @SHA1_Compress_Avx2_Wrap;

HashLib/src/Crypto/HlpSHA2_256Dispatch.pas

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -203,7 +203,7 @@ procedure InitDispatch();
203203
SHA256_Compress := @SHA256_Compress_ShaNi_Wrap;
204204
Exit;
205205
end;
206-
case TCpuFeatures.X86.GetSimdLevel() of
206+
case TCpuFeatures.X86.GetActiveSimdLevel() of
207207
TX86SimdLevel.AVX2:
208208
begin
209209
SHA256_Compress := @SHA256_Compress_Avx2_Wrap;

HashLib/src/Crypto/HlpSHA2_512Dispatch.pas

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -207,7 +207,7 @@ procedure InitDispatch();
207207
end;
208208
{$ENDIF}
209209
{$IFDEF HASHLIB_X86_64_ASM}
210-
case TCpuFeatures.X86.GetSimdLevel() of
210+
case TCpuFeatures.X86.GetActiveSimdLevel() of
211211
TX86SimdLevel.AVX2:
212212
begin
213213
SHA512_Compress := @SHA512_Compress_Avx2_Wrap;

0 commit comments

Comments
 (0)