feat: add IA-32 (i386) SSE2 SIMD dispatch and refactor CRC into dispatch layer#58
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feat: add IA-32 (i386) SSE2 SIMD dispatch and refactor CRC into dispatch layer#58
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… asm FPC's x64 assembler rejects `and rax, $FFFFFFFF` (8011: signed dword out of range). Use `mov eax, ebx` to zero-extend the 32-bit CRC into RAX for the UInt64 return value.
Add an explicit _x86_64 suffix to all x86-64-specific SIMD .inc files under HashLib/src/Include/Simd, matching the existing *_i386.inc pattern and keeping a flat layout for future architectures.
Leave CpuDetect/CpuIdQuery.inc and CpuDetect/XGetBvQuery.inc unchanged; they already branch on HASHLIB_I386_ASM for IA-32 vs x86-64 in one file.
Update every {$I ..\Include\Simd\...} in the dispatch units to the new names, refresh related header comments, and i386 cross-references.
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Summary
This PR extends SIMD acceleration from x86-64-only to IA-32 (i386) targets and restructures the CRC fold/update logic into the centralized dispatch layer