diff --git a/HashLib.Benchmark/Delphi/PerformanceBenchmarkConsole.dpr b/HashLib.Benchmark/Delphi/PerformanceBenchmarkConsole.dpr
index 77c6e929..46f43623 100644
--- a/HashLib.Benchmark/Delphi/PerformanceBenchmarkConsole.dpr
+++ b/HashLib.Benchmark/Delphi/PerformanceBenchmarkConsole.dpr
@@ -124,7 +124,7 @@ uses
HlpConverters in '..\..\HashLib\src\Utils\HlpConverters.pas',
HlpBitConverter in '..\..\HashLib\src\Utils\HlpBitConverter.pas',
HlpBits in '..\..\HashLib\src\Utils\HlpBits.pas',
- HlpSimd in '..\..\HashLib\src\Utils\HlpSimd.pas',
+ HlpCpuFeatures in '..\..\HashLib\src\Utils\HlpCpuFeatures.pas',
HlpHashLibTypes in '..\..\HashLib\src\Utils\HlpHashLibTypes.pas',
HlpArrayUtils in '..\..\HashLib\src\Utils\HlpArrayUtils.pas';
diff --git a/HashLib.Benchmark/Delphi/PerformanceBenchmarkFMX.dpr b/HashLib.Benchmark/Delphi/PerformanceBenchmarkFMX.dpr
index 00b30063..d970fb0a 100644
--- a/HashLib.Benchmark/Delphi/PerformanceBenchmarkFMX.dpr
+++ b/HashLib.Benchmark/Delphi/PerformanceBenchmarkFMX.dpr
@@ -123,7 +123,7 @@ uses
HlpConverters in '..\..\HashLib\src\Utils\HlpConverters.pas',
HlpBitConverter in '..\..\HashLib\src\Utils\HlpBitConverter.pas',
HlpBits in '..\..\HashLib\src\Utils\HlpBits.pas',
- HlpSimd in '..\..\HashLib\src\Utils\HlpSimd.pas',
+ HlpCpuFeatures in '..\..\HashLib\src\Utils\HlpCpuFeatures.pas',
HlpHashLibTypes in '..\..\HashLib\src\Utils\HlpHashLibTypes.pas',
HlpArrayUtils in '..\..\HashLib\src\Utils\HlpArrayUtils.pas';
diff --git a/HashLib.Tests/Delphi.Tests/HashLib.Tests.dpr b/HashLib.Tests/Delphi.Tests/HashLib.Tests.dpr
index 8c6ef1d5..96ae3f9c 100644
--- a/HashLib.Tests/Delphi.Tests/HashLib.Tests.dpr
+++ b/HashLib.Tests/Delphi.Tests/HashLib.Tests.dpr
@@ -142,7 +142,7 @@ uses
HlpConverters in '..\..\HashLib\src\Utils\HlpConverters.pas',
HlpBitConverter in '..\..\HashLib\src\Utils\HlpBitConverter.pas',
HlpBits in '..\..\HashLib\src\Utils\HlpBits.pas',
- HlpSimd in '..\..\HashLib\src\Utils\HlpSimd.pas',
+ HlpCpuFeatures in '..\..\HashLib\src\Utils\HlpCpuFeatures.pas',
HlpHashLibTypes in '..\..\HashLib\src\Utils\HlpHashLibTypes.pas',
HlpArrayUtils in '..\..\HashLib\src\Utils\HlpArrayUtils.pas',
HashLibTestBase in '..\src\HashLibTestBase.pas',
diff --git a/HashLib/src/Checksum/HlpAdler32Dispatch.pas b/HashLib/src/Checksum/HlpAdler32Dispatch.pas
index 34b6fd90..80442742 100644
--- a/HashLib/src/Checksum/HlpAdler32Dispatch.pas
+++ b/HashLib/src/Checksum/HlpAdler32Dispatch.pas
@@ -13,7 +13,7 @@ interface
implementation
uses
- HlpSimd;
+ HlpCpuFeatures;
const
ModAdler = UInt32(65521);
@@ -188,28 +188,28 @@ procedure InitDispatch();
begin
Adler32_Update := @Adler32_Update_Scalar;
{$IFDEF HASHLIB_I386_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.SSSE3:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.SSSE3:
begin
Adler32_Update := @Adler32_Update_Ssse3;
end;
- TSimdLevel.SSE2:
+ TCpuSimdLevel.SSE2:
begin
Adler32_Update := @Adler32_Update_Sse2;
end;
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.AVX2:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.AVX2:
begin
Adler32_Update := @Adler32_Update_Avx2;
end;
- TSimdLevel.SSSE3:
+ TCpuSimdLevel.SSSE3:
begin
Adler32_Update := @Adler32_Update_Ssse3;
end;
- TSimdLevel.SSE2:
+ TCpuSimdLevel.SSE2:
begin
Adler32_Update := @Adler32_Update_Sse2;
end;
diff --git a/HashLib/src/Checksum/HlpCRCDispatch.pas b/HashLib/src/Checksum/HlpCRCDispatch.pas
index 748fa7f6..cd3d7886 100644
--- a/HashLib/src/Checksum/HlpCRCDispatch.pas
+++ b/HashLib/src/Checksum/HlpCRCDispatch.pas
@@ -78,7 +78,7 @@ implementation
uses
HlpConverters,
- HlpSimd;
+ HlpCpuFeatures;
// =============================================================================
// Scalar fallback implementation
@@ -494,7 +494,7 @@ procedure InitDispatch();
CRC_Fold_UsesPclmul := False;
{$IFDEF HASHLIB_X86_64_ASM}
- if TSimd.HasVPCLMULQDQ() then
+ if TCpuFeatures.HasVPCLMULQDQ() then
begin
CRC_Fold_Lsb := @CRC_Fold_Vpclmul;
CRC_Fold_Msb := @CRC_Fold_Vpclmul_Msb;
@@ -502,7 +502,7 @@ procedure InitDispatch();
CRC_Fold_UsesPclmul := True;
Exit;
end;
- if TSimd.HasPCLMULQDQ() then
+ if TCpuFeatures.HasPCLMULQDQ() then
begin
CRC_Fold_Lsb := @CRC_Fold_Pclmul;
CRC_Fold_Msb := @CRC_Fold_Pclmul_Msb;
@@ -514,14 +514,14 @@ procedure InitDispatch();
{$IFDEF HASHLIB_X86_SIMD}
{$IFDEF HASHLIB_I386_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.SSSE3, TSimdLevel.SSE2:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.SSSE3, TCpuSimdLevel.SSE2:
BindSse2CrcFold;
end;
{$ENDIF HASHLIB_I386_ASM}
{$IFDEF HASHLIB_X86_64_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.AVX2, TSimdLevel.SSSE3, TSimdLevel.SSE2:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.AVX2, TCpuSimdLevel.SSSE3, TCpuSimdLevel.SSE2:
BindSse2CrcFold;
end;
{$ENDIF HASHLIB_X86_64_ASM}
diff --git a/HashLib/src/Crypto/HlpBlake2BDispatch.pas b/HashLib/src/Crypto/HlpBlake2BDispatch.pas
index c5af7140..3edb0bf9 100644
--- a/HashLib/src/Crypto/HlpBlake2BDispatch.pas
+++ b/HashLib/src/Crypto/HlpBlake2BDispatch.pas
@@ -22,7 +22,7 @@ implementation
uses
HlpBits,
- HlpSimd;
+ HlpCpuFeatures;
const
Blake2BSigma: array [0 .. 11, 0 .. 15] of Int32 = (
@@ -131,20 +131,20 @@ procedure InitDispatch();
begin
Blake2B_Compress := @Blake2B_Compress_Scalar;
{$IFDEF HASHLIB_I386_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.SSE2, TSimdLevel.SSSE3:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.SSE2, TCpuSimdLevel.SSSE3:
begin
Blake2B_Compress := @Blake2B_Compress_Sse2;
end;
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.AVX2:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.AVX2:
begin
Blake2B_Compress := @Blake2B_Compress_Avx2;
end;
- TSimdLevel.SSE2, TSimdLevel.SSSE3:
+ TCpuSimdLevel.SSE2, TCpuSimdLevel.SSSE3:
begin
Blake2B_Compress := @Blake2B_Compress_Sse2;
end;
diff --git a/HashLib/src/Crypto/HlpBlake2SDispatch.pas b/HashLib/src/Crypto/HlpBlake2SDispatch.pas
index 787866b7..1a17f070 100644
--- a/HashLib/src/Crypto/HlpBlake2SDispatch.pas
+++ b/HashLib/src/Crypto/HlpBlake2SDispatch.pas
@@ -22,7 +22,7 @@ implementation
uses
HlpBits,
- HlpSimd;
+ HlpCpuFeatures;
const
Blake2SSigma: array [0 .. 9, 0 .. 15] of Int32 = (
@@ -129,20 +129,20 @@ procedure InitDispatch();
begin
Blake2S_Compress := @Blake2S_Compress_Scalar;
{$IFDEF HASHLIB_I386_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.SSE2, TSimdLevel.SSSE3:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.SSE2, TCpuSimdLevel.SSSE3:
begin
Blake2S_Compress := @Blake2S_Compress_Sse2;
end;
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.AVX2:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.AVX2:
begin
Blake2S_Compress := @Blake2S_Compress_Avx2;
end;
- TSimdLevel.SSE2, TSimdLevel.SSSE3:
+ TCpuSimdLevel.SSE2, TCpuSimdLevel.SSSE3:
begin
Blake2S_Compress := @Blake2S_Compress_Sse2;
end;
diff --git a/HashLib/src/Crypto/HlpBlake3Dispatch.pas b/HashLib/src/Crypto/HlpBlake3Dispatch.pas
index dba3dcac..c716d5b4 100644
--- a/HashLib/src/Crypto/HlpBlake3Dispatch.pas
+++ b/HashLib/src/Crypto/HlpBlake3Dispatch.pas
@@ -26,7 +26,7 @@ implementation
uses
HlpBits,
- HlpSimd;
+ HlpCpuFeatures;
const
Blake3IV: array [0 .. 3] of UInt32 = (
@@ -712,8 +712,8 @@ procedure InitDispatch();
Blake3_HashMany := @Blake3_HashMany_Scalar;
Blake3_ParallelDegree := 1;
{$IFDEF HASHLIB_I386_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.SSE2, TSimdLevel.SSSE3:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.SSE2, TCpuSimdLevel.SSSE3:
begin
Blake3_Compress := @Blake3_Compress_Sse2;
Blake3_HashMany := @Blake3_HashMany_Sse2;
@@ -722,14 +722,14 @@ procedure InitDispatch();
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.AVX2:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.AVX2:
begin
Blake3_Compress := @Blake3_Compress_Avx2;
Blake3_HashMany := @Blake3_HashMany_Avx2;
Blake3_ParallelDegree := 8;
end;
- TSimdLevel.SSE2, TSimdLevel.SSSE3:
+ TCpuSimdLevel.SSE2, TCpuSimdLevel.SSSE3:
begin
Blake3_Compress := @Blake3_Compress_Sse2;
Blake3_HashMany := @Blake3_HashMany_Sse2;
diff --git a/HashLib/src/Crypto/HlpSHA1Dispatch.pas b/HashLib/src/Crypto/HlpSHA1Dispatch.pas
index 03f376e1..510a0482 100644
--- a/HashLib/src/Crypto/HlpSHA1Dispatch.pas
+++ b/HashLib/src/Crypto/HlpSHA1Dispatch.pas
@@ -27,7 +27,7 @@ implementation
uses
HlpBits,
HlpConverters,
- HlpSimd;
+ HlpCpuFeatures;
// =============================================================================
// Scalar fallback implementation
@@ -175,33 +175,33 @@ procedure InitDispatch();
begin
SHA1_Compress := @SHA1_Compress_Scalar;
{$IFDEF HASHLIB_I386_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.SSSE3:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.SSSE3:
begin
SHA1_Compress := @SHA1_Compress_Ssse3_Wrap;
end;
- TSimdLevel.SSE2:
+ TCpuSimdLevel.SSE2:
begin
SHA1_Compress := @SHA1_Compress_Sse2;
end;
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
- if TSimd.HasSHANI() then
+ if TCpuFeatures.HasSHANI() then
begin
SHA1_Compress := @SHA1_Compress_ShaNi_Wrap;
Exit;
end;
- case TSimd.GetActiveLevel() of
- TSimdLevel.AVX2:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.AVX2:
begin
SHA1_Compress := @SHA1_Compress_Avx2_Wrap;
end;
- TSimdLevel.SSSE3:
+ TCpuSimdLevel.SSSE3:
begin
SHA1_Compress := @SHA1_Compress_Ssse3_Wrap;
end;
- TSimdLevel.SSE2:
+ TCpuSimdLevel.SSE2:
begin
SHA1_Compress := @SHA1_Compress_Sse2;
end;
diff --git a/HashLib/src/Crypto/HlpSHA2_256Dispatch.pas b/HashLib/src/Crypto/HlpSHA2_256Dispatch.pas
index 2e28ecf3..a30d1e2d 100644
--- a/HashLib/src/Crypto/HlpSHA2_256Dispatch.pas
+++ b/HashLib/src/Crypto/HlpSHA2_256Dispatch.pas
@@ -39,7 +39,7 @@ implementation
uses
HlpBits,
HlpConverters,
- HlpSimd;
+ HlpCpuFeatures;
// =============================================================================
// Scalar fallback implementation
@@ -185,33 +185,33 @@ procedure InitDispatch();
begin
SHA256_Compress := @SHA256_Compress_Scalar;
{$IFDEF HASHLIB_I386_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.SSSE3:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.SSSE3:
begin
SHA256_Compress := @SHA256_Compress_Ssse3_Wrap;
end;
- TSimdLevel.SSE2:
+ TCpuSimdLevel.SSE2:
begin
SHA256_Compress := @SHA256_Compress_Sse2_Wrap;
end;
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
- if TSimd.HasSHANI() then
+ if TCpuFeatures.HasSHANI() then
begin
SHA256_Compress := @SHA256_Compress_ShaNi_Wrap;
Exit;
end;
- case TSimd.GetActiveLevel() of
- TSimdLevel.AVX2:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.AVX2:
begin
SHA256_Compress := @SHA256_Compress_Avx2_Wrap;
end;
- TSimdLevel.SSSE3:
+ TCpuSimdLevel.SSSE3:
begin
SHA256_Compress := @SHA256_Compress_Ssse3_Wrap;
end;
- TSimdLevel.SSE2:
+ TCpuSimdLevel.SSE2:
begin
SHA256_Compress := @SHA256_Compress_Sse2_Wrap;
end;
diff --git a/HashLib/src/Crypto/HlpSHA2_512Dispatch.pas b/HashLib/src/Crypto/HlpSHA2_512Dispatch.pas
index cd7f8894..f5f6e0ab 100644
--- a/HashLib/src/Crypto/HlpSHA2_512Dispatch.pas
+++ b/HashLib/src/Crypto/HlpSHA2_512Dispatch.pas
@@ -63,7 +63,7 @@ implementation
uses
HlpBits,
HlpConverters,
- HlpSimd;
+ HlpCpuFeatures;
// =============================================================================
// Scalar fallback implementation
@@ -194,28 +194,28 @@ procedure InitDispatch();
begin
SHA512_Compress := @SHA512_Compress_Scalar;
{$IFDEF HASHLIB_I386_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.SSSE3:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.SSSE3:
begin
SHA512_Compress := @SHA512_Compress_Ssse3_Wrap;
end;
- TSimdLevel.SSE2:
+ TCpuSimdLevel.SSE2:
begin
SHA512_Compress := @SHA512_Compress_Sse2_Wrap;
end;
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.AVX2:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.AVX2:
begin
SHA512_Compress := @SHA512_Compress_Avx2_Wrap;
end;
- TSimdLevel.SSSE3:
+ TCpuSimdLevel.SSSE3:
begin
SHA512_Compress := @SHA512_Compress_Ssse3_Wrap;
end;
- TSimdLevel.SSE2:
+ TCpuSimdLevel.SSE2:
begin
SHA512_Compress := @SHA512_Compress_Sse2_Wrap;
end;
diff --git a/HashLib/src/Crypto/HlpSHA3Dispatch.pas b/HashLib/src/Crypto/HlpSHA3Dispatch.pas
index e8eda121..d10df621 100644
--- a/HashLib/src/Crypto/HlpSHA3Dispatch.pas
+++ b/HashLib/src/Crypto/HlpSHA3Dispatch.pas
@@ -18,7 +18,7 @@ implementation
uses
HlpBits,
HlpConverters,
- HlpSimd;
+ HlpCpuFeatures;
// =============================================================================
// Round constants
@@ -496,8 +496,8 @@ procedure InitDispatch();
KeccakF1600_Permute := @KeccakF1600_Scalar;
KeccakF1600_Absorb := @KeccakF1600_Absorb_Scalar;
{$IFDEF HASHLIB_X86_64_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.AVX2:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.AVX2:
begin
KeccakF1600_Permute := @KeccakF1600_Avx2_Wrap;
KeccakF1600_Absorb := @KeccakF1600_Avx2_Absorb_Wrap;
diff --git a/HashLib/src/Hash64/HlpXXHash3Dispatch.pas b/HashLib/src/Hash64/HlpXXHash3Dispatch.pas
index 3e696c7f..833e3751 100644
--- a/HashLib/src/Hash64/HlpXXHash3Dispatch.pas
+++ b/HashLib/src/Hash64/HlpXXHash3Dispatch.pas
@@ -22,7 +22,7 @@ interface
implementation
uses
- HlpSimd;
+ HlpCpuFeatures;
const
XXH_STRIPE_LEN = 64;
@@ -213,8 +213,8 @@ procedure InitDispatch();
XXH3_ScrambleAcc := @XXH3_ScrambleAcc_Scalar;
XXH3_InitSecret := @XXH3_InitSecret_Scalar;
{$IFDEF HASHLIB_I386_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.SSE2, TSimdLevel.SSSE3:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.SSE2, TCpuSimdLevel.SSSE3:
begin
XXH3_Accumulate512 := @XXH3_Accumulate512_Sse2;
XXH3_Accumulate := @XXH3_Accumulate_Sse2;
@@ -224,15 +224,15 @@ procedure InitDispatch();
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.AVX2:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.AVX2:
begin
XXH3_Accumulate512 := @XXH3_Accumulate512_Avx2;
XXH3_Accumulate := @XXH3_Accumulate_Avx2;
XXH3_ScrambleAcc := @XXH3_ScrambleAcc_Avx2;
XXH3_InitSecret := @XXH3_InitSecret_Avx2;
end;
- TSimdLevel.SSE2, TSimdLevel.SSSE3:
+ TCpuSimdLevel.SSE2, TCpuSimdLevel.SSSE3:
begin
XXH3_Accumulate512 := @XXH3_Accumulate512_Sse2;
XXH3_Accumulate := @XXH3_Accumulate_Sse2;
diff --git a/HashLib/src/Include/Simd/CpuDetect/CpuIdQuery.inc b/HashLib/src/Include/Simd/CpuFeatures/CpuIdQuery.inc
similarity index 100%
rename from HashLib/src/Include/Simd/CpuDetect/CpuIdQuery.inc
rename to HashLib/src/Include/Simd/CpuFeatures/CpuIdQuery.inc
diff --git a/HashLib/src/Include/Simd/CpuDetect/XGetBvQuery.inc b/HashLib/src/Include/Simd/CpuFeatures/XGetBvQuery.inc
similarity index 100%
rename from HashLib/src/Include/Simd/CpuDetect/XGetBvQuery.inc
rename to HashLib/src/Include/Simd/CpuFeatures/XGetBvQuery.inc
diff --git a/HashLib/src/KDF/HlpArgon2Dispatch.pas b/HashLib/src/KDF/HlpArgon2Dispatch.pas
index f1e7817e..0b7f8f58 100644
--- a/HashLib/src/KDF/HlpArgon2Dispatch.pas
+++ b/HashLib/src/KDF/HlpArgon2Dispatch.pas
@@ -14,7 +14,7 @@ implementation
uses
HlpBits,
- HlpSimd;
+ HlpCpuFeatures;
// =============================================================================
// Scalar fallback implementation
@@ -136,20 +136,20 @@ procedure InitDispatch();
begin
Argon2_FillBlock := @Argon2_FillBlock_Scalar;
{$IFDEF HASHLIB_I386_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.SSE2, TSimdLevel.SSSE3:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.SSE2, TCpuSimdLevel.SSSE3:
begin
Argon2_FillBlock := @Argon2_FillBlock_Sse2;
end;
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.AVX2:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.AVX2:
begin
Argon2_FillBlock := @Argon2_FillBlock_Avx2;
end;
- TSimdLevel.SSE2, TSimdLevel.SSSE3:
+ TCpuSimdLevel.SSE2, TCpuSimdLevel.SSSE3:
begin
Argon2_FillBlock := @Argon2_FillBlock_Sse2;
end;
diff --git a/HashLib/src/KDF/HlpScryptDispatch.pas b/HashLib/src/KDF/HlpScryptDispatch.pas
index 817f9755..b20ebe6c 100644
--- a/HashLib/src/KDF/HlpScryptDispatch.pas
+++ b/HashLib/src/KDF/HlpScryptDispatch.pas
@@ -17,7 +17,7 @@ implementation
uses
HlpBits,
- HlpSimd;
+ HlpCpuFeatures;
// =============================================================================
// Percival's (i*5 mod 16) permutation rearranges each 16-word Salsa20 state
@@ -201,20 +201,20 @@ procedure InitDispatch();
begin
Scrypt_SalsaXor := @Scrypt_SalsaXor_Scalar;
{$IFDEF HASHLIB_I386_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.SSE2, TSimdLevel.SSSE3:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.SSE2, TCpuSimdLevel.SSSE3:
begin
Scrypt_SalsaXor := @Scrypt_SalsaXor_Sse2;
end;
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
- case TSimd.GetActiveLevel() of
- TSimdLevel.AVX2:
+ case TCpuFeatures.GetActiveLevel() of
+ TCpuSimdLevel.AVX2:
begin
Scrypt_SalsaXor := @Scrypt_SalsaXor_Avx2;
end;
- TSimdLevel.SSE2, TSimdLevel.SSSE3:
+ TCpuSimdLevel.SSE2, TCpuSimdLevel.SSSE3:
begin
Scrypt_SalsaXor := @Scrypt_SalsaXor_Sse2;
end;
diff --git a/HashLib/src/Packages/Delphi/HashLib4PascalPackage.dpk b/HashLib/src/Packages/Delphi/HashLib4PascalPackage.dpk
index 1c58bd2d..cd361806 100644
--- a/HashLib/src/Packages/Delphi/HashLib4PascalPackage.dpk
+++ b/HashLib/src/Packages/Delphi/HashLib4PascalPackage.dpk
@@ -150,7 +150,7 @@ contains
HlpConverters in '..\..\Utils\HlpConverters.pas',
HlpBitConverter in '..\..\Utils\HlpBitConverter.pas',
HlpBits in '..\..\Utils\HlpBits.pas',
- HlpSimd in '..\..\Utils\HlpSimd.pas',
+ HlpCpuFeatures in '..\..\Utils\HlpCpuFeatures.pas',
HlpHashLibTypes in '..\..\Utils\HlpHashLibTypes.pas',
HlpArrayUtils in '..\..\Utils\HlpArrayUtils.pas';
diff --git a/HashLib/src/Packages/FPC/HashLib4PascalPackage.lpk b/HashLib/src/Packages/FPC/HashLib4PascalPackage.lpk
index 9412f44c..f0aa57d4 100644
--- a/HashLib/src/Packages/FPC/HashLib4PascalPackage.lpk
+++ b/HashLib/src/Packages/FPC/HashLib4PascalPackage.lpk
@@ -455,8 +455,8 @@
-
-
+
+
diff --git a/HashLib/src/Packages/FPC/HashLib4PascalPackage.pas b/HashLib/src/Packages/FPC/HashLib4PascalPackage.pas
index bcea8108..03da7cc7 100644
--- a/HashLib/src/Packages/FPC/HashLib4PascalPackage.pas
+++ b/HashLib/src/Packages/FPC/HashLib4PascalPackage.pas
@@ -28,7 +28,7 @@ interface
HlpArgon2TypeAndVersion, HlpPBKDF_Argon2NotBuildInAdapter,
HlpPBKDF_ScryptNotBuildInAdapter, HlpArrayUtils, HlpBlake2BP, HlpBlake2SP,
HlpSipHash128, HlpBlake2SParams, HlpBlake2BParams, HlpIBlake2SParams,
- HlpIBlake2BParams, HlpBlake3, HlpXXHash3, HlpXXHash128, HlpSimd,
+ HlpIBlake2BParams, HlpBlake3, HlpXXHash3, HlpXXHash128, HlpCpuFeatures,
HlpXXHash3Dispatch, HlpBlake2BDispatch, HlpBlake2SDispatch,
HlpArgon2Dispatch, HlpScryptDispatch, HlpBlake3Dispatch,
HlpSHA2_256Dispatch, HlpSHA2_512Dispatch, HlpSHA1Dispatch,
diff --git a/HashLib/src/Utils/HlpSimd.pas b/HashLib/src/Utils/HlpCpuFeatures.pas
similarity index 73%
rename from HashLib/src/Utils/HlpSimd.pas
rename to HashLib/src/Utils/HlpCpuFeatures.pas
index d3d2ad33..b7909ed2 100644
--- a/HashLib/src/Utils/HlpSimd.pas
+++ b/HashLib/src/Utils/HlpCpuFeatures.pas
@@ -1,15 +1,15 @@
-unit HlpSimd;
+unit HlpCpuFeatures;
{$I ..\Include\HashLib.inc}
interface
type
- TSimdLevel = (Scalar, SSE2, SSSE3, AVX2);
+ TCpuSimdLevel = (Scalar, SSE2, SSSE3, AVX2);
- TSimd = class sealed
+ TCpuFeatures = class sealed
private
- class var FDetectedLevel: TSimdLevel;
+ class var FDetectedLevel: TCpuSimdLevel;
class var FHasSHANI: Boolean;
class var FHasPCLMULQDQ: Boolean;
class var FHasVPCLMULQDQ: Boolean;
@@ -21,7 +21,7 @@ TSimd = class sealed
class function CPUHasVPCLMULQDQ(): Boolean; static;
class procedure DetectFeatures(); static;
public
- class function GetActiveLevel(): TSimdLevel; static;
+ class function GetActiveLevel(): TCpuSimdLevel; static;
class function HasSHANI(): Boolean; static;
class function HasPCLMULQDQ(): Boolean; static;
class function HasVPCLMULQDQ(): Boolean; static;
@@ -37,18 +37,18 @@ TCpuIdResult = record
end;
procedure CpuIdQuery(ALeaf, ASubLeaf: UInt32; AResult: Pointer);
- {$I ..\Include\Simd\CpuDetect\CpuIdQuery.inc}
+ {$I ..\Include\Simd\CpuFeatures\CpuIdQuery.inc}
end;
procedure XGetBvQuery(AResult: Pointer);
- {$I ..\Include\Simd\CpuDetect\XGetBvQuery.inc}
+ {$I ..\Include\Simd\CpuFeatures\XGetBvQuery.inc}
end;
{$ENDIF}
-{ TSimd }
+{ TCpuFeatures }
-class function TSimd.CPUHasSSE2(): Boolean;
+class function TCpuFeatures.CPUHasSSE2(): Boolean;
{$IFDEF HASHLIB_X86_SIMD}
var
LCpuId: TCpuIdResult;
@@ -62,7 +62,7 @@ class function TSimd.CPUHasSSE2(): Boolean;
{$ENDIF}
end;
-class function TSimd.CPUHasSSSE3(): Boolean;
+class function TCpuFeatures.CPUHasSSSE3(): Boolean;
{$IFDEF HASHLIB_X86_SIMD}
var
LCpuId: TCpuIdResult;
@@ -77,7 +77,7 @@ class function TSimd.CPUHasSSSE3(): Boolean;
{$ENDIF}
end;
-class function TSimd.CPUHasAVX2(): Boolean;
+class function TCpuFeatures.CPUHasAVX2(): Boolean;
{$IFDEF HASHLIB_X86_SIMD}
var
LCpuId: TCpuIdResult;
@@ -110,7 +110,7 @@ class function TSimd.CPUHasAVX2(): Boolean;
{$ENDIF}
end;
-class function TSimd.CPUHasSHANI(): Boolean;
+class function TCpuFeatures.CPUHasSHANI(): Boolean;
{$IFDEF HASHLIB_X86_SIMD}
var
LCpuId: TCpuIdResult;
@@ -129,7 +129,7 @@ class function TSimd.CPUHasSHANI(): Boolean;
{$ENDIF}
end;
-class function TSimd.CPUHasPCLMULQDQ(): Boolean;
+class function TCpuFeatures.CPUHasPCLMULQDQ(): Boolean;
{$IFDEF HASHLIB_X86_SIMD}
var
LCpuId: TCpuIdResult;
@@ -144,7 +144,7 @@ class function TSimd.CPUHasPCLMULQDQ(): Boolean;
{$ENDIF}
end;
-class function TSimd.CPUHasVPCLMULQDQ(): Boolean;
+class function TCpuFeatures.CPUHasVPCLMULQDQ(): Boolean;
{$IFDEF HASHLIB_X86_SIMD}
var
LCpuId: TCpuIdResult;
@@ -159,23 +159,23 @@ class function TSimd.CPUHasVPCLMULQDQ(): Boolean;
{$ENDIF}
end;
-class procedure TSimd.DetectFeatures();
+class procedure TCpuFeatures.DetectFeatures();
begin
- FDetectedLevel := TSimdLevel.Scalar;
+ FDetectedLevel := TCpuSimdLevel.Scalar;
FHasSHANI := False;
FHasPCLMULQDQ := False;
FHasVPCLMULQDQ := False;
if CPUHasSSE2() then
begin
- FDetectedLevel := TSimdLevel.SSE2;
+ FDetectedLevel := TCpuSimdLevel.SSE2;
FHasPCLMULQDQ := CPUHasPCLMULQDQ();
if CPUHasSSSE3() then
begin
- FDetectedLevel := TSimdLevel.SSSE3;
+ FDetectedLevel := TCpuSimdLevel.SSSE3;
if CPUHasAVX2() then
begin
- FDetectedLevel := TSimdLevel.AVX2;
+ FDetectedLevel := TCpuSimdLevel.AVX2;
FHasVPCLMULQDQ := CPUHasVPCLMULQDQ();
end;
end;
@@ -185,46 +185,46 @@ class procedure TSimd.DetectFeatures();
// Cap based on user force defines
{$IF DEFINED(HASHLIB_FORCE_SCALAR)}
- FDetectedLevel := TSimdLevel.Scalar;
+ FDetectedLevel := TCpuSimdLevel.Scalar;
FHasSHANI := False;
FHasPCLMULQDQ := False;
FHasVPCLMULQDQ := False;
{$ELSEIF DEFINED(HASHLIB_FORCE_SSE2)}
- if FDetectedLevel > TSimdLevel.SSE2 then
- FDetectedLevel := TSimdLevel.SSE2;
+ if FDetectedLevel > TCpuSimdLevel.SSE2 then
+ FDetectedLevel := TCpuSimdLevel.SSE2;
FHasSHANI := False;
FHasPCLMULQDQ := False;
FHasVPCLMULQDQ := False;
{$ELSEIF DEFINED(HASHLIB_FORCE_SSSE3)}
- if FDetectedLevel > TSimdLevel.SSSE3 then
- FDetectedLevel := TSimdLevel.SSSE3;
+ if FDetectedLevel > TCpuSimdLevel.SSSE3 then
+ FDetectedLevel := TCpuSimdLevel.SSSE3;
FHasSHANI := False;
FHasPCLMULQDQ := False;
FHasVPCLMULQDQ := False;
{$IFEND}
end;
-class function TSimd.GetActiveLevel(): TSimdLevel;
+class function TCpuFeatures.GetActiveLevel(): TCpuSimdLevel;
begin
Result := FDetectedLevel;
end;
-class function TSimd.HasSHANI(): Boolean;
+class function TCpuFeatures.HasSHANI(): Boolean;
begin
Result := FHasSHANI;
end;
-class function TSimd.HasPCLMULQDQ(): Boolean;
+class function TCpuFeatures.HasPCLMULQDQ(): Boolean;
begin
Result := FHasPCLMULQDQ;
end;
-class function TSimd.HasVPCLMULQDQ(): Boolean;
+class function TCpuFeatures.HasVPCLMULQDQ(): Boolean;
begin
Result := FHasVPCLMULQDQ;
end;
initialization
- TSimd.DetectFeatures();
+ TCpuFeatures.DetectFeatures();
end.