builds

Author: edanuff

boards/a2n20v1/a2n20v1.gprj

@@ -34,10 +34,13 @@
         <File path="../../hdl/memory/a2mem_if.sv" type="file.verilog" enable="1"/>
         <File path="../../hdl/memory/apple_memory.sv" type="file.verilog" enable="1"/>
         <File path="../../hdl/mockingboard/mockingboard.sv" type="file.verilog" enable="1"/>
+        <File path="../../hdl/sound/apple_speaker.sv" type="file.verilog" enable="1"/>
+        <File path="../../hdl/sound/audio_out.v" type="file.verilog" enable="1"/>
         <File path="../../hdl/ssc/ssc_rom.vhd" type="file.vhdl" enable="1"/>
         <File path="../../hdl/ssc/super_serial_card.sv" type="file.verilog" enable="1"/>
         <File path="../../hdl/supersprite/supersprite.sv" type="file.verilog" enable="1"/>
         <File path="../../hdl/support/cdc.sv" type="file.verilog" enable="1"/>
+        <File path="../../hdl/support/iir_filter.v" type="file.verilog" enable="1"/>
         <File path="../../hdl/support/sdpram32.sv" type="file.verilog" enable="1"/>
         <File path="../../hdl/support/uart_6551.v" type="file.verilog" enable="1"/>
         <File path="../../hdl/support/uart_rx.v" type="file.verilog" enable="1"/>

boards/a2n20v1/impl/pnr/a2n20v1.fs

@@ -50,15 +50,15 @@ <h1><a name="Message">Pin Messages</a></h1>
 </tr>
 <tr>
 <td class="label">Design File</td>
-<td>D:\Gowin\Projects\a2fpga_core\boards\a2n20v1\impl\gwsynthesis\a2n20v1.vg</td>
+<td>C:\Users\ed\GitHub\a2fpga_core\boards\a2n20v1\impl\gwsynthesis\a2n20v1.vg</td>
 </tr>
 <tr>
 <td class="label">Physical Constraints File</td>
-<td>D:\Gowin\Projects\a2fpga_core\boards\a2n20v1\hdl\a2n20v1.cst</td>
+<td>C:\Users\ed\GitHub\a2fpga_core\boards\a2n20v1\hdl\a2n20v1.cst</td>
 </tr>
 <tr>
 <td class="label">Timing Constraints File</td>
-<td>D:\Gowin\Projects\a2fpga_core\boards\a2n20v1\hdl\a2n20v1.sdc</td>
+<td>C:\Users\ed\GitHub\a2fpga_core\boards\a2n20v1\hdl\a2n20v1.sdc</td>
 </tr>
 <tr>
 <td class="label">Version</td>
@@ -78,7 +78,7 @@ <h1><a name="Message">Pin Messages</a></h1>
 </tr>
 <tr>
 <td class="label">Created Time</td>
-<td>Mon Feb 19 17:41:03 2024
+<td>Thu Apr 25 18:57:02 2024
 </td>
 </tr>
 <tr>

boards/a2n20v1/impl/pnr/a2n20v1.pin.html

@@ -59,15 +59,15 @@ <h1><a name="Message">Power Messages</a></h1>
 </tr>
 <tr>
 <td class="label">Design File</td>
-<td>D:\Gowin\Projects\a2fpga_core\boards\a2n20v1\impl\gwsynthesis\a2n20v1.vg</td>
+<td>C:\Users\ed\GitHub\a2fpga_core\boards\a2n20v1\impl\gwsynthesis\a2n20v1.vg</td>
 </tr>
 <tr>
 <td class="label">Physical Constraints File</td>
-<td>D:\Gowin\Projects\a2fpga_core\boards\a2n20v1\hdl\a2n20v1.cst</td>
+<td>C:\Users\ed\GitHub\a2fpga_core\boards\a2n20v1\hdl\a2n20v1.cst</td>
 </tr>
 <tr>
 <td class="label">Timing Constraints File</td>
-<td>D:\Gowin\Projects\a2fpga_core\boards\a2n20v1\hdl\a2n20v1.sdc</td>
+<td>C:\Users\ed\GitHub\a2fpga_core\boards\a2n20v1\hdl\a2n20v1.sdc</td>
 </tr>
 <tr>
 <td class="label">Version</td>
@@ -87,7 +87,7 @@ <h1><a name="Message">Power Messages</a></h1>
 </tr>
 <tr>
 <td class="label">Created Time</td>
-<td>Mon Feb 19 17:41:03 2024
+<td>Thu Apr 25 18:57:02 2024
 </td>
 </tr>
 <tr>
@@ -100,30 +100,30 @@ <h2><a name="Power_Info">Power Information:</a></h2>
 <table class="summary_table">
 <tr>
 <td class="label">Total Power (mW)</td>
-<td>375.830</td>
+<td>382.217</td>
 </tr>
 <tr>
 <td class="label">Quiescent Power (mW)</td>
 <td>93.224</td>
 </tr>
 <tr>
 <td class="label">Dynamic Power (mW)</td>
-<td>282.606</td>
+<td>288.993</td>
 </tr>
 </table>
 <h2><a name="Thermal_Info">Thermal Information:</a></h2>
 <table class="summary_table">
 <tr>
 <td class="label">Junction Temperature</td>
-<td>36.215</td>
+<td>36.405</td>
 </tr>
 <tr>
 <td class="label">Theta JA</td>
 <td>29.840</td>
 </tr>
 <tr>
 <td class="label">Max Allowed Ambient Temperature</td>
-<td>73.785</td>
+<td>73.595</td>
 </tr>
 </table>
 <h2><a name="Configure_Info">Configure Information:</a></h2>
@@ -192,9 +192,9 @@ <h2><a name="Supply_Summary">Supply Information:</a></h2>
 <tr>
 <td>VCC</td>
 <td>1.000</td>
-<td>272.070</td>
+<td>278.457</td>
 <td>61.515</td>
-<td>333.585</td>
+<td>339.973</td>
 </tr>
 <tr>
 <td>VCCX</td>
@@ -222,9 +222,9 @@ <h2><a name="By_Block_Type">Power By Block Type:</a></h2>
 </tr>
 <tr>
 <td>Logic</td>
-<td>4.921</td>
+<td>6.224</td>
 <td>NA</td>
-<td>5.537</td>
+<td>5.219</td>
 </tr>
 <tr>
 <td>IO</td>
@@ -234,7 +234,7 @@ <h2><a name="By_Block_Type">Power By Block Type:</a></h2>
 </tr>
 <tr>
 <td>BSRAM</td>
-<td>244.447
+<td>247.558
 <td>NA</td>
 <td>NA</td>
 </tr>
@@ -246,9 +246,9 @@ <h2><a name="By_Block_Type">Power By Block Type:</a></h2>
 </tr>
 <tr>
 <td>DSP</td>
-<td>1.033
+<td>3.007
 <td>NA</td>
-<td>4.123
+<td>2.816
 </tr>
 </table>
 <h2><a name="By_Hierarchy">Power By Hierarchy:</a></h2>
@@ -260,33 +260,69 @@ <h2><a name="By_Hierarchy">Power By Hierarchy:</a></h2>
 </tr>
 <tr>
 <td>top</td>
-<td>270.171</td>
-<td>270.171(269.846)</td>
+<td>276.558</td>
+<td>276.558(276.299)</td>
 <tr>
 <td>top/apple_bus/</td>
-<td>0.099</td>
-<td>0.099(0.000)</td>
+<td>0.098</td>
+<td>0.098(0.000)</td>
 <tr>
 <td>top/apple_memory/</td>
-<td>206.254</td>
-<td>206.254(206.200)</td>
+<td>209.412</td>
+<td>209.412(209.324)</td>
 <tr>
-<td>top/apple_memory/hires_aux/</td>
-<td>115.875</td>
-<td>115.875(0.000)</td>
+<td>top/apple_memory/hires_aux_2000_5FFF/</td>
+<td>59.500</td>
+<td>59.500(0.000)</td>
 <tr>
-<td>top/apple_memory/hires_main/</td>
+<td>top/apple_memory/hires_aux_6000_9FFF/</td>
+<td>59.499</td>
+<td>59.499(0.000)</td>
+<tr>
+<td>top/apple_memory/hires_main_2000_5FFF/</td>
 <td>59.498</td>
 <td>59.498(0.000)</td>
 <tr>
 <td>top/apple_memory/text_vram/</td>
 <td>30.827</td>
 <td>30.827(0.000)</td>
 <tr>
+<td>top/apple_speaker/</td>
+<td>0.027</td>
+<td>0.027(0.000)</td>
+<tr>
 <td>top/apple_video/</td>
 <td>0.552</td>
 <td>0.552(0.000)</td>
 <tr>
+<td>top/audio_out/</td>
+<td>3.271</td>
+<td>3.271(3.166)</td>
+<tr>
+<td>top/audio_out/IIR_filter/</td>
+<td>2.633</td>
+<td>2.633(0.551)</td>
+<tr>
+<td>top/audio_out/IIR_filter/iir_tap_0/</td>
+<td>0.258</td>
+<td>0.258(0.000)</td>
+<tr>
+<td>top/audio_out/IIR_filter/iir_tap_1/</td>
+<td>0.190</td>
+<td>0.190(0.000)</td>
+<tr>
+<td>top/audio_out/IIR_filter/iir_tap_2/</td>
+<td>0.103</td>
+<td>0.103(0.000)</td>
+<tr>
+<td>top/audio_out/dcb_l/</td>
+<td>0.267</td>
+<td>0.267(0.000)</td>
+<tr>
+<td>top/audio_out/dcb_r/</td>
+<td>0.267</td>
+<td>0.267(0.000)</td>
+<tr>
 <td>top/cdc_phi1/</td>
 <td>0.001</td>
 <td>0.001(0.000)</td>
@@ -301,16 +337,16 @@ <h2><a name="By_Hierarchy">Power By Hierarchy:</a></h2>
 <tr>
 <td>top/hdmi/</td>
 <td>0.502</td>
-<td>0.502(0.463)</td>
+<td>0.502(0.464)</td>
 <tr>
 <td>top/hdmi/tmds_gen[0].tmds_channel/</td>
-<td>0.054</td>
-<td>0.054(0.000)</td>
-<tr>
-<td>top/hdmi/tmds_gen[1].tmds_channel/</td>
 <td>0.053</td>
 <td>0.053(0.000)</td>
 <tr>
+<td>top/hdmi/tmds_gen[1].tmds_channel/</td>
+<td>0.051</td>
+<td>0.051(0.000)</td>
+<tr>
 <td>top/hdmi/tmds_gen[2].tmds_channel/</td>
 <td>0.052</td>
 <td>0.052(0.000)</td>
@@ -320,76 +356,76 @@ <h2><a name="By_Hierarchy">Power By Hierarchy:</a></h2>
 <td>0.108(0.000)</td>
 <tr>
 <td>top/hdmi/true_hdmi_output.packet_picker/</td>
-<td>0.197</td>
-<td>0.197(0.048)</td>
+<td>0.199</td>
+<td>0.199(0.048)</td>
 <tr>
 <td>top/hdmi/true_hdmi_output.packet_picker/audio_clock_regeneration_packet/</td>
 <td>0.048</td>
 <td>0.048(0.000)</td>
 <tr>
 <td>top/mockingboard/</td>
-<td>1.057</td>
-<td>1.057(1.057)</td>
+<td>1.056</td>
+<td>1.056(1.056)</td>
 <tr>
 <td>top/mockingboard/m6522_left/</td>
-<td>0.191</td>
-<td>0.191(0.000)</td>
+<td>0.192</td>
+<td>0.192(0.000)</td>
 <tr>
 <td>top/mockingboard/m6522_right/</td>
-<td>0.189</td>
-<td>0.189(0.000)</td>
+<td>0.191</td>
+<td>0.191(0.000)</td>
 <tr>
 <td>top/mockingboard/psg_left/</td>
-<td>0.339</td>
-<td>0.339(0.000)</td>
+<td>0.338</td>
+<td>0.338(0.000)</td>
 <tr>
 <td>top/mockingboard/psg_right/</td>
-<td>0.337</td>
-<td>0.337(0.000)</td>
+<td>0.336</td>
+<td>0.336(0.000)</td>
 <tr>
 <td>top/supersprite/</td>
-<td>41.539</td>
-<td>41.539(41.459)</td>
+<td>41.538</td>
+<td>41.538(41.458)</td>
 <tr>
 <td>top/supersprite/ssp_psg/</td>
-<td>0.339</td>
-<td>0.339(0.000)</td>
+<td>0.341</td>
+<td>0.341(0.000)</td>
 <tr>
 <td>top/supersprite/vdp/</td>
-<td>41.120</td>
-<td>41.120(41.120)</td>
+<td>41.118</td>
+<td>41.118(41.118)</td>
 <tr>
 <td>top/supersprite/vdp/f18a_core/</td>
-<td>41.120</td>
-<td>41.120(41.118)</td>
+<td>41.118</td>
+<td>41.118(41.115)</td>
 <tr>
 <td>top/supersprite/vdp/f18a_core/inst_color/</td>
 <td>0.036</td>
 <td>0.036(0.000)</td>
 <tr>
 <td>top/supersprite/vdp/f18a_core/inst_counters/</td>
-<td>0.062</td>
-<td>0.062(0.000)</td>
+<td>0.063</td>
+<td>0.063(0.000)</td>
 <tr>
 <td>top/supersprite/vdp/f18a_core/inst_cpu/</td>
 <td>0.598</td>
 <td>0.598(0.000)</td>
 <tr>
 <td>top/supersprite/vdp/f18a_core/inst_sprites/</td>
-<td>8.540</td>
-<td>8.540(0.000)</td>
+<td>8.543</td>
+<td>8.543(0.000)</td>
 <tr>
 <td>top/supersprite/vdp/f18a_core/inst_tiles/</td>
-<td>2.174</td>
-<td>2.174(0.314)</td>
+<td>2.166</td>
+<td>2.166(0.314)</td>
 <tr>
 <td>top/supersprite/vdp/f18a_core/inst_tiles/inst_linebuf/</td>
 <td>0.314</td>
 <td>0.314(0.000)</td>
 <tr>
 <td>top/supersprite/vdp/f18a_core/inst_vga_cont/</td>
-<td>0.001</td>
-<td>0.001(0.000)</td>
+<td>0.002</td>
+<td>0.002(0.000)</td>
 <tr>
 <td>top/supersprite/vdp/f18a_core/inst_vram/</td>
 <td>29.706</td>
@@ -413,12 +449,12 @@ <h2><a name="By_Clock_Domain">Power By Clock Domain:</a></h2>
 <tr>
 <td>clk_pixel</td>
 <td>27.000</td>
-<td>15.562</td>
+<td>18.784</td>
 </tr>
 <tr>
 <td>clk_logic</td>
 <td>54.000</td>
-<td>248.982</td>
+<td>252.147</td>
 </tr>
 <tr>
 <td>NO CLOCK DOMAIN</td>