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Some ESP32-S3 Adjustments

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@PaintYourDragon PaintYourDragon released this 29 Aug 00:19
· 29 commits to master since this release
c9c1189

GPIO drive strength is changed. Pixel clock is reduced slightly from 20 MHz to ~17.8 MHz. This should be less prone to visual glitches, though refresh rate might be affected with long chains and/or high bit depths. If this is an issue, reducing bit depth by 1 can help.

Changes here apply to ESP32-S3 only; no other devices are affected.