Skip to content

Documentation and README fixes #1851

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 5 commits into
base: main
Choose a base branch
from
Open

Documentation and README fixes #1851

wants to merge 5 commits into from

Conversation

IuliaCMoldovan
Copy link
Contributor

PR Description

Multiple doc and README fixes.

PR Type

  • Bug fix (change that fixes an issue)
  • New feature (change that adds new functionality)
  • Breaking change (has dependencies in other repos or will cause CI to fail)
  • Documentation

PR Checklist

  • I have followed the code style guidelines
  • I have performed a self-review of changes
  • I have compiled all hdl projects and libraries affected by this PR
  • I have tested in hardware affected projects, at least on relevant boards
  • I have commented my code, at least hard-to-understand parts
  • I have signed off all commits from this PR
  • I have updated the documentation (wiki pages, ReadMe files, Copyright etc)
  • I have not introduced new Warnings/Critical Warnings on compilation
  • I have added new hdl testbenches or updated existing ones

Copy link
Contributor Author

@IuliaCMoldovan IuliaCMoldovan Jul 24, 2025

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

@StancaPop, I think it would be wise now (since this just became bigger) to switch to the initial thought we had about the list tables... to turn them into smaller tables like this. My bad

@IuliaCMoldovan IuliaCMoldovan force-pushed the doc_add_details branch 2 times, most recently from 233aeaf to 45e6102 Compare July 25, 2025 13:12
docs/projects/ad9081_fmca_ebz: Add Versal GPIOs and restructure table
docs/projects/ad9209_fmca_ebz: Add Versal GPIOs and restructure table
docs/user_guide/architecture: Add Versal GPIO information

Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
- 42:32
- 120:110
=========== ========= ======= =======
GPIO signal Direction HDL nb. Versal
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Maybe replace "HDL nb." with "HDL no." or just "HDL"?

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants