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iio: adc: Add initial driver support for MAX14001/MAX14002
The MAX14001/MAX14002 are configurable, isolated 10-bit ADCs for multi-range binary inputs. Datasheet: Link: https://www.analog.com/media/en/technical-documentation/data-sheets/MAX14001-MAX14002.pdf
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arch/arm/boot/dts/overlays/Makefile

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@@ -309,6 +309,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
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rpi-ltc2991.dtbo \
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rpi-ltc4162.dtbo \
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rpi-ltc6952.dtbo \
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rpi-max14001.dtbo \
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rpi-max14830-i2c.dtbo \
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rpi-max14830-spi.dtbo \
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rpi-max31335.dtbo \
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Overlay for the MAX14001 ADC
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*
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* Copyright (c) 2025 Marilene Andrade Garcia <marilene.agarcia@gmail.com>
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*
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* Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/MAX14001-MAX14002.pdf
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*/
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/dts-v1/;
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/plugin/;
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/ {
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compatible = "brcm,bcm2712";
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vdd: fixedregulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "fixed-supply";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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enable-active-high;
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status = "okay";
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};
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};
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&spi0 {
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status = "okay";
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max14001: max14001@0 {
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compatible = "max14001";
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reg = <0>;
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spi-max-frequency = <5000000>;
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status = "okay";
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};
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};

drivers/iio/adc/Kconfig

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@@ -1126,6 +1126,16 @@ config MAX1363
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To compile this driver as a module, choose M here: the module will be
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called max1363.
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config MAX14001
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tristate "Analog Devices MAX14001/MAX14002 ADCs driver"
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depends on SPI
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help
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Say yes here to build support for Analog Devices MAX14001/MAX14002
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Configurable, Isolated 10-bit ADCs for Multi-Range Binary Inputs.
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To compile this driver as a module, choose M here: the module will be
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called max14001.
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config MAX77541_ADC
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tristate "Analog Devices MAX77541 ADC driver"
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depends on MFD_MAX77541

drivers/iio/adc/Makefile

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@@ -156,6 +156,7 @@ obj-$(CONFIG_MAX11205) += max11205.o
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obj-$(CONFIG_MAX11410) += max11410.o
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obj-$(CONFIG_MAX1241) += max1241.o
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obj-$(CONFIG_MAX1363) += max1363.o
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obj-$(CONFIG_MAX14001) += max14001.o
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obj-$(CONFIG_MAX77541_ADC) += max77541-adc.o
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obj-$(CONFIG_MAX9611) += max9611.o
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obj-$(CONFIG_MCP320X) += mcp320x.o

drivers/iio/adc/max14001.c

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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* MAX14001/MAX14002 SPI ADC driver
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*
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* Copyright (c) 2025 Marilene Andrade Garcia <marilene.agarcia@gmail.com>
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*
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* Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/MAX14001-MAX14002.pdf
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*/
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#include <asm/unaligned.h>
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#include <linux/bitfield.h>
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#include <linux/bitrev.h>
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#include <linux/module.h>
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#include <linux/spi/spi.h>
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#include <linux/iio/iio.h>
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#include <linux/of.h>
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/* MAX14001 registers definition */
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#define MAX14001_REG_ADC 0x00
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#define MAX14001_REG_FADC 0x01
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#define MAX14001_REG_FLAGS 0x02
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#define MAX14001_REG_FLTEN 0x03
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#define MAX14001_REG_THL 0x04
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#define MAX14001_REG_THU 0x05
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#define MAX14001_REG_INRR 0x06
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#define MAX14001_REG_INRT 0x07
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#define MAX14001_REG_INRP 0x08
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#define MAX14001_REG_CFG 0x09
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#define MAX14001_REG_ENBL 0x0A
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#define MAX14001_REG_ACT 0x0B
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#define MAX14001_REG_WEN 0x0C
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/* MAX14001 verification registers definition */
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#define MAX14001_REG_VERIFICATION(x) (0x10 + (x))
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#define MAX14001_REG_FLTV 0x13
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#define MAX14001_REG_THLV 0x14
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#define MAX14001_REG_THUV 0x15
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#define MAX14001_REG_INRRV 0x16
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#define MAX14001_REG_INRTV 0x17
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#define MAX14001_REG_INRPV 0x18
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#define MAX14001_REG_CFGV 0x19
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#define MAX14001_REG_ENBLV 0x1A
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/* MAX14001 CONTROL values*/
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#define MAX14001_REG_WRITE 0x1
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#define MAX14001_REG_READ 0x0
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/* MAX14001 MASKS */
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#define MAX14001_MASK_ADDR GENMASK(15,11)
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#define MAX14001_MASK_WR BIT(10)
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#define MAX14001_MASK_DATA GENMASK(9,0)
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/* MAX14001_REG_FLAGS MASKS */
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#define MAX14001_MASK_FLAGS_ADC BIT(1)
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#define MAX14001_MASK_FLAGS_INRD BIT(2)
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#define MAX14001_MASK_FLAGS_SPI BIT(3)
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#define MAX14001_MASK_FLAGS_COM BIT(4)
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#define MAX14001_MASK_FLAGS_CRCL BIT(5)
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#define MAX14001_MASK_FLAGS_CRCF BIT(6)
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#define MAX14001_MASK_FLAGS_FET BIT(7)
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#define MAX14001_MASK_FLAGS_MV BIT(8)
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/* MAX14001_REG_FLTEN MASKS */
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#define MAX14001_MASK_FLTEN_DYEN BIT(0)
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#define MAX14001_MASK_FLTEN_EADC BIT(1)
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#define MAX14001_MASK_FLTEN_EINRD BIT(2)
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#define MAX14001_MASK_FLTEN_ESPI BIT(3)
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#define MAX14001_MASK_FLTEN_ECOM BIT(4)
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#define MAX14001_MASK_FLTEN_ECRCL BIT(5)
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#define MAX14001_MASK_FLTEN_ECRCF BIT(6)
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#define MAX14001_MASK_FLTEN_EFET BIT(7)
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#define MAX14001_MASK_FLTEN_EMV BIT(8)
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/* MAX14001_REG_WEN values*/
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#define MAX14001_REG_WEN_WRITE_ENABLE 0x294
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#define MAX14001_REG_WEN_WRITE_DISABLE 0x0
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enum max14001_chips {
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max14001,
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max14002,
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};
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struct max14001_state {
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struct spi_device *spi;
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};
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static int max14001_spi_read(struct max14001_state *st, u16 reg, u16 *val)
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{
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u16 tx = 0;
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u16 rx = 0;
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u16 reversed = 0;
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int ret = 0;
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pr_err("[Log Debug] max14001_spi_read: reg: %x, val: %x\n", reg, *val);
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tx |= FIELD_PREP(MAX14001_MASK_ADDR, reg);
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tx |= FIELD_PREP(MAX14001_MASK_WR, MAX14001_REG_READ);
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reversed = bitrev16(tx);
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ret = spi_write_then_read(st->spi, &reversed, 2, &rx, 2);
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if (ret < 0)
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return ret;
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reversed = bitrev16(be16_to_cpu(rx));
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*val = MAX14001_MASK_ADDR&reversed;
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return ret;
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}
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static int max14001_spi_write(struct max14001_state *st, u16 reg, u16 val)
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{
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u16 tx =0;
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u16 msg = 0;
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u16 reversed = 0;
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int ret = 0;
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pr_err("[Log Debug] max14001_spi_write: reg: %x, val: %x\n", reg, val);
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struct spi_transfer xfer = {
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.tx_buf = NULL,
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.len = 0,
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};
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msg |= FIELD_PREP(MAX14001_MASK_ADDR, reg);
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msg |= FIELD_PREP(MAX14001_MASK_WR, MAX14001_REG_WRITE);
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msg |= FIELD_PREP(MAX14001_MASK_DATA, val);
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reversed = bitrev16(msg);
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put_unaligned_be16(reversed, &tx);
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xfer.tx_buf = &tx;
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xfer.len = sizeof(tx);
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pr_err("[Log Debug] max14001_spi_write: msg: %x, tx: %x\n", msg, tx);
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ret = spi_sync_transfer(st->spi, &xfer, 1);
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if (ret < 0)
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return ret;
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return ret;
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}
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static int max14001_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct max14001_state *st = iio_priv(indio_dev);
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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pr_err("[Log Debug] max14001_read_raw: IIO_CHAN_INFO_RAW\n");
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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pr_err("[Log Debug] max14001_read_raw: IIO_CHAN_INFO_SCALE\n");
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return IIO_VAL_INT;
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}
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return -EINVAL;
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}
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static int max14001_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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{
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struct max14001_state *st = iio_priv(indio_dev);
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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pr_err("[Log Debug] max14001_write_raw: IIO_CHAN_INFO_RAW\n");
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return 0;
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}
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return -EINVAL;
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}
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static const struct iio_info max14001_info = {
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.read_raw = max14001_read_raw,
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.write_raw = max14001_write_raw,
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};
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static const struct iio_chan_spec max14001_channel_voltage[] = {
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{
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.type = IIO_VOLTAGE,
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.indexed = 1,
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.channel = 0,
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.output = 0,
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
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BIT(IIO_CHAN_INFO_SCALE),
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}
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};
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static const struct iio_chan_spec max14001_channel_current[] = {
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{
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.type = IIO_CURRENT,
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.indexed = 1,
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.channel = 0,
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.output = 0,
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
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BIT(IIO_CHAN_INFO_SCALE),
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}
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};
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static int max14001_probe(struct spi_device *spi)
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{
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pr_err("[Log Debug] max14001_probe\n");
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struct max14001_state *st;
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struct iio_dev *indio_dev;
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bool current_channel = false;
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int ret;
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indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
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if (!indio_dev)
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return -ENOMEM;
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st = iio_priv(indio_dev);
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st->spi = spi;
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indio_dev->name = "max14001"; //spi_get_device_id(spi)->name;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->info = &max14001_info;
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for_each_available_child_of_node_scoped(spi->dev.of_node, child){
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current_channel = of_property_read_bool(child, "current-channel");
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if (current_channel)
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break;
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}
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if(current_channel){
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indio_dev->channels = max14001_channel_current;
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indio_dev->num_channels = ARRAY_SIZE(max14001_channel_current);
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} else {
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indio_dev->channels = max14001_channel_voltage;
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indio_dev->num_channels = ARRAY_SIZE(max14001_channel_voltage);
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}
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//Enable register write
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max14001_spi_write(st, MAX14001_REG_WEN, MAX14001_REG_WEN_WRITE_ENABLE);
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return devm_iio_device_register(&spi->dev, indio_dev);
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}
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static const struct spi_device_id max14001_id_table[] = {
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{ "max14001", max14001 },
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{ "max14002", max14002 },
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{}
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};
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MODULE_DEVICE_TABLE(spi, max14001_id_table);
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static const struct of_device_id max14001_of_match[] = {
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{ .compatible = "adi,max14001" },
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{ .compatible = "adi,max14002" },
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{}
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};
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MODULE_DEVICE_TABLE(of, max14001_of_match);
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static struct spi_driver max14001_driver = {
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.driver = {
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.name = "max14001",
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.of_match_table = max14001_of_match,
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},
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.probe = max14001_probe,
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.id_table = max14001_id_table,
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};
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module_spi_driver(max14001_driver);
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MODULE_AUTHOR("Marilene Andrade Garcia <marilene.agarcia@gmail.com>");
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MODULE_DESCRIPTION("Analog Devices MAX14001/MAX14002 ADCs driver");
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MODULE_LICENSE("GPL v2");

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