Skip to content

fix(PeriphDrivers): MSDK-1287: Fix MAX32655 MXC_Delay on RISC-V shows different behavior when not compiling with -O0 #1377

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 1 commit into
base: main
Choose a base branch
from

Conversation

dnguye14-adi
Copy link
Contributor

Description

In the MSDK Dual Core Sync example for MAX32655, the LED was programed to turn on in 500ms and then turn off.
Issue: when compiling with -O0, the LED stayed on for 500ms correctly. But, when compiling with -O1, -O2, -Os and -Og, the LED stayed on for longer (around 33% longer than the expected one).
To reproduce, just compile the example changing the MXC_OPTIMIZE_CFLAGS accordingly.

Fix: Add a delay to prevent the CPU bothers PCCR too much, then the PCCR hardware can maintain the correct timing.

Checklist Before Requesting Review

  • PR Title follows correct guidelines.
  • Description of changes and all other relevant information.
  • (Optional) Link any related GitHub issues using a keyword
  • (Optional) Provide info on any relevant functional testing/validation. For API changes or significant features, this is not optional.

different behavior when not compiling with -O0

Signed-off-by: Dung Nguyen <dung.nguyen@analog.com>
@@ -42,8 +42,18 @@ int MXC_Delay(uint32_t us)
CSR_SetPCER(1); // Enable counting of cycles
CSR_SetPCMR(3); // Turn on counter

uint32_t num_ticks_half_us = MXC_SYS_RiscVClockRate() / 1000000 / 3;
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Why 3?

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

It need a delay here to prevent CPU bother PCCR too much, then causes PCCR hardware cannot maintain the correct timing. After some testing I found this divisor (/3), it will give a delay less than 1us and big enough to prevent the PCCR. Here are my signal after add this delay, for both -O0, -O2 and -Og:

Picture1_1

Picture1_2

Picture1_3

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants