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Releases: capstone-engine/capstone

6.0.0-Alpha5

05 Aug 12:11
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6.0.0-Alpha5
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6.0.0-Alpha5 Latest
Latest

Highlights

  • The SPARC module was updated to LLVM-18 (please see the Release Guide for details).
  • Python bindings now use ABI3 wheels.
  • Added support for Apple's proprietary AArch64 instructions.
  • Instructions that can be decoded but are invalid for other reasons are now marked as such (#2707).
  • LoongArch: Compute absolute address for address operand (#2699)

Note about published Python Wheels

The Alpha5 Python packages on PyPi were published by accident with commit 5d989a4 of PR #2765.
The build is equivalent to tag 6.0.0-Alpha5, except for the additions to Changelog.md.
Because Changelog.md is not part of the distributed Python wheels, we didn't republish the packages.
Sorry for any inconvenience.

What's Changed

  • Apple AArch64 proprietary by @Rot127 in #2692
  • Add jump group for generic jirl by @jiegec in #2698
  • LoongArch: Compute absolute address for address operand by @jiegec in #2699
  • Fix LoongArch ld/st instructions register info by @jiegec in #2701
  • ARM: fix typo, cspr -> cpsr by @jiegec in #2716
  • Fix arm pop reg access by @jiegec in #2718
  • Fix missing sp register read in ret instruction by @jiegec in #2719
  • Fix missing operand for smstart, due to space replaced by tab by @jiegec in #2720
  • Add flag for the SoftFail case of the LLVM disassembler. by @Rot127 in #2707
  • Remove unused files. by @Rot127 in #2709
  • clang-format: change license to BSD-3-Clause by @tmfink in #2724
  • Use cs_ac_type for operand access mode in all arches and use cs_xtensa_op_type for Xtensa operand type by @jiegec in #2721
  • Make SStream respect the CS_OPT_UNSIGNED flag. by @Rot127 in #2723
  • Make assertion hit warnings optional in release builds. by @Rot127 in #2729
  • Update source list before installing valgrind. by @Rot127 in #2730
  • Add x30 implicit read to the RET alias. by @Rot127 in #2739
  • Print immediate only memory operands for AArch64. by @Rot127 in #2732
  • Add warning about naive search and replace to patch reg names. by @Rot127 in #2728
  • Enable to generate legacy MC tests for the fuzzer. by @Rot127 in #2733
  • Auto-Sync update Sparc LLVM-18 by @Rot127 in #2704
  • Python binding: Use ABI3 wheels by @Antelox in #2742
  • Update Auto-Sync to Python 3.13 and tree-sitter-py 24.0 by @Rot127 in #2705
  • Fix for Risc-V C.SRLI decoding (issue #2731) by @h01G3r in #2745
  • HPPA fix mem operands access and instruction printing by @R33v0LT in #2746
  • Handle zero case of R1 operand field by @Rot127 in #2743
  • Fix comisd memory operand size: xmmword -> qword by @jiegec in #2750
  • Fix missing repne for movsd op by @jiegec in #2752
  • Explain more details about CC change. by @Rot127 in #2753
  • Add a test for FCC conditions for none FPU instructions. by @Rot127 in #2758
  • Print register access type and registers accessed in cstool_mips.c by @jiegec in #2762
  • Fix duplication of memory operand by @Rot127 in #2761
  • Python binding: Windows ARM64 build by @Antelox in #2760
  • Implement cs_regs_access for Alpha architecture by @jiegec in #2763
  • Fix decoding of the FCC fields of FBPcc (format 2_3). by @Rot127 in #2764

New Contributors

Full Changelog: 6.0.0-Alpha4...6.0.0-Alpha5

Contributors

tmfink, jiegec, and 4 other contributors
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6.0.0-Alpha4

14 Apr 11:01
@kabeor kabeor
6.0.0-Alpha4
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6.0.0-Alpha4

What's Changed

  • Fix wrong version requirement of tricore instructions by @Changqing-JING in #2620
  • Python bindings: Switch to ubuntu-24.04-arm runner image by @Antelox in #2625
  • Build Tarball before DEB/RPM package. by @Rot127 in #2627
  • Add aliases mapping for MIPS & test for id, alias_id by @wargio in #2635
  • Add checks for MIPS details on cstest_py by @wargio in #2640
  • Give the user some guidance where to add missing enumeration values. by @Rot127 in #2639
  • Python bindings: sdist creation fix + relative test by @Antelox in #2624
  • cmake: Fix building capstone as sub-project by @imphil in #2629
  • Update operand type enums of all arch modules to the one in capstone.h by @Rot127 in #2633
  • Enhance shift value and types of shift instructions. by @Rot127 in #2638
  • Fix #2643 by @Rot127 in #2645
  • Tms32c64x Little Endian by @Rot127 in #2648
  • Add call group to svc, smc and hvc. by @Rot127 in #2651
  • Decode BH field in print_insn_detail_ppc by @hainest in #2662
  • Remove undefined constants in riscv_const.py (#2660) by @Asphaltt in #2661
  • Stringify BH fields when printing ppc details by @hainest in #2663
  • MIPS: Fix MIPS16 decoding, wrong flags and ghost registers by @wargio in #2665
  • Add a script to compare the inc file content with the lastest generated ones. by @Rot127 in #2667
  • Mips32r6_64r632 is for both mips32r6 and mips64r6 by @wargio in #2673
  • Fix nanoMIPS decoding of jalrc by @wargio in #2672
  • Revert "Add a script to compare the inc file content with the lastest generated ones." by @Rot127 in #2678
  • Add workflow for building on Windows by @stevenjoezhang in #2675
  • Update read/written registers for x87 comparison instructions by @hainest in #2680
  • Version: Update to v6.0.0-alpha4 by @kabeor in #2682
  • Build PDB for debugging on Windows by @stevenjoezhang in #2685

New Contributors

Full Changelog: 6.0.0-Alpha3...6.0.0-Alpha4

Contributors

wargio, imphil, and 7 other contributors
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Version 5.0.6

23 Mar 15:49
@kabeor kabeor
5.0.6
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Version 5.0.6

What's Changed

New Contributors

Full Changelog: 5.0.5...5.0.6

Contributors

WerWolv, kabeor, and Rot127
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Version 6.0.0-Alpha3

28 Jan 17:04
@kabeor kabeor
6.0.0-Alpha3
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Version 6.0.0-Alpha3

Highlights

Architecture modules

  • New ARC module (by @R33v0LT, sponsored by RizinOrg).
  • BPF was update based on RFC 9669 and other sources (by @Roeegg2).
  • Added support for TriCore 1.8 (by @Changqing-JING).
  • Update and fixes to EVM (by @andelf)
  • PPC update to LLVM 18 (adding a few new instructions).

Others

  • Add many more Python wheels for different architecture/OS combinations (by @Antelox).
  • Provide deb and rpm packages (by @AndrewQuijano).
  • Handful of bug fixes and improvements (see below).

What's Changed

New Contributors

Full Changelog: 6.0.0-Alpha2...6.0.0-Alpha3

Contributors

andelf, wargio, and 10 other contributors
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Version 5.0.5

17 Jan 02:25
@kabeor kabeor
5.0.5
5526125
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Version 5.0.5

What's Changed

  • Fix code missing issue in v5.0.4

What's Changed in v5.0.4

Full Changelog: 5.0.3...5.0.4

Contributors

david942j, AndrewQuijano, and 2 other contributors
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Version 5.0.4

16 Jan 04:24
@kabeor kabeor
5.0.4
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Version 5.0.4 Pre-release
Pre-release

What's Changed

Full Changelog: 5.0.3...5.0.4

Contributors

david942j, AndrewQuijano, and 2 other contributors
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Version 6.0.0-Alpha2

24 Nov 16:25
@kabeor kabeor
6.0.0-Alpha2
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Version 6.0.0-Alpha2 Pre-release
Pre-release

What's Changed

New Contributors

Full Changelog: 6.0.0-Alpha1...6.0.0-Alpha2

Contributors

thestr4ng3r, AndrewQuijano, and 4 other contributors
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Version 6.0.0-Alpha1

30 Sep 15:19
@kabeor kabeor
6.0.0-Alpha1
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Version 6.0.0-Alpha1

With the v6 release we added a new update mechanism called Auto-Sync. This is a huge step for Capstone, because it allows for easy module updates, easier addition of new architectures, easy features addition and guarantees less faulty disassembly.

This release adds a huge amount of new architectures, extensions, bug fixes and quality of life improvements.

Almost all the work was sponsored by RizinOrg. This release would have simply not happened without them.

The developers with the biggest contributions were (alphabetically):

There are also multiple smaller additions

And of course there were many more improvements done by other contributors, which add to the release just as the ones above. For a full list of all the developers, please see the below.

With all that said, we hope you enjoy the new release!

Breaking Changes

  • ARM64 was renamed to AArch64 everywhere (compatibility header is provided).
  • SysZ was renamed to SystemZ everywhere (compatibility header is provided).
  • Changes happened especially to the PPC, ARM and AArch64 API, as well as changes to enumeration values and stucts.
    Please be sure to read the release guide carefully!
    You can find all the breaking changes and justifications for them!

What's New

  • LoongArch, HPPA and Alpha support added.
  • AArch64, SystemZ and Mips updated to LLVM 18.
  • NanoMips extension added.
  • ARM and PPC updated to LLVM 16.
  • Exotic PPC PairedSingle extension added.
  • Instruction formats for PPC, SystemZ and LoongArch added.
  • Instruction alias support added.
  • RISCV operand access information added.
  • Testing was rewritten from scratch.
  • All tests are run with the address sanitizer.
  • Several improvements to the API of the ARM, AArch64 and PPC modules.

For an exhaustive list, see the release guide at https://github.com/capstone-engine/capstone/blob/next/docs/cs_v6_release_guide.md

  • Thank you @FinnWilkinson for testing the AArch64 module and its extensions so thoroughly.

What's Changed

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Contributors

rickmark, sevan, and 36 other contributors
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Version 5.0.3

20 Aug 15:05
@kabeor kabeor
5.0.3
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Version 5.0.3

Highlight

  • This release mainly fixes a series of issues with python wheel in the previous version.

What's Changed

  • [v5] Updates and fixes to the Python wheel builder workflow by @Rot127 in #2440
  • Relocatable package v5 by @mrexodia in #2447
  • [v5] Wheel build fixes: manylinux1, trigger upload on release, Linux AArch64 by @Rot127 in #2443

Full Changelog: 5.0.2...5.0.3

Contributors

mrexodia and Rot127
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Version 5.0.2

12 Aug 07:42
@kabeor kabeor
5.0.2
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Version 5.0.2

What's Changed

New Contributors

Full Changelog: 5.0.1...5.0.2

Contributors

twizmwazin, nmeum, and 8 other contributors
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