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Merge pull request #69 from m-glowacki/topo_deployment_rebase
Force postive TOPO outputs
2 parents d3e05a9 + 8316772 commit 0e980e7

8 files changed

Lines changed: 1315 additions & 1264 deletions

firmware/hdl/payload/gtl/topo_trigger/model_HHbbWW_1mu_v5/topo_HHbbWW_1mu_v5.vhd

Lines changed: 80 additions & 80 deletions
Large diffs are not rendered by default.

firmware/hdl/payload/gtl/topo_trigger/model_HHbbWW_1mu_v5/topo_HHbbWW_1mu_v5_TOPO_project.vhd

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -321,10 +321,10 @@ attribute shreg_extract : string;
321321
signal call_ret3_relu_ap_fixed_32_15_5_3_0_ap_ufixed_8_0_4_0_0_relu_config7_s_fu_282_ap_return_10 : STD_LOGIC_VECTOR (7 downto 0);
322322
signal call_ret3_relu_ap_fixed_32_15_5_3_0_ap_ufixed_8_0_4_0_0_relu_config7_s_fu_282_ap_return_11 : STD_LOGIC_VECTOR (7 downto 0);
323323
signal call_ret3_relu_ap_fixed_32_15_5_3_0_ap_ufixed_8_0_4_0_0_relu_config7_s_fu_282_ap_return_12 : STD_LOGIC_VECTOR (7 downto 0);
324-
signal layer8_out_dense_latency_ap_ufixed_8_0_4_0_0_ap_fixed_16_6_4_0_0_config8_s_fu_299_ap_ready : STD_LOGIC;
325-
signal layer8_out_dense_latency_ap_ufixed_8_0_4_0_0_ap_fixed_16_6_4_0_0_config8_s_fu_299_ap_return : STD_LOGIC_VECTOR (15 downto 0);
326-
signal topo_score_linear_ap_fixed_16_6_4_0_0_ap_fixed_16_6_5_3_0_linear_config9_s_fu_316_ap_ready : STD_LOGIC;
327-
signal topo_score_linear_ap_fixed_16_6_4_0_0_ap_fixed_16_6_5_3_0_linear_config9_s_fu_316_ap_return : STD_LOGIC_VECTOR (15 downto 0);
324+
signal layer8_out_dense_latency_ap_ufixed_8_0_4_0_0_ap_fixed_31_14_5_3_0_config8_s_fu_299_ap_ready : STD_LOGIC;
325+
signal layer8_out_dense_latency_ap_ufixed_8_0_4_0_0_ap_fixed_31_14_5_3_0_config8_s_fu_299_ap_return : STD_LOGIC_VECTOR (22 downto 0);
326+
signal topo_score_relu_ap_fixed_31_14_5_3_0_ap_fixed_16_6_4_0_0_relu_config10_s_fu_316_ap_ready : STD_LOGIC;
327+
signal topo_score_relu_ap_fixed_31_14_5_3_0_ap_fixed_16_6_4_0_0_relu_config10_s_fu_316_ap_return : STD_LOGIC_VECTOR (15 downto 0);
328328
signal ap_block_pp0_stage0_ignoreCallOp4 : BOOLEAN;
329329
signal ap_block_pp0_stage0_ignoreCallOp124 : BOOLEAN;
330330
signal ap_block_pp0_stage0_ignoreCallOp244 : BOOLEAN;
@@ -882,7 +882,7 @@ attribute shreg_extract : string;
882882
end component;
883883

884884

885-
component topo_HHbbWW_1mu_v5_dense_latency_ap_ufixed_8_0_4_0_0_ap_fixed_16_6_4_0_0_config8_s IS
885+
component topo_HHbbWW_1mu_v5_dense_latency_ap_ufixed_8_0_4_0_0_ap_fixed_31_14_5_3_0_config8_s IS
886886
port (
887887
ap_ready : OUT STD_LOGIC;
888888
data_0_val : IN STD_LOGIC_VECTOR (7 downto 0);
@@ -898,15 +898,15 @@ attribute shreg_extract : string;
898898
data_44_val : IN STD_LOGIC_VECTOR (7 downto 0);
899899
data_61_val : IN STD_LOGIC_VECTOR (7 downto 0);
900900
data_63_val : IN STD_LOGIC_VECTOR (7 downto 0);
901-
ap_return : OUT STD_LOGIC_VECTOR (15 downto 0);
901+
ap_return : OUT STD_LOGIC_VECTOR (22 downto 0);
902902
ap_rst : IN STD_LOGIC );
903903
end component;
904904

905905

906-
component topo_HHbbWW_1mu_v5_linear_ap_fixed_16_6_4_0_0_ap_fixed_16_6_5_3_0_linear_config9_s IS
906+
component topo_HHbbWW_1mu_v5_relu_ap_fixed_31_14_5_3_0_ap_fixed_16_6_4_0_0_relu_config10_s IS
907907
port (
908908
ap_ready : OUT STD_LOGIC;
909-
data_val : IN STD_LOGIC_VECTOR (15 downto 0);
909+
data_val : IN STD_LOGIC_VECTOR (22 downto 0);
910910
ap_return : OUT STD_LOGIC_VECTOR (15 downto 0);
911911
ap_rst : IN STD_LOGIC );
912912
end component;
@@ -1450,9 +1450,9 @@ begin
14501450
ap_return_12 => call_ret3_relu_ap_fixed_32_15_5_3_0_ap_ufixed_8_0_4_0_0_relu_config7_s_fu_282_ap_return_12,
14511451
ap_rst => ap_rst);
14521452

1453-
layer8_out_dense_latency_ap_ufixed_8_0_4_0_0_ap_fixed_16_6_4_0_0_config8_s_fu_299 : component topo_HHbbWW_1mu_v5_dense_latency_ap_ufixed_8_0_4_0_0_ap_fixed_16_6_4_0_0_config8_s
1453+
layer8_out_dense_latency_ap_ufixed_8_0_4_0_0_ap_fixed_31_14_5_3_0_config8_s_fu_299 : component topo_HHbbWW_1mu_v5_dense_latency_ap_ufixed_8_0_4_0_0_ap_fixed_31_14_5_3_0_config8_s
14541454
port map (
1455-
ap_ready => layer8_out_dense_latency_ap_ufixed_8_0_4_0_0_ap_fixed_16_6_4_0_0_config8_s_fu_299_ap_ready,
1455+
ap_ready => layer8_out_dense_latency_ap_ufixed_8_0_4_0_0_ap_fixed_31_14_5_3_0_config8_s_fu_299_ap_ready,
14561456
data_0_val => call_ret3_relu_ap_fixed_32_15_5_3_0_ap_ufixed_8_0_4_0_0_relu_config7_s_fu_282_ap_return_0,
14571457
data_2_val => call_ret3_relu_ap_fixed_32_15_5_3_0_ap_ufixed_8_0_4_0_0_relu_config7_s_fu_282_ap_return_1,
14581458
data_11_val => call_ret3_relu_ap_fixed_32_15_5_3_0_ap_ufixed_8_0_4_0_0_relu_config7_s_fu_282_ap_return_2,
@@ -1466,14 +1466,14 @@ begin
14661466
data_44_val => call_ret3_relu_ap_fixed_32_15_5_3_0_ap_ufixed_8_0_4_0_0_relu_config7_s_fu_282_ap_return_10,
14671467
data_61_val => call_ret3_relu_ap_fixed_32_15_5_3_0_ap_ufixed_8_0_4_0_0_relu_config7_s_fu_282_ap_return_11,
14681468
data_63_val => call_ret3_relu_ap_fixed_32_15_5_3_0_ap_ufixed_8_0_4_0_0_relu_config7_s_fu_282_ap_return_12,
1469-
ap_return => layer8_out_dense_latency_ap_ufixed_8_0_4_0_0_ap_fixed_16_6_4_0_0_config8_s_fu_299_ap_return,
1469+
ap_return => layer8_out_dense_latency_ap_ufixed_8_0_4_0_0_ap_fixed_31_14_5_3_0_config8_s_fu_299_ap_return,
14701470
ap_rst => ap_rst);
14711471

1472-
topo_score_linear_ap_fixed_16_6_4_0_0_ap_fixed_16_6_5_3_0_linear_config9_s_fu_316 : component topo_HHbbWW_1mu_v5_linear_ap_fixed_16_6_4_0_0_ap_fixed_16_6_5_3_0_linear_config9_s
1472+
topo_score_relu_ap_fixed_31_14_5_3_0_ap_fixed_16_6_4_0_0_relu_config10_s_fu_316 : component topo_HHbbWW_1mu_v5_relu_ap_fixed_31_14_5_3_0_ap_fixed_16_6_4_0_0_relu_config10_s
14731473
port map (
1474-
ap_ready => topo_score_linear_ap_fixed_16_6_4_0_0_ap_fixed_16_6_5_3_0_linear_config9_s_fu_316_ap_ready,
1475-
data_val => layer8_out_dense_latency_ap_ufixed_8_0_4_0_0_ap_fixed_16_6_4_0_0_config8_s_fu_299_ap_return,
1476-
ap_return => topo_score_linear_ap_fixed_16_6_4_0_0_ap_fixed_16_6_5_3_0_linear_config9_s_fu_316_ap_return,
1474+
ap_ready => topo_score_relu_ap_fixed_31_14_5_3_0_ap_fixed_16_6_4_0_0_relu_config10_s_fu_316_ap_ready,
1475+
data_val => layer8_out_dense_latency_ap_ufixed_8_0_4_0_0_ap_fixed_31_14_5_3_0_config8_s_fu_299_ap_return,
1476+
ap_return => topo_score_relu_ap_fixed_31_14_5_3_0_ap_fixed_16_6_4_0_0_relu_config10_s_fu_316_ap_return,
14771477
ap_rst => ap_rst);
14781478

14791479

@@ -1607,5 +1607,5 @@ begin
16071607
end if;
16081608
end process;
16091609

1610-
ap_return <= topo_score_linear_ap_fixed_16_6_4_0_0_ap_fixed_16_6_5_3_0_linear_config9_s_fu_316_ap_return;
1610+
ap_return <= topo_score_relu_ap_fixed_31_14_5_3_0_ap_fixed_16_6_4_0_0_relu_config10_s_fu_316_ap_return;
16111611
end behav;

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