@@ -49,34 +49,32 @@ defmodule Protobuf.Wire.Varint do
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@ max_bits 64
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@ mask64 bsl ( 1 , @ max_bits ) - 1
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- # generated: true is required here to silence compilation warnings in Elixir
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- # 1.10 and 1.11. OK to remove once we support only 1.12+
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@ varints [
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{
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quote ( do: << 0 :: 1 , value :: 7 >> ) ,
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quote ( do: value )
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} ,
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{
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quote ( do: << 1 :: 1 , x0 :: 7 , 0 :: 1 , x1 :: 7 >> ) ,
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- quote ( generated: true , do: x0 + bsl ( x1 , 7 ) )
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+ quote ( do: x0 + bsl ( x1 , 7 ) )
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} ,
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{
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quote ( do: << 1 :: 1 , x0 :: 7 , 1 :: 1 , x1 :: 7 , 0 :: 1 , x2 :: 7 >> ) ,
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- quote ( generated: true , do: x0 + bsl ( x1 , 7 ) + bsl ( x2 , 14 ) )
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+ quote ( do: x0 + bsl ( x1 , 7 ) + bsl ( x2 , 14 ) )
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} ,
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{
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quote ( do: << 1 :: 1 , x0 :: 7 , 1 :: 1 , x1 :: 7 , 1 :: 1 , x2 :: 7 , 0 :: 1 , x3 :: 7 >> ) ,
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- quote ( generated: true , do: x0 + bsl ( x1 , 7 ) + bsl ( x2 , 14 ) + bsl ( x3 , 21 ) )
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+ quote ( do: x0 + bsl ( x1 , 7 ) + bsl ( x2 , 14 ) + bsl ( x3 , 21 ) )
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} ,
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{
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quote ( do: << 1 :: 1 , x0 :: 7 , 1 :: 1 , x1 :: 7 , 1 :: 1 , x2 :: 7 , 1 :: 1 , x3 :: 7 , 0 :: 1 , x4 :: 7 >> ) ,
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- quote ( generated: true , do: x0 + bsl ( x1 , 7 ) + bsl ( x2 , 14 ) + bsl ( x3 , 21 ) + bsl ( x4 , 28 ) )
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+ quote ( do: x0 + bsl ( x1 , 7 ) + bsl ( x2 , 14 ) + bsl ( x3 , 21 ) + bsl ( x4 , 28 ) )
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} ,
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{
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quote do
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<< 1 :: 1 , x0 :: 7 , 1 :: 1 , x1 :: 7 , 1 :: 1 , x2 :: 7 , 1 :: 1 , x3 :: 7 , 1 :: 1 , x4 :: 7 , 0 :: 1 , x5 :: 7 >>
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end ,
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- quote ( generated: true ) do
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+ quote do
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x0 +
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bsl ( x1 , 7 ) +
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bsl ( x2 , 14 ) +
@@ -90,7 +88,7 @@ defmodule Protobuf.Wire.Varint do
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<< 1 :: 1 , x0 :: 7 , 1 :: 1 , x1 :: 7 , 1 :: 1 , x2 :: 7 , 1 :: 1 , x3 :: 7 , 1 :: 1 , x4 :: 7 , 1 :: 1 , x5 :: 7 , 0 :: 1 ,
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x6 :: 7 >>
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end ,
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- quote ( generated: true ) do
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+ quote do
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x0 +
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bsl ( x1 , 7 ) +
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bsl ( x2 , 14 ) +
@@ -105,7 +103,7 @@ defmodule Protobuf.Wire.Varint do
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<< 1 :: 1 , x0 :: 7 , 1 :: 1 , x1 :: 7 , 1 :: 1 , x2 :: 7 , 1 :: 1 , x3 :: 7 , 1 :: 1 , x4 :: 7 , 1 :: 1 , x5 :: 7 , 1 :: 1 ,
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x6 :: 7 , 0 :: 1 , x7 :: 7 >>
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end ,
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- quote ( generated: true ) do
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+ quote do
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x0 +
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bsl ( x1 , 7 ) +
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bsl ( x2 , 14 ) +
@@ -121,7 +119,7 @@ defmodule Protobuf.Wire.Varint do
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<< 1 :: 1 , x0 :: 7 , 1 :: 1 , x1 :: 7 , 1 :: 1 , x2 :: 7 , 1 :: 1 , x3 :: 7 , 1 :: 1 , x4 :: 7 , 1 :: 1 , x5 :: 7 , 1 :: 1 ,
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x6 :: 7 , 1 :: 1 , x7 :: 7 , 0 :: 1 , x8 :: 7 >>
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end ,
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- quote ( generated: true ) do
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+ quote do
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x0 +
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bsl ( x1 , 7 ) +
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bsl ( x2 , 14 ) +
@@ -138,7 +136,7 @@ defmodule Protobuf.Wire.Varint do
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<< 1 :: 1 , x0 :: 7 , 1 :: 1 , x1 :: 7 , 1 :: 1 , x2 :: 7 , 1 :: 1 , x3 :: 7 , 1 :: 1 , x4 :: 7 , 1 :: 1 , x5 :: 7 , 1 :: 1 ,
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x6 :: 7 , 1 :: 1 , x7 :: 7 , 1 :: 1 , x8 :: 7 , 0 :: 1 , x9 :: 7 >>
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end ,
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- quote ( generated: true ) do
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+ quote do
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v =
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x0 +
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bsl ( x1 , 7 ) +
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