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Unsupported aggregate pragma/directive on variable 'layer63_out' as the bit-width after aggregation (6272) is larger than 4096 #1245

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@layson-inventor

Description

@layson-inventor

Prerequisites

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  • Test that the bug appears on the current version of the master branch. Make sure to include the commit hash of the commit you checked out.
  • Check that the issue hasn't already been reported, by checking the currently open issues.
  • If there are steps to reproduce the problem, make sure to write them down below.
  • If relevant, please include the hls4ml project files, which were created directly before and/or after the bug.

Quick summary

Unsupported aggregate pragma/directive on variable 'layer63_out' as the bit-width after aggregation (6272) is larger than 4096

Details

When I work on vgg model transformations, I always run into problems with variables at the fully connected layer.

ERROR: [HLS 214-256] in function 'vgg16(hls::stream<nnet::array<ap_fixed<16, 6, (ap_q_mode)5, (ap_o_mode)3, 0>, 
3u>, 0>&, hls::stream<nnet::array<ap_fixed<16, 6, (ap_q_mode)5, (ap_o_mode)3, 0>, 10u>, 0>&)': Unsupported aggregate 
pragma/directive on variable 'layer63_out' as the bit-width after aggregation (6272) is larger than 4096 (firmware/vgg16.cpp:323:35)  vgg16_prj:solution1  Mar 25, 2025, 10:43:24 PM

If default_precision='fixed<8,4>' is set, this problem does not occur, but if default_precision='fixed<16,6>' is the default setting, this problem will occur. Is there any way to avoid this problem?

Steps to Reproduce

Add what needs to be done to reproduce the bug. Add commented code examples and make sure to include the original model files / code, and the commit hash you are working on.

  1. Clone the hls4ml repository
  2. Checkout the master branch, with commit hash: [...]
  3. Run conversion [...] on model file with code [...]
  4. [Further steps ...]

Expected behavior

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Actual behavior

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