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llarm-emu clang_tidy fixes
1 parent 4f45193 commit 4fcf05d

5 files changed

Lines changed: 38 additions & 38 deletions

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llarm-emu/src/cpu/core/registers.hpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -84,8 +84,8 @@ struct REGISTERS {
8484

8585
void write(const id::cpsr cpsr_id, const u8 cpsr_value);
8686
void write(const id::reg reg_id);
87-
void write(const id::reg, const id::reg);
88-
void write(const id::reg, const u32);
87+
void write(const id::reg destination_reg_id, const id::reg source_reg_id);
88+
void write(const id::reg register_id, const u32 value);
8989
void write(const u32 code, const u8 start, const u8 end, const u32 value);
9090
void write(const u8 reg_bits, const u32 value);
9191
void force_write(const id::reg register_id, const u32 value);

llarm-emu/src/cpu/instructions/operation.cpp

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -12,31 +12,31 @@ bool operation::carry_add(const u64 sum) {
1212
return (sum > max);
1313
}
1414

15-
bool operation::carry_add(const u32 sum1, const u32 sum2) {
15+
bool operation::carry_add(const u32 a, const u32 b) {
1616
constexpr u64 max = ((1ULL << 32) - 1);
17-
return ((sum1 + sum2) > max);
17+
return ((a + b) > max);
1818
}
1919

2020
// CHECK IF THIS WORKS TODO
21-
bool operation::carry_add(const u32 sum1, const u32 sum2, const u32 sum3) {
21+
bool operation::carry_add(const u32 a, const u32 b, const u32 c) {
2222
constexpr u64 max = ((1ULL << 32) - 1);
23-
return ((sum1 + sum2 + sum3) > max);
23+
return ((a + b + c) > max);
2424
}
2525

2626
// TODO: COMPLETE
27-
bool operation::borrow_add(const u32 p1, const u32 p2) {
28-
(void)p1;
29-
(void)p2;
27+
bool operation::borrow_add(const u32 a, const u32 b) {
28+
(void)a;
29+
(void)b;
3030
return true; // TODO: COMPLETE THIS SHIT
3131
}
3232

33-
bool operation::borrow_sub(const u32 p1, const u32 p2) {
34-
return (p1 < p2);
33+
bool operation::borrow_sub(const u32 a, const u32 b) {
34+
return (a < b);
3535
}
3636

3737
// CHECK IF THIS WORKS
38-
bool operation::borrow_sub(const u32 p1, const u32 p2, const u32 p3) {
39-
return (p1 < p2) || (p1 - p2 < p3);
38+
bool operation::borrow_sub(const u32 a, const u32 b, const u32 c) {
39+
return (a < b) || (a - b < c);
4040
}
4141

4242
bool operation::overflow_add(const u32 a, const u32 b) {

llarm-emu/src/cpu/instructions/operation.hpp

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -7,21 +7,21 @@
77
#include <llarm/shared/types.hpp>
88

99
namespace operation {
10-
bool carry_add(const u64);
11-
bool carry_add(const u32, const u32);
12-
bool carry_add(const u32, const u32, const u32);
10+
bool carry_add(const u64 sum);
11+
bool carry_add(const u32 a, const u32 b);
12+
bool carry_add(const u32 a, const u32 b, const u32 c);
1313

14-
bool borrow_add(const u32, const u32);
15-
bool borrow_sub(const u32, const u32);
16-
bool borrow_sub(const u32, const u32, const u32);
14+
bool borrow_add(const u32 a, const u32 b);
15+
bool borrow_sub(const u32 a, const u32 b);
16+
bool borrow_sub(const u32 a, const u32 b, const u32 c);
1717

18-
bool overflow_add(const u32, const u32, const u32);
19-
bool overflow_add(const u32, const u32);
20-
bool overflow_sub(const u32, const u32);
21-
bool overflow_sub(const u32, const u32, const u32);
18+
bool overflow_add(const u32 a, const u32 b, const u32 c);
19+
bool overflow_add(const u32 a, const u32 b);
20+
bool overflow_sub(const u32 a, const u32 b);
21+
bool overflow_sub(const u32 a, const u32 b, const u32 c);
2222

23-
bool signed_overflow_sub(const i32, const i32);
24-
bool signed_overflow_add(const i32, const i32);
23+
bool signed_overflow_sub(const i32 a, const i32 b);
24+
bool signed_overflow_add(const i32 a, const i32 b);
2525

2626
i32 sign_extend(const u32 value, const u8 sign_index = 31);
2727
i32 signed_sat(const u32 x, const u32 n);

llarm-emu/src/peripherals/uart/uart.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -159,11 +159,11 @@ void UART::write(const u32 address, const u32 value) {
159159
return;
160160
}
161161

162-
case OFFSET_UARTRSR: // UARTECR on write: any write clears all error bits
162+
case OFFSET_UARTRSR: // UARTECR on write: any write clears all error bits
163163
rsr = 0;
164164
return;
165165

166-
case OFFSET_UARTFR: return; // read-only
166+
case OFFSET_UARTFR: return; // read-only
167167

168168
case OFFSET_UARTILPR: ilpr = value & 0xFFU; return;
169169
case OFFSET_UARTIBRD: ibrd = value & 0xFFFFU; return;

llarm-emu/src/peripherals/uart/uart.hpp

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -105,20 +105,20 @@ struct UART {
105105

106106
// TX FIFO: 32 x 8-bit entries
107107
std::queue<u8> tx_fifo;
108-
// RX FIFO: 32 x 12-bit entries bits [11:8] = error flags, bits [7:0] = data
108+
// RX FIFO: 32 x 12-bit entries, bits [11:8] = error flags, bits [7:0] = data
109109
std::queue<u16> rx_fifo;
110110

111111
// registers with TRM reset values
112-
u32 rsr = 0x00; // UARTRSR receive status / error bits
113-
u32 ilpr = 0x00; // UARTILPR IrDA low-power counter
114-
u32 ibrd = 0x0000; // UARTIBRD integer baud rate divisor
115-
u32 fbrd = 0x00; // UARTFBRD fractional baud rate divisor
116-
u32 lcr_h = 0x00; // UARTLCR_H line control
117-
u32 cr = 0x0300; // UARTCR control register (TXE=1, RXE=1, UARTEN=0)
118-
u32 ifls = 0x12; // UARTIFLS interrupt FIFO level select (TX=1/2, RX=1/2)
119-
u32 imsc = 0x000; // UARTIMSC interrupt mask
120-
u32 ris = 0x000; // UARTRIS raw interrupt status
121-
u32 dmacr = 0x00; // UARTDMACR DMA control
112+
u32 rsr = 0x00; // UARTRSR: receive status / error bits
113+
u32 ilpr = 0x00; // UARTILPR: IrDA low-power counter
114+
u32 ibrd = 0x0000; // UARTIBRD: integer baud rate divisor
115+
u32 fbrd = 0x00; // UARTFBRD: fractional baud rate divisor
116+
u32 lcr_h = 0x00; // UARTLCR_H: line control
117+
u32 cr = 0x0300; // UARTCR: control register (TXE=1, RXE=1, UARTEN=0)
118+
u32 ifls = 0x12; // UARTIFLS: interrupt FIFO level select (TX=1/2, RX=1/2)
119+
u32 imsc = 0x000; // UARTIMSC: interrupt mask
120+
u32 ris = 0x000; // UARTRIS: raw interrupt status
121+
u32 dmacr = 0x00; // UARTDMACR: DMA control
122122

123123
u32 flag_register() const;
124124
u8 tx_trigger_level() const;

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