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start of armv6 support for llarm-asm
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‎README.md‎

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## Development roadmap and dependency tree
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<br>
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<img align="center" src="assets/roadmap/llarm_roadmap.drawio.png" title="LLARM roadmap">
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<br>
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- - -
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## llarm-asm
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C++ library and CLI for ARM/Thumb assembly and disassembly. Covers 135+ ARM instructions, 70+ Thumb instructions, and 70+ shifter operand types. Benchmarks show it is up to 2-4× faster than comparable tools.
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## Development roadmap and dependency tree
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<br>
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<img align="center" src="assets/roadmap/llarm_roadmap.png" title="LLARM roadmap">
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<br>
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## License
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LLARM is released under the [Apache 2.0 License](LICENSE). All subprojects share the same license.

‎assets/roadmap/llarm_roadmap.drawio‎

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<mxfile host="app.diagrams.net" agent="Mozilla/5.0 (X11; Linux x86_64; rv:140.0) Gecko/20100101 Firefox/140.0">
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<diagram name="Page-1" id="vd27VnRxTMPMCAIc7cgx">
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<mxGraphModel dx="73" dy="696" grid="1" gridSize="10" guides="1" tooltips="1" connect="1" arrows="1" fold="1" page="1" pageScale="1" pageWidth="850" pageHeight="1100" math="0" shadow="0">
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<mxGraphModel dx="236" dy="819" grid="1" gridSize="10" guides="1" tooltips="1" connect="1" arrows="1" fold="1" page="1" pageScale="1" pageWidth="850" pageHeight="1100" math="0" shadow="0">
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<root>
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<mxCell id="0" />
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<mxCell id="1" parent="0" />
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<mxCell id="2ruZrwj2Axgjb19F1pPn-6" parent="1" style="rounded=1;whiteSpace=wrap;html=1;strokeColor=none;arcSize=8;" value="" vertex="1">
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<mxGeometry height="570" width="870" x="860" y="570" as="geometry" />
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</mxCell>
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<mxCell id="keE6CP2fWxsbIICl772--43" parent="1" style="rounded=0;whiteSpace=wrap;html=1;" value="" vertex="1">
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<mxGeometry height="210" width="140" x="1570" y="900" as="geometry" />
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<mxGeometry height="220" width="140" x="1570" y="900" as="geometry" />
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</mxCell>
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<mxCell id="keE6CP2fWxsbIICl772--10" parent="1" style="rounded=0;whiteSpace=wrap;html=1;fillColor=#B7FA60;strokeColor=#36393d;" value="testing phase" vertex="1">
13+
<mxCell id="keE6CP2fWxsbIICl772--10" parent="1" style="rounded=0;whiteSpace=wrap;html=1;fillColor=#B7FA60;strokeColor=#36393d;" value="ARMv5 support" vertex="1">
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<mxGeometry height="30" width="120" x="1580" y="1030" as="geometry" />
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</mxCell>
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<mxCell id="keE6CP2fWxsbIICl772--11" parent="1" style="rounded=0;whiteSpace=wrap;html=1;fillColor=#3FF7DC;strokeColor=#000000;" value="completed" vertex="1">
17-
<mxGeometry height="30" width="120" x="1580" y="1070" as="geometry" />
16+
<mxCell id="keE6CP2fWxsbIICl772--11" parent="1" style="rounded=0;whiteSpace=wrap;html=1;fillColor=#3FF7DC;strokeColor=#000000;" value="&lt;div&gt;completed&amp;nbsp;&lt;/div&gt;&lt;div&gt;(ARMv9 support)&lt;/div&gt;" vertex="1">
17+
<mxGeometry height="40" width="120" x="1580" y="1070" as="geometry" />
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</mxCell>
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<mxCell id="keE6CP2fWxsbIICl772--12" parent="1" style="rounded=0;whiteSpace=wrap;html=1;fillColor=#FAEEAE;strokeColor=#36393d;" value="in progress" vertex="1">
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<mxGeometry height="30" width="120" x="1580" y="990" as="geometry" />

‎assets/roadmap/llarm_roadmap.drawio.png‎

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‎assets/roadmap/llarm_roadmap.png‎

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‎llarm-asm/README.md‎

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Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
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# llarm-asm
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3-
C++ library and CLI tool for ARM assembly and disassembly. Handles both ARM and Thumb instruction sets.
3+
C++ library and CLI tool for ARM assembly and disassembly. Handles both ARM and Thumb instruction sets for ARMv5.
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- Assemble mnemonics to binary and disassemble binary to mnemonics
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- Identify instructions and shifter operands from binary or string
@@ -9,6 +9,8 @@ C++ library and CLI tool for ARM assembly and disassembly. Handles both ARM and
99
- Configurable disassembly output via settings
1010
- Fastest disassembler and assembler according to benchmarks (up to 2x or 4x faster)
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12+
> [!NOTE]
13+
> ARMv6 support is currently in development
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## Usage
1416

‎llarm-asm/src/assemble/arm/generators.cpp‎

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Original file line numberDiff line numberDiff line change
@@ -156,6 +156,86 @@ u32 generators::arm(const IR_arm_struct& IR) {
156156
case arm_id::FMSR: return fmsr(operands);
157157
case arm_id::FMSTAT: return fmstat(operands);
158158
case arm_id::FMXR: return fmxr(operands);
159+
case arm_id::CPS: // TODO
160+
case arm_id::CPY: // TODO
161+
case arm_id::LDREX: // TODO
162+
case arm_id::MCRR2: // TODO
163+
case arm_id::MRRC2: // TODO
164+
case arm_id::PKHBT: // TODO
165+
case arm_id::PKHTB: // TODO
166+
case arm_id::QADD16: // TODO
167+
case arm_id::QADD8: // TODO
168+
case arm_id::QADDSUBX: // TODO
169+
case arm_id::QSUB16: // TODO
170+
case arm_id::QSUB8: // TODO
171+
case arm_id::QSUBADDX: // TODO
172+
case arm_id::REV: // TODO
173+
case arm_id::REV16: // TODO
174+
case arm_id::REVSH: // TODO
175+
case arm_id::RFE: // TODO
176+
case arm_id::SADD16: // TODO
177+
case arm_id::SADD8: // TODO
178+
case arm_id::SADDSUBX: // TODO
179+
case arm_id::SEL: // TODO
180+
case arm_id::SETEND: // TODO
181+
case arm_id::SHADD16: // TODO
182+
case arm_id::SHADD8: // TODO
183+
case arm_id::SHADDSUBX: // TODO
184+
case arm_id::SHSUB16: // TODO
185+
case arm_id::SHSUB8: // TODO
186+
case arm_id::SHSUBADDX: // TODO
187+
case arm_id::SMLAD: // TODO
188+
case arm_id::SMLALD: // TODO
189+
case arm_id::SMLSD: // TODO
190+
case arm_id::SMLSLD: // TODO
191+
case arm_id::SMMLA: // TODO
192+
case arm_id::SMMLS: // TODO
193+
case arm_id::SMMUL: // TODO
194+
case arm_id::SMUAD: // TODO
195+
case arm_id::SMUSD: // TODO
196+
case arm_id::SRS: // TODO
197+
case arm_id::SSAT: // TODO
198+
case arm_id::SSAT16: // TODO
199+
case arm_id::SSUB16: // TODO
200+
case arm_id::SSUB8: // TODO
201+
case arm_id::SSUBADDX: // TODO
202+
case arm_id::STREX: // TODO
203+
case arm_id::SXTAB: // TODO
204+
case arm_id::SXTAB16: // TODO
205+
case arm_id::SXTAH: // TODO
206+
case arm_id::SXTB: // TODO
207+
case arm_id::SXTB16: // TODO
208+
case arm_id::SXTH: // TODO
209+
case arm_id::UADD16: // TODO
210+
case arm_id::UADD8: // TODO
211+
case arm_id::UADDSUBX: // TODO
212+
case arm_id::UHADD16: // TODO
213+
case arm_id::UHADD8: // TODO
214+
case arm_id::UHADDSUBX: // TODO
215+
case arm_id::UHSUB16: // TODO
216+
case arm_id::UHSUB8: // TODO
217+
case arm_id::UHSUBADDX: // TODO
218+
case arm_id::UMAAL: // TODO
219+
case arm_id::UQADD16: // TODO
220+
case arm_id::UQADD8: // TODO
221+
case arm_id::UQADDSUBX: // TODO
222+
case arm_id::UQSUB16: // TODO
223+
case arm_id::UQSUB8: // TODO
224+
case arm_id::UQSUBADDX: // TODO
225+
case arm_id::USAD8: // TODO
226+
case arm_id::USADA8: // TODO
227+
case arm_id::USAT: // TODO
228+
case arm_id::USAT16: // TODO
229+
case arm_id::USUB16: // TODO
230+
case arm_id::USUB8: // TODO
231+
case arm_id::USUBADDX: // TODO
232+
case arm_id::UXTAB: // TODO
233+
case arm_id::UXTAB16: // TODO
234+
case arm_id::UXTAH: // TODO
235+
case arm_id::UXTB: // TODO
236+
case arm_id::UXTB16: // TODO
237+
case arm_id::UXTH: // TODO
238+
break;
159239
}
160240

161241
return 0;

‎llarm-asm/src/assemble/thumb/generators.cpp‎

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Original file line numberDiff line numberDiff line change
@@ -292,7 +292,16 @@ u32 generators::thumb(const IR_thumb_struct& IR) {
292292
case thumb_id::BL_BLX1_PREFIX: return BL_BLX1(operands, IR.PC, id);
293293
case thumb_id::BLX2: return Rm_special(0b0100'0111'1000'0000, operands);
294294
case thumb_id::BX: return Rm_special(0b0100'0111'0000'0000, operands);
295-
}
295+
case thumb_id::CPS: // TODO
296+
case thumb_id::REV16: // TODO
297+
case thumb_id::REVSH: // TODO
298+
case thumb_id::SETEND: // TODO
299+
case thumb_id::SXTB: // TODO
300+
case thumb_id::SXTH: // TODO
301+
case thumb_id::UXTB: // TODO
302+
case thumb_id::UXTH: // TODO
303+
break;
304+
}
296305

297306
return 0;
298307
}

‎llarm-asm/src/disassemble/disassemble.cpp‎

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Original file line numberDiff line numberDiff line change
@@ -85,6 +85,15 @@ std::string disassemble::thumb_generate(const u32 code, const u32 PC, const sett
8585
case thumb_id::UNDEFINED: return UNDEFINED;
8686
case thumb_id::UNKNOWN: llarm::out::error("Unknown instruction encountered for disassembly");
8787
case thumb_id::NOP: llarm::out::error("NOP instruction encountered for thumb disassembly");
88+
case thumb_id::CPS: // TODO
89+
case thumb_id::REV16: // TODO
90+
case thumb_id::REVSH: // TODO
91+
case thumb_id::SETEND: // TODO
92+
case thumb_id::SXTB: // TODO
93+
case thumb_id::SXTH: // TODO
94+
case thumb_id::UXTB: // TODO
95+
case thumb_id::UXTH: // TODO
96+
break;
8897
}
8998
}
9099

@@ -138,7 +147,6 @@ std::string disassemble::arm_generate(const u32 code, const u32 PC, const settin
138147
case arm_id::STRT: return generators::arm::store::STRT(code, settings);
139148
case arm_id::SUB: return generators::arm::math::SUB(code, settings);
140149
case arm_id::SWI: return generators::arm::misc::SWI(code, settings);
141-
case arm_id::NOP: return generators::arm::misc::NOP();
142150
case arm_id::SWP: return generators::arm::store::SWP(code, settings);
143151
case arm_id::SWPB: return generators::arm::store::SWPB(code, settings);
144152
case arm_id::TEQ: return generators::arm::logic::TEQ(code, settings);
@@ -237,8 +245,89 @@ std::string disassemble::arm_generate(const u32 code, const u32 PC, const settin
237245
case arm_id::FTOUIS: return generators::arm::vfp::FTOUIS(code, settings);
238246
case arm_id::FUITOD: return generators::arm::vfp::FUITOD(code, settings);
239247
case arm_id::FUITOS: return generators::arm::vfp::FUITOS(code, settings);
248+
case arm_id::CPS: return generators::arm::misc::CPS(code, settings);
249+
case arm_id::CPY: return generators::arm::movement::CPY(code, settings);
250+
case arm_id::LDREX: return generators::arm::load::LDREX(code, settings);
251+
case arm_id::MCRR2: return generators::arm::dsp::MCRR(code, settings);
252+
case arm_id::MRRC2: return generators::arm::dsp::MRRC(code, settings);
253+
case arm_id::PKHBT: return generators::arm::logic::PKHBT(code, settings);
254+
case arm_id::PKHTB: return generators::arm::logic::PKHTB(code, settings);
255+
case arm_id::QADD16: return generators::arm::math::QADD16(code, settings);
256+
case arm_id::QADD8: return generators::arm::math::QADD8(code, settings);
257+
case arm_id::QADDSUBX: return generators::arm::math::QADDSUBX(code, settings);
258+
case arm_id::QSUB16: return generators::arm::math::QSUB16(code, settings);
259+
case arm_id::QSUB8: return generators::arm::math::QSUB8(code, settings);
260+
case arm_id::QSUBADDX: return generators::arm::math::QSUBADDX(code, settings);
261+
case arm_id::REV: return generators::arm::logic::REV(code, settings);
262+
case arm_id::REV16: return generators::arm::logic::REV16(code, settings);
263+
case arm_id::REVSH: return generators::arm::logic::REVSH(code, settings);
264+
case arm_id::RFE: // TODO
265+
case arm_id::SADD16: // TODO
266+
case arm_id::SADD8: // TODO
267+
case arm_id::SADDSUBX: // TODO
268+
case arm_id::SEL: // TODO
269+
case arm_id::SETEND: // TODO
270+
case arm_id::SHADD16: // TODO
271+
case arm_id::SHADD8: // TODO
272+
case arm_id::SHADDSUBX: // TODO
273+
case arm_id::SHSUB16: // TODO
274+
case arm_id::SHSUB8: // TODO
275+
case arm_id::SHSUBADDX: // TODO
276+
case arm_id::SMLAD: // TODO
277+
case arm_id::SMLALD: // TODO
278+
case arm_id::SMLSD: // TODO
279+
case arm_id::SMLSLD: // TODO
280+
case arm_id::SMMLA: // TODO
281+
case arm_id::SMMLS: // TODO
282+
case arm_id::SMMUL: // TODO
283+
case arm_id::SMUAD: // TODO
284+
case arm_id::SMUSD: // TODO
285+
case arm_id::SRS: // TODO
286+
case arm_id::SSAT: // TODO
287+
case arm_id::SSAT16: // TODO
288+
case arm_id::SSUB16: // TODO
289+
case arm_id::SSUB8: // TODO
290+
case arm_id::SSUBADDX: // TODO
291+
case arm_id::STREX: // TODO
292+
case arm_id::SXTAB: // TODO
293+
case arm_id::SXTAB16: // TODO
294+
case arm_id::SXTAH: // TODO
295+
case arm_id::SXTB: // TODO
296+
case arm_id::SXTB16: // TODO
297+
case arm_id::SXTH: // TODO
298+
case arm_id::UADD16: // TODO
299+
case arm_id::UADD8: // TODO
300+
case arm_id::UADDSUBX: // TODO
301+
case arm_id::UHADD16: // TODO
302+
case arm_id::UHADD8: // TODO
303+
case arm_id::UHADDSUBX: // TODO
304+
case arm_id::UHSUB16: // TODO
305+
case arm_id::UHSUB8: // TODO
306+
case arm_id::UHSUBADDX: // TODO
307+
case arm_id::UMAAL: // TODO
308+
case arm_id::UQADD16: // TODO
309+
case arm_id::UQADD8: // TODO
310+
case arm_id::UQADDSUBX: // TODO
311+
case arm_id::UQSUB16: // TODO
312+
case arm_id::UQSUB8: // TODO
313+
case arm_id::UQSUBADDX: // TODO
314+
case arm_id::USAD8: // TODO
315+
case arm_id::USADA8: // TODO
316+
case arm_id::USAT: // TODO
317+
case arm_id::USAT16: // TODO
318+
case arm_id::USUB16: // TODO
319+
case arm_id::USUB8: // TODO
320+
case arm_id::USUBADDX: // TODO
321+
case arm_id::UXTAB: // TODO
322+
case arm_id::UXTAB16: // TODO
323+
case arm_id::UXTAH: // TODO
324+
case arm_id::UXTB: // TODO
325+
case arm_id::UXTB16: // TODO
326+
case arm_id::UXTH: // TODO
327+
case arm_id::NOP: return generators::arm::misc::NOP();
240328
case arm_id::UNKNOWN: llarm::out::error("Unknown instruction encountered for disassembly");
241-
case arm_id::UNDEFINED: return UNDEFINED; // llarm::out::error("Undefined instruction encountered for disassembly");
329+
case arm_id::UNDEFINED: return UNDEFINED;
330+
break;
242331
}
243332
}
244333

@@ -336,7 +425,16 @@ std::string disassemble::thumb_id_to_string(const thumb_id id) {
336425
case thumb_id::STRB2: return "STRB2";
337426
case thumb_id::STRH1: return "STRH1";
338427
case thumb_id::STRH2: return "STRH2";
339-
}
428+
case thumb_id::CPS: return "CPS";
429+
case thumb_id::REV16: return "REV16";
430+
case thumb_id::REVSH: return "REVSH";
431+
case thumb_id::SETEND: return "SETEND";
432+
case thumb_id::SXTB: return "SXTB";
433+
case thumb_id::SXTH: return "SXTH";
434+
case thumb_id::UXTB: return "UXTB";
435+
case thumb_id::UXTH: return "UXTH";
436+
break;
437+
}
340438
}
341439

342440

@@ -490,5 +588,85 @@ std::string disassemble::arm_id_to_string(const arm_id id) {
490588
case arm_id::MCR2: return "MCR2";
491589
case arm_id::MRC2: return "MRC2";
492590
case arm_id::STC2: return "STC2";
591+
case arm_id::CPS: return "CPS";
592+
case arm_id::CPY: return "CPY";
593+
case arm_id::LDREX: return "LDREX";
594+
case arm_id::MCRR2: return "MCRR2";
595+
case arm_id::MRRC2: return "MRRC2";
596+
case arm_id::PKHBT: return "PKHBT";
597+
case arm_id::PKHTB: return "PKHTB";
598+
case arm_id::QADD16: return "QADD16";
599+
case arm_id::QADD8: return "QADD8";
600+
case arm_id::QADDSUBX: return "QADDSUBX";
601+
case arm_id::QSUB16: return "QSUB16";
602+
case arm_id::QSUB8: return "QSUB8";
603+
case arm_id::QSUBADDX: return "QSUBADDX";
604+
case arm_id::REV: return "REV";
605+
case arm_id::REV16: return "REV16";
606+
case arm_id::REVSH: return "REVSH";
607+
case arm_id::RFE: return "RFE";
608+
case arm_id::SADD16: return "SADD16";
609+
case arm_id::SADD8: return "SADD8";
610+
case arm_id::SADDSUBX: return "SADDSUBX";
611+
case arm_id::SEL: return "SEL";
612+
case arm_id::SETEND: return "SETEND";
613+
case arm_id::SHADD16: return "SHADD16";
614+
case arm_id::SHADD8: return "SHADD8";
615+
case arm_id::SHADDSUBX: return "SHADDSUBX";
616+
case arm_id::SHSUB16: return "SHSUB16";
617+
case arm_id::SHSUB8: return "SHSUB8";
618+
case arm_id::SHSUBADDX: return "SHSUBADDX";
619+
case arm_id::SMLAD: return "SMLAD";
620+
case arm_id::SMLALD: return "SMLALD";
621+
case arm_id::SMLSD: return "SMLSD";
622+
case arm_id::SMLSLD: return "SMLSLD";
623+
case arm_id::SMMLA: return "SMMLA";
624+
case arm_id::SMMLS: return "SMMLS";
625+
case arm_id::SMMUL: return "SMMUL";
626+
case arm_id::SMUAD: return "SMUAD";
627+
case arm_id::SMUSD: return "SMUSD";
628+
case arm_id::SRS: return "SRS";
629+
case arm_id::SSAT: return "SSAT";
630+
case arm_id::SSAT16: return "SSAT16";
631+
case arm_id::SSUB16: return "SSUB16";
632+
case arm_id::SSUB8: return "SSUB8";
633+
case arm_id::SSUBADDX: return "SSUBADDX";
634+
case arm_id::STREX: return "STREX";
635+
case arm_id::SXTAB: return "SXTAB";
636+
case arm_id::SXTAB16: return "SXTAB16";
637+
case arm_id::SXTAH: return "SXTAH";
638+
case arm_id::SXTB: return "SXTB";
639+
case arm_id::SXTB16: return "SXTB16";
640+
case arm_id::SXTH: return "SXTH";
641+
case arm_id::UADD16: return "UADD16";
642+
case arm_id::UADD8: return "UADD8";
643+
case arm_id::UADDSUBX: return "UADDSUBX";
644+
case arm_id::UHADD16: return "UHADD16";
645+
case arm_id::UHADD8: return "UHADD8";
646+
case arm_id::UHADDSUBX: return "UHADDSUBX";
647+
case arm_id::UHSUB16: return "UHSUB16";
648+
case arm_id::UHSUB8: return "UHSUB8";
649+
case arm_id::UHSUBADDX: return "UHSUBADDX";
650+
case arm_id::UMAAL: return "UMAAL";
651+
case arm_id::UQADD16: return "UQADD16";
652+
case arm_id::UQADD8: return "UQADD8";
653+
case arm_id::UQADDSUBX: return "UQADDSUBX";
654+
case arm_id::UQSUB16: return "UQSUB16";
655+
case arm_id::UQSUB8: return "UQSUB8";
656+
case arm_id::UQSUBADDX: return "UQSUBADDX";
657+
case arm_id::USAD8: return "USAD8";
658+
case arm_id::USADA8: return "USADA8";
659+
case arm_id::USAT: return "USAT";
660+
case arm_id::USAT16: return "USAT16";
661+
case arm_id::USUB16: return "USUB16";
662+
case arm_id::USUB8: return "USUB8";
663+
case arm_id::USUBADDX: return "USUBADDX";
664+
case arm_id::UXTAB: return "UXTAB";
665+
case arm_id::UXTAB16: return "UXTAB16";
666+
case arm_id::UXTAH: return "UXTAH";
667+
case arm_id::UXTB: return "UXTB";
668+
case arm_id::UXTB16: return "UXTB16";
669+
case arm_id::UXTH: return "UXTH";
670+
break;
493671
}
494672
}

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