Skip to content

Commit 581f5d4

Browse files
GregACmsfschaffner
authored andcommitted
[lint] Minor lint fixes
1 parent 3d13c6c commit 581f5d4

File tree

2 files changed

+3
-3
lines changed

2 files changed

+3
-3
lines changed

rtl/ibex_controller.sv

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -896,7 +896,7 @@ module ibex_controller #(
896896
end
897897

898898
`ASSERT(PipeEmptyOnIrq, ctrl_fsm_cs != IRQ_TAKEN & ctrl_fsm_ns == IRQ_TAKEN |->
899-
~instr_valid_i & ready_wb_i);
899+
~instr_valid_i & ready_wb_i)
900900

901901
//////////
902902
// FCOV //

rtl/ibex_top.sv

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1230,8 +1230,8 @@ module ibex_top import ibex_pkg::*; #(
12301230
// Clear flag when we see an MRET
12311231
sync_exc_seen <= 1'b0;
12321232
end else if (rvfi_valid && insn_write_sync_exc_seen(rvfi_insn)) begin
1233-
// Update predicted sync_exc_seen when the instruction modifies the relevant CPUCTRLSTS CSR
1234-
// bit.
1233+
// Update predicted sync_exc_seen when the instruction modifies the relevant CPUCTRLSTS
1234+
// CSR bit.
12351235
sync_exc_seen <= new_sync_exc_bit(rvfi_insn, rvfi_rs1_rdata, sync_exc_seen);
12361236
end
12371237
end

0 commit comments

Comments
 (0)