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[fpv] Fix linting issues in oustanding access tracking logic
This refactors the code to avoid a -1 index access that caused no issues in functional verification but caused lint errors and is problematic for formal tools. Fixes #1799
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rtl/ibex_top.sv

Lines changed: 12 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1117,15 +1117,21 @@ module ibex_top import ibex_pkg::*; #(
11171117
end
11181118
end
11191119

1120-
always_comb begin
1121-
pending_dside_accesses_d[i] = pending_dside_accesses_shifted[i];
1120+
if (i == 0) begin : g_track_first_entry
1121+
always_comb begin
1122+
pending_dside_accesses_d[i] = pending_dside_accesses_shifted[i];
11221123

1123-
if (data_req_o && data_gnt_i) begin
1124-
if (i == 0 && !pending_dside_accesses_shifted[i].valid) begin
1124+
if (data_req_o && data_gnt_i && !pending_dside_accesses_shifted[i].valid) begin
11251125
pending_dside_accesses_d[i].valid = 1'b1;
11261126
pending_dside_accesses_d[i].is_read = ~data_we_o;
1127-
end else if (pending_dside_accesses_shifted[i - 1].valid &
1128-
!pending_dside_accesses_shifted[i].valid) begin
1127+
end
1128+
end
1129+
end else begin : g_track_other_entries
1130+
always_comb begin
1131+
pending_dside_accesses_d[i] = pending_dside_accesses_shifted[i];
1132+
1133+
if (data_req_o && data_gnt_i && pending_dside_accesses_shifted[i - 1].valid &&
1134+
!pending_dside_accesses_shifted[i].valid) begin
11291135
pending_dside_accesses_d[i].valid = 1'b1;
11301136
pending_dside_accesses_d[i].is_read = ~data_we_o;
11311137
end

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