From e338d61823a9bd7d7ce9205d57727c8e920fc0d1 Mon Sep 17 00:00:00 2001
From: Saad Khalid <saad.khalid@lowrisc.org>
Date: Mon, 27 Feb 2023 20:21:04 +0000
Subject: [PATCH] added a makefile for running directed tests on verilator
 simple system

---
 dv/uvm/core_ibex/directed_tests/ibex_macros.h | 14 ++++++--
 examples/sw/simple_system/Makefile            | 36 +++++++++++++++++++
 2 files changed, 47 insertions(+), 3 deletions(-)
 create mode 100644 examples/sw/simple_system/Makefile

diff --git a/dv/uvm/core_ibex/directed_tests/ibex_macros.h b/dv/uvm/core_ibex/directed_tests/ibex_macros.h
index 634e1b7f0f..cbe0c4a9e1 100644
--- a/dv/uvm/core_ibex/directed_tests/ibex_macros.h
+++ b/dv/uvm/core_ibex/directed_tests/ibex_macros.h
@@ -3,14 +3,23 @@
 // SPDX-License-Identifier: Apache-2.0
 
 // Ibex specific macros
-#define SIGNATURE_ADDR 0x8ffffff8
 
 // signatue type - should be stored at sign_addr[7:0]
-#define CORE_STATUS 0x0
 #define TEST_RESULT 0x1
 #define WRITE_GPR 0x2
 #define WRITE_CSR 0x3
 
+// writing 0x1 to signature address to end the test for simple system
+#ifdef SIMPLE_SYSTEM
+#define SIGNATURE_ADDR 0x20008
+#define CORE_STATUS 0x1
+#define FINISHED_IRQ 0x0
+#else
+#define SIGNATURE_ADDR 0x8ffffff8
+#define CORE_STATUS 0x0
+#define FINISHED_IRQ 0x7
+#endif
+
 // core status - should be stored at sign_addr[12:8]
 #define INITIALIZED 0x0
 #define IN_DEBUG_MODE 0x1
@@ -19,7 +28,6 @@
 #define IN_SUPERVISOR_MODE 0x4
 #define IN_USER_MODE 0x5
 #define HANDLING_IRQ 0x6
-#define FINISHED_IRQ 0x7
 #define HANDLING_EXCEPTION 0x8
 #define INSTR_FAULT_EXCEPTION 0x9
 #define ILLEGAL_INSTR_EXCEPTION 0xa
diff --git a/examples/sw/simple_system/Makefile b/examples/sw/simple_system/Makefile
new file mode 100644
index 0000000000..8c111a5d1d
--- /dev/null
+++ b/examples/sw/simple_system/Makefile
@@ -0,0 +1,36 @@
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+COSIM ?= lowrisc:ibex:ibex_simple_system_cosim
+LINKER ?= ./common/link.ld
+CFLAGS := -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles
+INCLUDE_FILES := -I../../../vendor/riscv-test-env/ \
+		 -I../../../vendor/riscv-test-env/p/ \
+		 -I../../../vendor/riscv-tests/isa/macros/scalar/ \
+		 -I../../../dv/uvm/core_ibex/directed_tests \
+		 -T$(LINKER) \
+		 -DSIMPLE_SYSTEM
+
+DIRECTED_TESTS_PATH ?= ../../../dv/uvm/core_ibex/directed_tests
+TEST_PATH ?= $(DIRECTED_TESTS_PATH)/empty/empty.S
+TEST := $(shell basename $(TEST_PATH) .S)
+
+RISCV_OBJDUMP := $(patsubst %-gcc,%-,$(RISCV_GCC))objdump
+
+run: build_rtl compile_prog run_prebuilt_rtl
+
+build_rtl:
+	fusesoc --cores-root=../../../ run --target=sim --setup --build $(COSIM) --RV32E=0 --RV32M=ibex_pkg::RV32MFast --PMPEnable=1
+
+compile_prog:
+	$(RISCV_GCC) $(CFLAGS) $(INCLUDE_FILES) -o $(TEST).elf $(TEST_PATH)
+	$(RISCV_OBJDUMP) -DS $(TEST).elf > $(TEST).dis
+
+run_prebuilt_rtl: compile_prog run_precompiled_test
+
+run_precompiled_test:
+	./build/lowrisc_ibex_ibex_simple_system_cosim_0/sim-verilator/Vibex_simple_system --meminit=ram,$(TEST).elf
+
+clean:
+	$(RM) -f *.o *.elf *.dis *.log