Skip to content

Ambiq Apollo3: Make SFE_ARTEMIS use arduino uno form factor, fix GPIO IRQ API #473

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 24 commits into
base: master
Choose a base branch
from

Conversation

multiplemonomials
Copy link
Collaborator

Summary of changes

I'm starting to test Ambiq Apollo3 on the CI test shield. In order to do this, I first had to add arduino uno form factor support for the SFE_ARTEMIS board. This board does use the physical arduino uno form factor, but was not configured as such in Mbed, meaning the test shield project wouldn't compile. I updated PinNames.h to fix this.

With that sorted out, I investigated some failures I was seeing in the InterruptIn test. Turns out that there were two bugs in this target's implementation:

  • For some god-awful reason (I think due to reuse of register fields for multiple meanings), the Apollo3 does not allow you to read a GPIO pin normally if it's configured to have interrupts disabled. This meant that calling InterruptIn::read() after constructing the object but before calling rise() or fall() would always return 0 instead of the actual logic level on the pin
    • Yes, this means that in normal operation interrupts are actually enabled but masked on every single GPIO pin
  • Incorrect logic in the HAL meant that if you enabled both rise and fall interrupts on a pin, it would call InterruptIn::_irq_handler() with IRQ_RISE | IRQ_FALL as the even argument, which is not valid and led to no callback getting executed.

To fix the first issue, I set up a workaround where the pin is kept in interrupts-enabled-but-masked mode when no interrupt is configured, so that it can be read. To fix the second issue, I updated the HAL to read the pin state in the ISR and then send the rise or fall event accordingly. This is a little bit janky, but should work OK in most cases, and it's how STM32 HAL currently works.

Impact of changes

  • InterruptIn::read() now works on Apollo3 if no interrupt is configured
  • You can now set rising and falling edge callbacks on a single pin on Apollo3 and they will both get called

Migration actions required

Documentation

None


Pull request type

[X] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

[] No Tests required for this change (E.g docs only update)
[] Covered by existing mbed-os tests (Greentea or Unittest)
[X] Tests / results supplied as part of this PR

InterruptIn test shield test now passes (except some weird analog propagation time related stuff that I still need to debug).


A8 = D8,
A9 = D9,
A10 = D10,
p0 = 25,
Copy link
Collaborator Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

We can't name these pins "Dx" or "Ax" because those names are defined by PinNameAliases.h. Instead I have to name the actual pin names in the enum something else.

@multiplemonomials multiplemonomials force-pushed the dev/ambiq-arduino-ff-and-fix-gpio-irq branch from 0f9bb18 to b5c7229 Compare June 28, 2025 16:09
@multiplemonomials multiplemonomials force-pushed the dev/ambiq-arduino-ff-and-fix-gpio-irq branch from b5c7229 to 959e515 Compare June 28, 2025 16:22
@multiplemonomials multiplemonomials force-pushed the dev/improve-python-structure branch from 6a2de1d to 05f37a0 Compare June 29, 2025 04:30
Base automatically changed from dev/improve-python-structure to master June 29, 2025 17:57
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

1 participant