Ibex Compatibility Refactor: Integrate Ibex-Specific Generator, Test Base, and Flow Updates #1
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…oesnt recognise the new signature address as we didnt pass a signature address to it
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This PR adds and refactors key components in riscv-dv to enable seamless test generation and simulation for the Ibex RISC-V core. The main changes include:
Ibex-Specific Assembly Generator:
Introduced
ibex_asm_program_gen.pyto handle Ibex’s unique trap/interrupt vector placement, program headers, and exception handling.New Ibex Base Test Class:
Added
ibex_instr_base_test.py, which leverages the Ibex generator and applies directed instruction streams tailored for Ibex.Testlist and Configuration Updates:
New Ibex-oriented entries in
base_testlist.yamlfor arithmetic, random, and load/store tests. Updated core settings to support Ibex’s privilege modes and vectored interrupts.Documentation Improvements:
README extended with Ibex-specific motivation, usage, and technical details. Added a reference file listing supported PyFlow tests for Ibex.
Motivation:
These changes allow riscv-dv to generate ELF and assembly files that work directly with Ibex, respecting its boot/reset and pass/fail conventions. This enables easier simulation, test extension, and maintenance for Ibex users.