MPAE-16817: fixed images

Author: Diana Loles

README.md

@@ -55,20 +55,20 @@ The following configurations must be made for this project:
   - Enable CLC: Yes
   - Logic Cell mode: AND-OR
 
-  <br><img src="images/CLC1.PNG" width="600">
+  <br><img src="images/CLC1.png" width="600">
 
 - CLC2:
   - Enable CLC: Yes
   - Logic Cell mode: AND-OR
 
-  <br><img src="images/CLC2.PNG" width="600">
+  <br><img src="images/CLC2.png" width="600">
 
 - FVR:
   - Enable FVR: Yes
   - FVR buffer gain to ADC: 1x
   - FVR buffer gain to other peripherals: 1x
 
-  <br><img src="images/FVR.PNG" width="600">
+  <br><img src="images/FVR.png" width="600">
 
 - ADCC:
   - Enable ADC: Yes