MPAE-18704 Added images and improved README

Author: CoffeeConsumer

README.md

@@ -14,7 +14,7 @@ This code example demonstrates how the Signal Routing (SR) Port can be used toge
 - [MPLAB Code Configurator](https://www.microchip.com/en-us/development-tools-tools-and-software/embedded-software-center/mplab-code-configurator)
 - [PIC18-Q24 Family Product Page](https://www.microchip.com/en-us/products/microcontrollers-and-microprocessors/8-bit-mcus/pic-mcus/pic18-q24)
 - [Signal Routing (SR) Ports](https://www.microchip.com/en-us/products/microcontrollers-and-microprocessors/8-bit-mcus/core-independent-and-analog-peripherals/system-flexibility/sr-ports)
-- [Using the Signal Routing Port Module on 8-bit PIC® Microcontrollers](https://onlinedocs.microchip.com/oxy/GUID-96F76A4E-B136-4F77-9780-CE93A4E1C9B7-en-US-5/index.html)
+- [Using the Signal Routing Port Module on 8-bit PIC® Microcontrollers](https://onlinedocs.microchip.com/oxy/GUID-96F76A4E-B136-4F77-9780-CE93A4E1C9B7-en-US-5/index.html)
 
 ## Software Used
 
@@ -37,7 +37,7 @@ Finite State Machines (FSM)s are an important concept in the design of digital s
    - Next State Logic. The Next State Logic dictates how the system will transistion from one state to the next based on the current state and the input.
    - Output Logic. The output logic controls the outputs of the system based on the current state in the case of a Moore Machine, or a combination of inputs and the current state, in the case of a Mealy Machine.
 
-When building embedded systems, FSMs are typically implemented in software. Using the SR PORT, CLCs, and other peripherals present on PIC microcontrollers, it is possible to build functional state machines that can operate with little or no CPU intervention. Implementing state machines this way frees up the CPU to perfrom other task, which can greatly improve the peformance of a system. The Figure below illustrates how state machines can be implemented using SR PORT and CLCs:
+When building embedded systems, FSMs are typically implemented in software. Using the SR PORT, Configurable Logic Cells (CLC)s, and other peripherals present on PIC microcontrollers, it is possible to build functional state machines that can operate with little or no CPU intervention. Implementing state machines this way frees up the CPU to perfrom other tasks, which can greatly improve the peformance of a system. The Figure below illustrates how state machines can be implemented using the SR PORT and CLCs:
 <br><img src="images/Moore State Machine.png">
 <br><img src="images/Mealy State Machine.png">
 
@@ -46,15 +46,15 @@ When building embedded systems, FSMs are typically implemented in software. Usin
 
 The DHT22 Sensor is a temperature/humidity sensor that uses a custom single wire protocol for transmitting data. The sensor transmits 40 bits of data: two bytes for the temperature data, two bytes for the humidity data, and one checksum byte. Getting data from the sensor consists of three steps:
 1. The controller pulls the data line low for 20 milliseconds to intiate communication with the sensor and then releases the line
-2. AFter 20 microseconds, the sensor pulls the data line low for 50 microseconds and then releases the data line
+2. After 20 microseconds, the sensor pulls the data line low for 50 microseconds and then releases the data line
 3. After another 50 microseconds, the sensor starts transmitting data
 <br>
 The sensor transmits each bit by pulling the data line low for 50 microseconds and then releasing the line. To transmit a `'0'` the sensor releases the line for 28 microseconds before transmitting the next bit. To transmit a `'1'`, the sensor releases the line for 70 microseconds before transmitting the next bit. The waveform below illustrates the transmission process.
 <br><img src="images/DHT22_Signal.png">  
 
 ## System Design
 
-Using the SRPORT and CIPs, getting data from the DHT22 sensor can be done entirely in hardware with no software intervention. The first step to desinging a state machine to read the DHT22 sensor is to define the necessary system states. This state machine will have six states, each of which can be encoded using a three bit number:
+Using the SRPORT and CIPs, getting data from the DHT22 sensor can be done entirely in hardware with no software intervention. The first step to designing a state machine to read the DHT22 sensor is to define the necessary system states. This state machine will have six states, each of which can be encoded using a three bit number:
 <br><br>
 **DHT22 System States**
 |  State   |                  Output                      |  Binary Encoding   | 
@@ -78,11 +78,11 @@ The transitions between each state can be described using a state transistion di
 <br><img src="images/DHT22_State_Diagram.png"> 
 
 To start the transmission, TU16B is used in one-shot mode to generate a 20ms low pulse on the
-DHT22 data line. Once the line is released, the state machine will look for a pattern of high, low, high, low to detect when the DHT22 will begin to transmit data. Once the state machine enters the RX state, the SPI is used in conjunction with Timer 2 and one CLC to read each bit. The CLC is used to produce a version of the DHT22 signal without the start and wait sections. This signal can then be routed internally to the data line of the SPI. Timer 2 can use this signal to produce a clock signal for the SPI that will allow the SPI to clock in either a `‘1’` or `‘0’`. Universal Timer A is used to count the number of bits transmitted by the DHT22 and generate the F signal once 40 bits have been detected. A timing diagram illustrating a complete transmission process is shown below:
+DHT22 data line. Once the line is released, the state machine will look for a pattern of high, low, high, low to detect when the DHT22 will begin to transmit data. Once the state machine enters the RX state, the SPI is used in conjunction with Timer 2 and one CLC to read each bit. The CLC is used to produce a version of the DHT22 signal without the start and wait sections. Using the SR PORT, this signal can then be routed internally to the data line of the SPI. Timer 2 can use this signal to produce a clock signal for the SPI that will allow the SPI to clock in either a `‘1’` or `‘0’`. Universal Timer A is used to count the number of bits transmitted by the DHT22 and generate the F signal once 40 bits have been detected. A timing diagram illustrating a complete transmission process is shown below:
 <br><img src="images/DHT22_Timing_Diagram.png">
 
 A state transistion table can be used to describe the state transistions based on the binary encoding of each of the states. The three-bit encoded state value will be labeled S<sub>2</sub>S<sub>1</sub>S<sub>0</sub>.
-<br><img src="images/DHT22_Transition_Table.png">
+<br><img src="images/DHT22_Transition_Table.png"><br>
 Once the state transitions have been determined, a Sum-of-Products (SOP) Boolean expression can be written for each of the next state bits. The terms of the equations can be grouped to maximize the use of each CLC. The logic for S<sub>0</sub>, S<sub>1</sub>, and S<sub>2</sub> will be implemented by CLC1, CLC2, and CLC3, respectively.
 <br><img src="images/DHT22_S0_SOP.png">
 <br><img src="images/DHT22_S1_SOP.png">
@@ -98,24 +98,34 @@ Since S<sub>2</sub> and S<sub>0</sub> each have a common term, this can be imple
 Once the state machine logic has been defined, the system can be implemented using MPLAB Melody Code Configurator. Melody is tool built in to MPLAB X that makes it easy generate code for any of the on-chip peripherals present on PIC microcontrollers. Using Melody it is easy to implement the hardware state machine with just a few clicks. The following images show the configuration of the CLCs and SR PORT
 <br><br>
 **CLC1**
-<br><img src="images/CLC1.png">
+<br><img src="images/CLC1.png"><br>
 **CLC2**
-<br><img src="images/CLC2.png">
+<br><img src="images/CLC2.png"><br>
 **CLC3**
-<br><img src="images/CLC3.png">
+<br><img src="images/CLC3.png"><br>
 **CLC4**
-<br><img src="images/CLC4.png">
+<br><img src="images/CLC4.png"><br>
 **CLC5**
-<br><img src="images/CLC5.png">
+<br><img src="images/CLC5.png"><br>
 **CLC6**
-<br><img src="images/CLC6.png">
+<br><img src="images/CLC6.png"><br>
 **CLC7**
-<br><img src="images/CLC7.png">
+<br><img src="images/CLC7.png"><br>
 **CLC8**
-<br><img src="images/CLC8.png">
+<br><img src="images/CLC8.png"><br>
 **SR PORT**
-<br><img src="images/PORTW.png">
+<br><img src="images/PORTW.png"><br>
 
+Once the peripherals are configured and code has been generated, all that is needed to start a transmission is to start Timer Counter B. Once Timer Counter B is started, the state machine in combination with the DMA and SPI modules will handle the reception of five bytes from the DHT22 sensor. An interrupt from the DMA alerts the application once all five bytes have been transferred. After the five bytes have been received, a checksum is performed in software to validate the data. If the checksum passes, the temperature and humidity readings are sent to the PC using one of the on-chip UARTs of the MCU and the Virtual Serial Port of the Curiosity HPC board.   
+
+**Pin Mapping**
+|    Signal      |   Pin  |
+|:--------------:|:------:|
+| DHT22          |   RD3  | 
+| UART Tx        |   RB0  | 
+
+**Hardware**
+<br><img src="images/HPC_Board.png"><br>
 
 ## Summary
  The SR PORT allows for advanced interconnectivity between CIPs on PIC microcontrollers. It also has the ability to individually configure each bit as a flip-flop, which enable allows the SR PORT to act as a memory element in a hardware state machine. Using the SR PORT in combination with the CLCs makes it possible to build core-independent state machinces that can offload tasks from the CPU and greatly increase system performance. This code example shows how the SR PORT can be used to seamlessly connect the on-chip peripherals of PIC microcontrollers and use the flip-flop feature of the SR PORT to implement a hardware state machine that is useful in a real-world scenario.