|
26 | 26 | // instruction into the internal form here(much like how traces/micro-ops work.)
|
27 | 27 | //
|
28 | 28 | // About +op+ and +op2+:
|
29 |
| -// When the op value is 0-239, it expresses a first-level instruction under fast |
| 29 | +// When the op value is 0x10-0xff, it expresses a first-level instruction under fast |
30 | 30 | // path, at this time the value of op2 is ignored.
|
31 |
| -// When the op value is 240-255, op and op2 are combined to express a |
| 31 | +// When the op value is 0x00-0x0f, op and op2 are combined to express a |
32 | 32 | // second-level instruction under slow path.
|
33 | 33 | pub type Instruction = u64;
|
34 | 34 |
|
35 | 35 | pub type InstructionOpcode = u16;
|
36 | 36 |
|
37 | 37 | // IMC
|
38 |
| -pub const OP_UNLOADED: InstructionOpcode = 0x00; |
39 |
| -pub const OP_ADD: InstructionOpcode = 0x01; |
40 |
| -pub const OP_ADDI: InstructionOpcode = 0x02; |
41 |
| -pub const OP_ADDIW: InstructionOpcode = 0x03; |
42 |
| -pub const OP_ADDW: InstructionOpcode = 0x04; |
43 |
| -pub const OP_AND: InstructionOpcode = 0x05; |
44 |
| -pub const OP_ANDI: InstructionOpcode = 0x06; |
45 |
| -pub const OP_AUIPC: InstructionOpcode = 0x07; |
46 |
| -pub const OP_BEQ: InstructionOpcode = 0x08; |
47 |
| -pub const OP_BGE: InstructionOpcode = 0x09; |
48 |
| -pub const OP_BGEU: InstructionOpcode = 0x0A; |
49 |
| -pub const OP_BLT: InstructionOpcode = 0x0B; |
50 |
| -pub const OP_BLTU: InstructionOpcode = 0x0C; |
51 |
| -pub const OP_BNE: InstructionOpcode = 0x0D; |
52 |
| -pub const OP_DIV: InstructionOpcode = 0x0E; |
53 |
| -pub const OP_DIVU: InstructionOpcode = 0x0F; |
54 |
| -pub const OP_DIVUW: InstructionOpcode = 0x10; |
55 |
| -pub const OP_DIVW: InstructionOpcode = 0x11; |
56 |
| -pub const OP_EBREAK: InstructionOpcode = 0x12; |
57 |
| -pub const OP_ECALL: InstructionOpcode = 0x13; |
58 |
| -pub const OP_FENCE: InstructionOpcode = 0x14; |
59 |
| -pub const OP_FENCEI: InstructionOpcode = 0x15; |
60 |
| -pub const OP_JAL: InstructionOpcode = 0x16; |
61 |
| -pub const OP_JALR: InstructionOpcode = 0x17; |
62 |
| -pub const OP_LB: InstructionOpcode = 0x18; |
63 |
| -pub const OP_LBU: InstructionOpcode = 0x19; |
64 |
| -pub const OP_LD: InstructionOpcode = 0x1A; |
65 |
| -pub const OP_LH: InstructionOpcode = 0x1B; |
66 |
| -pub const OP_LHU: InstructionOpcode = 0x1C; |
67 |
| -pub const OP_LUI: InstructionOpcode = 0x1D; |
68 |
| -pub const OP_LW: InstructionOpcode = 0x1E; |
69 |
| -pub const OP_LWU: InstructionOpcode = 0x1F; |
70 |
| -pub const OP_MUL: InstructionOpcode = 0x20; |
71 |
| -pub const OP_MULH: InstructionOpcode = 0x21; |
72 |
| -pub const OP_MULHSU: InstructionOpcode = 0x22; |
73 |
| -pub const OP_MULHU: InstructionOpcode = 0x23; |
74 |
| -pub const OP_MULW: InstructionOpcode = 0x24; |
75 |
| -pub const OP_OR: InstructionOpcode = 0x25; |
76 |
| -pub const OP_ORI: InstructionOpcode = 0x26; |
77 |
| -pub const OP_REM: InstructionOpcode = 0x27; |
78 |
| -pub const OP_REMU: InstructionOpcode = 0x28; |
79 |
| -pub const OP_REMUW: InstructionOpcode = 0x29; |
80 |
| -pub const OP_REMW: InstructionOpcode = 0x2A; |
81 |
| -pub const OP_SB: InstructionOpcode = 0x2B; |
82 |
| -pub const OP_SD: InstructionOpcode = 0x2C; |
83 |
| -pub const OP_SH: InstructionOpcode = 0x2D; |
84 |
| -pub const OP_SLL: InstructionOpcode = 0x2E; |
85 |
| -pub const OP_SLLI: InstructionOpcode = 0x2F; |
86 |
| -pub const OP_SLLIW: InstructionOpcode = 0x30; |
87 |
| -pub const OP_SLLW: InstructionOpcode = 0x31; |
88 |
| -pub const OP_SLT: InstructionOpcode = 0x32; |
89 |
| -pub const OP_SLTI: InstructionOpcode = 0x33; |
90 |
| -pub const OP_SLTIU: InstructionOpcode = 0x34; |
91 |
| -pub const OP_SLTU: InstructionOpcode = 0x35; |
92 |
| -pub const OP_SRA: InstructionOpcode = 0x36; |
93 |
| -pub const OP_SRAI: InstructionOpcode = 0x37; |
94 |
| -pub const OP_SRAIW: InstructionOpcode = 0x38; |
95 |
| -pub const OP_SRAW: InstructionOpcode = 0x39; |
96 |
| -pub const OP_SRL: InstructionOpcode = 0x3A; |
97 |
| -pub const OP_SRLI: InstructionOpcode = 0x3B; |
98 |
| -pub const OP_SRLIW: InstructionOpcode = 0x3C; |
99 |
| -pub const OP_SRLW: InstructionOpcode = 0x3D; |
100 |
| -pub const OP_SUB: InstructionOpcode = 0x3E; |
101 |
| -pub const OP_SUBW: InstructionOpcode = 0x3F; |
102 |
| -pub const OP_SW: InstructionOpcode = 0x40; |
103 |
| -pub const OP_XOR: InstructionOpcode = 0x41; |
104 |
| -pub const OP_XORI: InstructionOpcode = 0x42; |
| 38 | +pub const OP_UNLOADED: InstructionOpcode = 0x10; |
| 39 | +pub const OP_ADD: InstructionOpcode = 0x11; |
| 40 | +pub const OP_ADDI: InstructionOpcode = 0x12; |
| 41 | +pub const OP_ADDIW: InstructionOpcode = 0x13; |
| 42 | +pub const OP_ADDW: InstructionOpcode = 0x14; |
| 43 | +pub const OP_AND: InstructionOpcode = 0x15; |
| 44 | +pub const OP_ANDI: InstructionOpcode = 0x16; |
| 45 | +pub const OP_AUIPC: InstructionOpcode = 0x17; |
| 46 | +pub const OP_BEQ: InstructionOpcode = 0x18; |
| 47 | +pub const OP_BGE: InstructionOpcode = 0x19; |
| 48 | +pub const OP_BGEU: InstructionOpcode = 0x1a; |
| 49 | +pub const OP_BLT: InstructionOpcode = 0x1b; |
| 50 | +pub const OP_BLTU: InstructionOpcode = 0x1c; |
| 51 | +pub const OP_BNE: InstructionOpcode = 0x1d; |
| 52 | +pub const OP_DIV: InstructionOpcode = 0x1e; |
| 53 | +pub const OP_DIVU: InstructionOpcode = 0x1f; |
| 54 | +pub const OP_DIVUW: InstructionOpcode = 0x20; |
| 55 | +pub const OP_DIVW: InstructionOpcode = 0x21; |
| 56 | +pub const OP_EBREAK: InstructionOpcode = 0x22; |
| 57 | +pub const OP_ECALL: InstructionOpcode = 0x23; |
| 58 | +pub const OP_FENCE: InstructionOpcode = 0x24; |
| 59 | +pub const OP_FENCEI: InstructionOpcode = 0x25; |
| 60 | +pub const OP_JAL: InstructionOpcode = 0x26; |
| 61 | +pub const OP_JALR: InstructionOpcode = 0x27; |
| 62 | +pub const OP_LB: InstructionOpcode = 0x28; |
| 63 | +pub const OP_LBU: InstructionOpcode = 0x29; |
| 64 | +pub const OP_LD: InstructionOpcode = 0x2a; |
| 65 | +pub const OP_LH: InstructionOpcode = 0x2b; |
| 66 | +pub const OP_LHU: InstructionOpcode = 0x2c; |
| 67 | +pub const OP_LUI: InstructionOpcode = 0x2d; |
| 68 | +pub const OP_LW: InstructionOpcode = 0x2e; |
| 69 | +pub const OP_LWU: InstructionOpcode = 0x2f; |
| 70 | +pub const OP_MUL: InstructionOpcode = 0x30; |
| 71 | +pub const OP_MULH: InstructionOpcode = 0x31; |
| 72 | +pub const OP_MULHSU: InstructionOpcode = 0x32; |
| 73 | +pub const OP_MULHU: InstructionOpcode = 0x33; |
| 74 | +pub const OP_MULW: InstructionOpcode = 0x34; |
| 75 | +pub const OP_OR: InstructionOpcode = 0x35; |
| 76 | +pub const OP_ORI: InstructionOpcode = 0x36; |
| 77 | +pub const OP_REM: InstructionOpcode = 0x37; |
| 78 | +pub const OP_REMU: InstructionOpcode = 0x38; |
| 79 | +pub const OP_REMUW: InstructionOpcode = 0x39; |
| 80 | +pub const OP_REMW: InstructionOpcode = 0x3a; |
| 81 | +pub const OP_SB: InstructionOpcode = 0x3b; |
| 82 | +pub const OP_SD: InstructionOpcode = 0x3c; |
| 83 | +pub const OP_SH: InstructionOpcode = 0x3d; |
| 84 | +pub const OP_SLL: InstructionOpcode = 0x3e; |
| 85 | +pub const OP_SLLI: InstructionOpcode = 0x3f; |
| 86 | +pub const OP_SLLIW: InstructionOpcode = 0x40; |
| 87 | +pub const OP_SLLW: InstructionOpcode = 0x41; |
| 88 | +pub const OP_SLT: InstructionOpcode = 0x42; |
| 89 | +pub const OP_SLTI: InstructionOpcode = 0x43; |
| 90 | +pub const OP_SLTIU: InstructionOpcode = 0x44; |
| 91 | +pub const OP_SLTU: InstructionOpcode = 0x45; |
| 92 | +pub const OP_SRA: InstructionOpcode = 0x46; |
| 93 | +pub const OP_SRAI: InstructionOpcode = 0x47; |
| 94 | +pub const OP_SRAIW: InstructionOpcode = 0x48; |
| 95 | +pub const OP_SRAW: InstructionOpcode = 0x49; |
| 96 | +pub const OP_SRL: InstructionOpcode = 0x4a; |
| 97 | +pub const OP_SRLI: InstructionOpcode = 0x4b; |
| 98 | +pub const OP_SRLIW: InstructionOpcode = 0x4c; |
| 99 | +pub const OP_SRLW: InstructionOpcode = 0x4d; |
| 100 | +pub const OP_SUB: InstructionOpcode = 0x4e; |
| 101 | +pub const OP_SUBW: InstructionOpcode = 0x4f; |
| 102 | +pub const OP_SW: InstructionOpcode = 0x50; |
| 103 | +pub const OP_XOR: InstructionOpcode = 0x51; |
| 104 | +pub const OP_XORI: InstructionOpcode = 0x52; |
105 | 105 | // B
|
106 |
| -pub const OP_ADDUW: InstructionOpcode = 0x43; |
107 |
| -pub const OP_ANDN: InstructionOpcode = 0x44; |
108 |
| -pub const OP_BCLR: InstructionOpcode = 0x45; |
109 |
| -pub const OP_BCLRI: InstructionOpcode = 0x46; |
110 |
| -pub const OP_BEXT: InstructionOpcode = 0x47; |
111 |
| -pub const OP_BEXTI: InstructionOpcode = 0x48; |
112 |
| -pub const OP_BINV: InstructionOpcode = 0x49; |
113 |
| -pub const OP_BINVI: InstructionOpcode = 0x4a; |
114 |
| -pub const OP_BSET: InstructionOpcode = 0x4b; |
115 |
| -pub const OP_BSETI: InstructionOpcode = 0x4c; |
116 |
| -pub const OP_CLMUL: InstructionOpcode = 0x4d; |
117 |
| -pub const OP_CLMULH: InstructionOpcode = 0x4e; |
118 |
| -pub const OP_CLMULR: InstructionOpcode = 0x4f; |
119 |
| -pub const OP_CLZ: InstructionOpcode = 0x50; |
120 |
| -pub const OP_CLZW: InstructionOpcode = 0x51; |
121 |
| -pub const OP_CPOP: InstructionOpcode = 0x52; |
122 |
| -pub const OP_CPOPW: InstructionOpcode = 0x53; |
123 |
| -pub const OP_CTZ: InstructionOpcode = 0x54; |
124 |
| -pub const OP_CTZW: InstructionOpcode = 0x55; |
125 |
| -pub const OP_MAX: InstructionOpcode = 0x56; |
126 |
| -pub const OP_MAXU: InstructionOpcode = 0x57; |
127 |
| -pub const OP_MIN: InstructionOpcode = 0x58; |
128 |
| -pub const OP_MINU: InstructionOpcode = 0x59; |
129 |
| -pub const OP_ORCB: InstructionOpcode = 0x5a; |
130 |
| -pub const OP_ORN: InstructionOpcode = 0x5b; |
131 |
| -pub const OP_REV8: InstructionOpcode = 0x5c; |
132 |
| -pub const OP_ROL: InstructionOpcode = 0x5d; |
133 |
| -pub const OP_ROLW: InstructionOpcode = 0x5e; |
134 |
| -pub const OP_ROR: InstructionOpcode = 0x5f; |
135 |
| -pub const OP_RORI: InstructionOpcode = 0x60; |
136 |
| -pub const OP_RORIW: InstructionOpcode = 0x61; |
137 |
| -pub const OP_RORW: InstructionOpcode = 0x62; |
138 |
| -pub const OP_SEXTB: InstructionOpcode = 0x63; |
139 |
| -pub const OP_SEXTH: InstructionOpcode = 0x64; |
140 |
| -pub const OP_SH1ADD: InstructionOpcode = 0x65; |
141 |
| -pub const OP_SH1ADDUW: InstructionOpcode = 0x66; |
142 |
| -pub const OP_SH2ADD: InstructionOpcode = 0x67; |
143 |
| -pub const OP_SH2ADDUW: InstructionOpcode = 0x68; |
144 |
| -pub const OP_SH3ADD: InstructionOpcode = 0x69; |
145 |
| -pub const OP_SH3ADDUW: InstructionOpcode = 0x6a; |
146 |
| -pub const OP_SLLIUW: InstructionOpcode = 0x6b; |
147 |
| -pub const OP_XNOR: InstructionOpcode = 0x6c; |
148 |
| -pub const OP_ZEXTH: InstructionOpcode = 0x6d; |
| 106 | +pub const OP_ADDUW: InstructionOpcode = 0x53; |
| 107 | +pub const OP_ANDN: InstructionOpcode = 0x54; |
| 108 | +pub const OP_BCLR: InstructionOpcode = 0x55; |
| 109 | +pub const OP_BCLRI: InstructionOpcode = 0x56; |
| 110 | +pub const OP_BEXT: InstructionOpcode = 0x57; |
| 111 | +pub const OP_BEXTI: InstructionOpcode = 0x58; |
| 112 | +pub const OP_BINV: InstructionOpcode = 0x59; |
| 113 | +pub const OP_BINVI: InstructionOpcode = 0x5a; |
| 114 | +pub const OP_BSET: InstructionOpcode = 0x5b; |
| 115 | +pub const OP_BSETI: InstructionOpcode = 0x5c; |
| 116 | +pub const OP_CLMUL: InstructionOpcode = 0x5d; |
| 117 | +pub const OP_CLMULH: InstructionOpcode = 0x5e; |
| 118 | +pub const OP_CLMULR: InstructionOpcode = 0x5f; |
| 119 | +pub const OP_CLZ: InstructionOpcode = 0x60; |
| 120 | +pub const OP_CLZW: InstructionOpcode = 0x61; |
| 121 | +pub const OP_CPOP: InstructionOpcode = 0x62; |
| 122 | +pub const OP_CPOPW: InstructionOpcode = 0x63; |
| 123 | +pub const OP_CTZ: InstructionOpcode = 0x64; |
| 124 | +pub const OP_CTZW: InstructionOpcode = 0x65; |
| 125 | +pub const OP_MAX: InstructionOpcode = 0x66; |
| 126 | +pub const OP_MAXU: InstructionOpcode = 0x67; |
| 127 | +pub const OP_MIN: InstructionOpcode = 0x68; |
| 128 | +pub const OP_MINU: InstructionOpcode = 0x69; |
| 129 | +pub const OP_ORCB: InstructionOpcode = 0x6a; |
| 130 | +pub const OP_ORN: InstructionOpcode = 0x6b; |
| 131 | +pub const OP_REV8: InstructionOpcode = 0x6c; |
| 132 | +pub const OP_ROL: InstructionOpcode = 0x6d; |
| 133 | +pub const OP_ROLW: InstructionOpcode = 0x6e; |
| 134 | +pub const OP_ROR: InstructionOpcode = 0x6f; |
| 135 | +pub const OP_RORI: InstructionOpcode = 0x70; |
| 136 | +pub const OP_RORIW: InstructionOpcode = 0x71; |
| 137 | +pub const OP_RORW: InstructionOpcode = 0x72; |
| 138 | +pub const OP_SEXTB: InstructionOpcode = 0x73; |
| 139 | +pub const OP_SEXTH: InstructionOpcode = 0x74; |
| 140 | +pub const OP_SH1ADD: InstructionOpcode = 0x75; |
| 141 | +pub const OP_SH1ADDUW: InstructionOpcode = 0x76; |
| 142 | +pub const OP_SH2ADD: InstructionOpcode = 0x77; |
| 143 | +pub const OP_SH2ADDUW: InstructionOpcode = 0x78; |
| 144 | +pub const OP_SH3ADD: InstructionOpcode = 0x79; |
| 145 | +pub const OP_SH3ADDUW: InstructionOpcode = 0x7a; |
| 146 | +pub const OP_SLLIUW: InstructionOpcode = 0x7b; |
| 147 | +pub const OP_XNOR: InstructionOpcode = 0x7c; |
| 148 | +pub const OP_ZEXTH: InstructionOpcode = 0x7d; |
149 | 149 | // Mop
|
150 |
| -pub const OP_WIDE_MUL: InstructionOpcode = 0x6e; |
151 |
| -pub const OP_WIDE_MULU: InstructionOpcode = 0x6f; |
152 |
| -pub const OP_WIDE_MULSU: InstructionOpcode = 0x70; |
153 |
| -pub const OP_WIDE_DIV: InstructionOpcode = 0x71; |
154 |
| -pub const OP_WIDE_DIVU: InstructionOpcode = 0x72; |
155 |
| -pub const OP_FAR_JUMP_REL: InstructionOpcode = 0x73; |
156 |
| -pub const OP_FAR_JUMP_ABS: InstructionOpcode = 0x74; |
157 |
| -pub const OP_ADC: InstructionOpcode = 0x75; |
158 |
| -pub const OP_SBB: InstructionOpcode = 0x76; |
159 |
| -pub const OP_CUSTOM_LOAD_UIMM: InstructionOpcode = 0x77; |
160 |
| -pub const OP_CUSTOM_LOAD_IMM: InstructionOpcode = 0x78; |
161 |
| -pub const OP_CUSTOM_TRACE_END: InstructionOpcode = 0x79; |
| 150 | +pub const OP_WIDE_MUL: InstructionOpcode = 0x7e; |
| 151 | +pub const OP_WIDE_MULU: InstructionOpcode = 0x7f; |
| 152 | +pub const OP_WIDE_MULSU: InstructionOpcode = 0x80; |
| 153 | +pub const OP_WIDE_DIV: InstructionOpcode = 0x81; |
| 154 | +pub const OP_WIDE_DIVU: InstructionOpcode = 0x82; |
| 155 | +pub const OP_FAR_JUMP_REL: InstructionOpcode = 0x83; |
| 156 | +pub const OP_FAR_JUMP_ABS: InstructionOpcode = 0x84; |
| 157 | +pub const OP_ADC: InstructionOpcode = 0x85; |
| 158 | +pub const OP_SBB: InstructionOpcode = 0x86; |
| 159 | +pub const OP_CUSTOM_LOAD_UIMM: InstructionOpcode = 0x87; |
| 160 | +pub const OP_CUSTOM_LOAD_IMM: InstructionOpcode = 0x88; |
| 161 | +pub const OP_CUSTOM_TRACE_END: InstructionOpcode = 0x89; |
162 | 162 |
|
163 |
| -pub const MINIMAL_LEVEL1_OPCODE: InstructionOpcode = OP_UNLOADED; |
164 |
| -pub const MAXIMUM_LEVEL1_OPCODE: InstructionOpcode = OP_CUSTOM_TRACE_END; |
165 |
| -pub const LEVEL2_B_OPCODE: InstructionOpcode = 0xF0; |
166 |
| -pub const MINIMAL_LEVEL2_B_OPCODE2: InstructionOpcode = 0x00; |
167 |
| -pub const MAXIMUM_LEVEL2_B_OPCODE2: InstructionOpcode = 0x00; |
| 163 | +pub const MINIMAL_OPCODE: InstructionOpcode = OP_UNLOADED; |
| 164 | +pub const MAXIMUM_OPCODE: InstructionOpcode = OP_CUSTOM_TRACE_END; |
168 | 165 |
|
169 |
| -pub const INSTRUCTION_OPCODE_NAMES_LEVEL1: [&str; MAXIMUM_LEVEL1_OPCODE as usize + 1] = [ |
| 166 | +pub const INSTRUCTION_OPCODE_NAMES: [&str; (MAXIMUM_OPCODE - MINIMAL_OPCODE + 1) as usize] = [ |
170 | 167 | "UNLOADED",
|
171 | 168 | "ADD",
|
172 | 169 | "ADDI",
|
@@ -292,5 +289,5 @@ pub const INSTRUCTION_OPCODE_NAMES_LEVEL1: [&str; MAXIMUM_LEVEL1_OPCODE as usize
|
292 | 289 | ];
|
293 | 290 |
|
294 | 291 | pub fn instruction_opcode_name(i: InstructionOpcode) -> &'static str {
|
295 |
| - INSTRUCTION_OPCODE_NAMES_LEVEL1[i as usize] |
| 292 | + INSTRUCTION_OPCODE_NAMES[(i - MINIMAL_OPCODE) as usize] |
296 | 293 | }
|
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