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2a1a363
start of llvm/stablehlo bump
christopherlmunoz Oct 7, 2025
86e3f3f
formatting fix
christopherlmunoz Oct 7, 2025
8a998fd
formatting fix
christopherlmunoz Oct 7, 2025
f2051d3
fixing mlir tests
christopherlmunoz Oct 8, 2025
dd5f93d
mlir formating fixes
christopherlmunoz Oct 8, 2025
0905a3e
fixing vector dialect issue
christopherlmunoz Oct 13, 2025
d7e333e
fixing vector dialect issue
christopherlmunoz Oct 13, 2025
33363b6
Merge branch 'main' into llvm_bump
christopherlmunoz Oct 13, 2025
34a6045
pr comments
christopherlmunoz Oct 13, 2025
025b04a
Merge branch 'main' into llvm_bump
christopherlmunoz Oct 14, 2025
2565bb2
Merge branch 'main' into llvm_bump
christopherlmunoz Oct 15, 2025
007ef63
Merge branch 'main' into llvm_bump
christopherlmunoz Oct 15, 2025
1c2668a
updating comment
christopherlmunoz Oct 15, 2025
7fc1ef9
Merge branch 'main' into llvm_bump
christopherlmunoz Oct 16, 2025
28316e9
no build isolation for requirements.txt
christopherlmunoz Oct 17, 2025
eecae1a
Added a bit of functionality to IsolatePass, fixed a small bug (#3307)
AlexandreEichenberger Oct 16, 2025
dd3db02
Merge branch 'llvm_bump' of https://github.com/christopherlmunoz/onnx…
christopherlmunoz Oct 17, 2025
b136de4
upgrading setuptools
christopherlmunoz Oct 17, 2025
6b5af4b
upgrading setuptools
christopherlmunoz Oct 17, 2025
4466616
upgrading setuptools
christopherlmunoz Oct 17, 2025
e5551b0
adding comments
christopherlmunoz Oct 17, 2025
a8a8f49
fixing mlir test
christopherlmunoz Oct 17, 2025
7dd9cb9
fixing lit
christopherlmunoz Oct 20, 2025
4823838
Merge branch 'main' into llvm_bump
christopherlmunoz Oct 20, 2025
1429c08
Merge branch 'main' into llvm_bump
tungld Oct 21, 2025
55b194e
fixing mlir test
christopherlmunoz Oct 21, 2025
4c63e9e
fixing lit test
christopherlmunoz Oct 21, 2025
cb97552
memset the quantized stick buffer
tungld Oct 22, 2025
2926f1e
Merge branch 'main' into llvm_bump
tungld Oct 22, 2025
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2 changes: 1 addition & 1 deletion docs/BuildOnLinuxOSX.md
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@ Firstly, install MLIR (as a part of LLVM-Project):
``` bash
git clone -n https://github.com/llvm/llvm-project.git
# Check out a specific branch that is known to work with ONNX-MLIR.
cd llvm-project && git checkout fc44a4fcd3c54be927c15ddd9211aca1501633e7 && cd ..
cd llvm-project && git checkout 113f01aa82d055410f22a9d03b3468fa68600589 && cd ..
```

[same-as-file]: <> ({"ref": "utils/build-mlir.sh", "skip-ref": 2})
Expand Down
2 changes: 1 addition & 1 deletion docs/BuildOnWindows.md
Original file line number Diff line number Diff line change
Expand Up @@ -52,7 +52,7 @@ Install MLIR (as a part of LLVM-Project):
```shell
git clone -n https://github.com/llvm/llvm-project.git
# Check out a specific branch that is known to work with ONNX-MLIR.
cd llvm-project && git checkout fc44a4fcd3c54be927c15ddd9211aca1501633e7 && cd ..
cd llvm-project && git checkout 113f01aa82d055410f22a9d03b3468fa68600589 && cd ..
```

[same-as-file]: <> ({"ref": "utils/build-mlir.cmd", "skip-ref": 2})
Expand Down
2 changes: 2 additions & 0 deletions src/Compiler/CompilerPasses.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -275,12 +275,14 @@ void addKrnlToLLVMPasses(
// pm.addNestedPass<func::FuncOp>(krnl::createConvertSeqToMemrefPass());

pm.addPass(mlir::memref::createFoldMemRefAliasOpsPass());
pm.addPass(mlir::createConvertVectorToLLVMPass());

if (profileIR)
pm.addNestedPass<func::FuncOp>(onnx_mlir::createInstrumentCleanupPass());

if (enableBoundCheck)
pm.addPass(mlir::createGenerateRuntimeVerificationPass());

pm.addPass(krnl::createConvertKrnlToLLVMPass(verifyInputTensors,
/*useLRODATA=*/(modelSize == ModelSize::large),
/*storeConstantsToFile=*/storeConstantsToFile,
Expand Down
7 changes: 5 additions & 2 deletions src/Conversion/ONNXToTOSA/Tensor/Resize.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -291,7 +291,9 @@ class ONNXResizeOpLoweringToTOSA : public ConversionPattern {
bool isBilinear = mode == "linear";
bool isNearest = mode == "nearest";
bool isNearestModeFloor = nearestMode == "floor";
StringRef resizeMode = isBilinear ? "BILINEAR" : "NEAREST_NEIGHBOR";
mlir::tosa::ResizeMode resizeMode =
isBilinear ? mlir::tosa::ResizeMode::BILINEAR
: mlir::tosa::ResizeMode::NEAREST_NEIGHBOR;

if (halfPixelSymmetric)
return rewriter.notifyMatchFailure(op,
Expand All @@ -317,7 +319,8 @@ class ONNXResizeOpLoweringToTOSA : public ConversionPattern {
Value border = mlir::tosa::getTosaConstShape(
rewriter, loc, {yDimension.border, xDimension.border});

auto resizeModeAttr = rewriter.getStringAttr(resizeMode);
auto resizeModeAttr =
mlir::tosa::ResizeModeAttr::get(rewriter.getContext(), resizeMode);
Type newOutputType =
RankedTensorType::get(llvm::SmallVector<int64_t, 4>(
inputType.getRank(), ShapedType::kDynamic),
Expand Down
2 changes: 1 addition & 1 deletion src/Tools/onnx-mlir-opt/onnx-mlir-opt.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -158,7 +158,7 @@ int main(int argc, char **argv) {
if (!parseCustomEnvFlagsCommandLineOption(argc, argv, &llvm::errs()) ||
!llvm::cl::ParseCommandLineOptions(argc, argv,
getVendorName() + " - A modular optimizer driver\n", &llvm::errs(),
customEnvFlags.c_str())) {
/*VFS=*/nullptr, customEnvFlags.c_str())) {
llvm::errs() << "Failed to parse options\n";
return 1;
}
Expand Down
2 changes: 1 addition & 1 deletion src/onnx-mlir.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,7 @@ int main(int argc, char *argv[]) {
if (!parseCustomEnvFlagsCommandLineOption(argc, argv, &llvm::errs()) ||
!llvm::cl::ParseCommandLineOptions(argc, argv,
getVendorName() + " - A modular optimizer driver\n", &llvm::errs(),
customEnvFlags.c_str())) {
/*VFS=*/nullptr, customEnvFlags.c_str())) {
llvm::errs() << "Failed to parse options\n";
return 1;
}
Expand Down
2 changes: 1 addition & 1 deletion test/backend-cpp/TestCategoryMapper.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -66,7 +66,7 @@ int main(int argc, char *argv[]) {
setCompilerOption(onnx_mlir::OptionKind::CompilerOptLevel, "3");
mlir::registerPassManagerCLOptions();
llvm::cl::ParseCommandLineOptions(
argc, argv, "TestCategoryMapper\n", nullptr, "TEST_ARGS");
argc, argv, "TestCategoryMapper\n", nullptr, /*VFS=*/nullptr, "TEST_ARGS");
onnx_mlir::initCompilerConfig();
std::cout << "Target options: \""
<< onnx_mlir::getCompilerOption(onnx_mlir::OptionKind::TargetAccel)
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -108,16 +108,19 @@ func.func @round(%arg0: tensor<15xf32>) -> tensor<*xf32> {
// CHECK: [[LOAD_PARAM_0_MEM_:%.+]] = vector.load [[PARAM_0_]]{{.}}[[VAR_2_]]{{.}} : memref<15xf32>, vector<12xf32>
// CHECK: [[VAR_4_:%.+]] = vector.shape_cast [[LOAD_PARAM_0_MEM_]] : vector<12xf32> to vector<3x4xf32>
// CHECK: [[VAR_5_:%.+]] = vector.extract [[VAR_4_]][0] : vector<4xf32> from vector<3x4xf32>
// CHECK: [[VAR_6_:%.+]] = "krnl.round_even"([[VAR_5_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_7_:%.+]] = vector.insert [[VAR_6_]], [[VAR_4_]] [0] : vector<4xf32> into vector<3x4xf32>
// CHECK-DAG: [[VAR_8_:%.+]] = vector.extract [[VAR_4_]][1] : vector<4xf32> from vector<3x4xf32>
// CHECK: [[VAR_9_:%.+]] = "krnl.round_even"([[VAR_8_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_10_:%.+]] = vector.insert [[VAR_9_]], [[VAR_7_]] [1] : vector<4xf32> into vector<3x4xf32>
// CHECK-DAG: [[VAR_11_:%.+]] = vector.extract [[VAR_4_]][2] : vector<4xf32> from vector<3x4xf32>
// CHECK: [[VAR_12_:%.+]] = "krnl.round_even"([[VAR_11_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK: [[VAR_13_:%.+]] = vector.insert [[VAR_12_]], [[VAR_10_]] [2] : vector<4xf32> into vector<3x4xf32>
// CHECK: [[VAR_14_:%.+]] = vector.shape_cast [[VAR_13_]] : vector<3x4xf32> to vector<12xf32>
// CHECK: vector.store [[VAR_14_]], [[VAR_view_]]{{.}}[[VAR_2_]]{{.}} : memref<15xf32>, vector<12xf32>
// CHECK-DAG: [[VAR_6_:%.+]] = "krnl.round_even"([[VAR_5_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_7_:%.+]] = vector.extract [[VAR_4_]][1] : vector<4xf32> from vector<3x4xf32>
// CHECK-NOT: separator of consecutive DAGs
// CHECK-DAG: [[VAR_8_:%.+]] = "krnl.round_even"([[VAR_7_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_9_:%.+]] = vector.extract [[VAR_4_]][2] : vector<4xf32> from vector<3x4xf32>
// CHECK-NOT: separator of consecutive DAGs
// CHECK-DAG: [[VAR_10_:%.+]] = "krnl.round_even"([[VAR_9_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_11_:%.+]]:4 = vector.to_elements [[VAR_6_]] : vector<4xf32>
// CHECK-DAG: [[VAR_12_:%.+]]:4 = vector.to_elements [[VAR_8_]] : vector<4xf32>
// CHECK: [[VAR_13_:%.+]]:4 = vector.to_elements [[VAR_10_]] : vector<4xf32>
// CHECK: [[VAR_14_:%.+]] = vector.from_elements [[VAR_11_]]#0, [[VAR_11_]]#1, [[VAR_11_]]#2, [[VAR_11_]]#3, [[VAR_12_]]#0, [[VAR_12_]]#1, [[VAR_12_]]#2, [[VAR_12_]]#3, [[VAR_13_]]#0, [[VAR_13_]]#1, [[VAR_13_]]#2, [[VAR_13_]]#3 : vector<3x4xf32>
// CHECK: [[VAR_15_:%.+]] = vector.shape_cast [[VAR_14_]] : vector<3x4xf32> to vector<12xf32>
// CHECK: vector.store [[VAR_15_]], [[VAR_view_]]{{.}}[[VAR_2_]]{{.}} : memref<15xf32>, vector<12xf32>
// CHECK: }
// CHECK: [[LOOP_1_:%.+]] = krnl.define_loops 1
// CHECK: krnl.iterate([[LOOP_1_]]) with ([[LOOP_1_]] -> [[I_1_:%.+]] = 12 to 15){
Expand Down Expand Up @@ -165,31 +168,39 @@ func.func private @test_round_multiple16(%arg0 : tensor<?x32xf32>) -> tensor<*xf
// CHECK: [[LOAD_VAR_reshape_MEM_:%.+]] = vector.load [[VAR_reshape_]]{{.}}[[VAR_3_]]{{.}} : memref<?xf32>, vector<32xf32>
// CHECK: [[VAR_5_:%.+]] = vector.shape_cast [[LOAD_VAR_reshape_MEM_]] : vector<32xf32> to vector<8x4xf32>
// CHECK: [[VAR_6_:%.+]] = vector.extract [[VAR_5_]][0] : vector<4xf32> from vector<8x4xf32>
// CHECK: [[VAR_7_:%.+]] = "krnl.round_even"([[VAR_6_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_8_:%.+]] = vector.insert [[VAR_7_]], [[VAR_5_]] [0] : vector<4xf32> into vector<8x4xf32>
// CHECK-DAG: [[VAR_9_:%.+]] = vector.extract [[VAR_5_]][1] : vector<4xf32> from vector<8x4xf32>
// CHECK: [[VAR_10_:%.+]] = "krnl.round_even"([[VAR_9_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_11_:%.+]] = vector.insert [[VAR_10_]], [[VAR_8_]] [1] : vector<4xf32> into vector<8x4xf32>
// CHECK-DAG: [[VAR_12_:%.+]] = vector.extract [[VAR_5_]][2] : vector<4xf32> from vector<8x4xf32>
// CHECK: [[VAR_13_:%.+]] = "krnl.round_even"([[VAR_12_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_14_:%.+]] = vector.insert [[VAR_13_]], [[VAR_11_]] [2] : vector<4xf32> into vector<8x4xf32>
// CHECK-DAG: [[VAR_15_:%.+]] = vector.extract [[VAR_5_]][3] : vector<4xf32> from vector<8x4xf32>
// CHECK: [[VAR_16_:%.+]] = "krnl.round_even"([[VAR_15_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_17_:%.+]] = vector.insert [[VAR_16_]], [[VAR_14_]] [3] : vector<4xf32> into vector<8x4xf32>
// CHECK-DAG: [[VAR_18_:%.+]] = vector.extract [[VAR_5_]][4] : vector<4xf32> from vector<8x4xf32>
// CHECK: [[VAR_19_:%.+]] = "krnl.round_even"([[VAR_18_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_20_:%.+]] = vector.insert [[VAR_19_]], [[VAR_17_]] [4] : vector<4xf32> into vector<8x4xf32>
// CHECK-DAG: [[VAR_21_:%.+]] = vector.extract [[VAR_5_]][5] : vector<4xf32> from vector<8x4xf32>
// CHECK: [[VAR_22_:%.+]] = "krnl.round_even"([[VAR_21_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_23_:%.+]] = vector.insert [[VAR_22_]], [[VAR_20_]] [5] : vector<4xf32> into vector<8x4xf32>
// CHECK-DAG: [[VAR_24_:%.+]] = vector.extract [[VAR_5_]][6] : vector<4xf32> from vector<8x4xf32>
// CHECK: [[VAR_25_:%.+]] = "krnl.round_even"([[VAR_24_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_26_:%.+]] = vector.insert [[VAR_25_]], [[VAR_23_]] [6] : vector<4xf32> into vector<8x4xf32>
// CHECK-DAG: [[VAR_27_:%.+]] = vector.extract [[VAR_5_]][7] : vector<4xf32> from vector<8x4xf32>
// CHECK: [[VAR_28_:%.+]] = "krnl.round_even"([[VAR_27_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK: [[VAR_29_:%.+]] = vector.insert [[VAR_28_]], [[VAR_26_]] [7] : vector<4xf32> into vector<8x4xf32>
// CHECK: [[VAR_30_:%.+]] = vector.shape_cast [[VAR_29_]] : vector<8x4xf32> to vector<32xf32>
// CHECK: vector.store [[VAR_30_]], [[VAR_reshape_3_]]{{.}}[[VAR_3_]]{{.}} : memref<?xf32>, vector<32xf32>
// CHECK-DAG: [[VAR_7_:%.+]] = "krnl.round_even"([[VAR_6_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_8_:%.+]] = vector.extract [[VAR_5_]][1] : vector<4xf32> from vector<8x4xf32>
// CHECK-NOT: separator of consecutive DAGs
// CHECK-DAG: [[VAR_9_:%.+]] = "krnl.round_even"([[VAR_8_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_10_:%.+]] = vector.extract [[VAR_5_]][2] : vector<4xf32> from vector<8x4xf32>
// CHECK-NOT: separator of consecutive DAGs
// CHECK-DAG: [[VAR_11_:%.+]] = "krnl.round_even"([[VAR_10_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_12_:%.+]] = vector.extract [[VAR_5_]][3] : vector<4xf32> from vector<8x4xf32>
// CHECK-NOT: separator of consecutive DAGs
// CHECK-DAG: [[VAR_13_:%.+]] = "krnl.round_even"([[VAR_12_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_14_:%.+]] = vector.extract [[VAR_5_]][4] : vector<4xf32> from vector<8x4xf32>
// CHECK-NOT: separator of consecutive DAGs
// CHECK-DAG: [[VAR_15_:%.+]] = "krnl.round_even"([[VAR_14_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_16_:%.+]] = vector.extract [[VAR_5_]][5] : vector<4xf32> from vector<8x4xf32>
// CHECK-NOT: separator of consecutive DAGs
// CHECK-DAG: [[VAR_17_:%.+]] = "krnl.round_even"([[VAR_16_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_18_:%.+]] = vector.extract [[VAR_5_]][6] : vector<4xf32> from vector<8x4xf32>
// CHECK-NOT: separator of consecutive DAGs
// CHECK-DAG: [[VAR_19_:%.+]] = "krnl.round_even"([[VAR_18_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_20_:%.+]] = vector.extract [[VAR_5_]][7] : vector<4xf32> from vector<8x4xf32>
// CHECK-NOT: separator of consecutive DAGs
// CHECK-DAG: [[VAR_21_:%.+]] = "krnl.round_even"([[VAR_20_]]) : (vector<4xf32>) -> vector<4xf32>
// CHECK-DAG: [[VAR_22_:%.+]]:4 = vector.to_elements [[VAR_7_]] : vector<4xf32>
// CHECK-DAG: [[VAR_23_:%.+]]:4 = vector.to_elements [[VAR_9_]] : vector<4xf32>
// CHECK-DAG: [[VAR_24_:%.+]]:4 = vector.to_elements [[VAR_11_]] : vector<4xf32>
// CHECK-DAG: [[VAR_25_:%.+]]:4 = vector.to_elements [[VAR_13_]] : vector<4xf32>
// CHECK-DAG: [[VAR_26_:%.+]]:4 = vector.to_elements [[VAR_15_]] : vector<4xf32>
// CHECK-DAG: [[VAR_27_:%.+]]:4 = vector.to_elements [[VAR_17_]] : vector<4xf32>
// CHECK-DAG: [[VAR_28_:%.+]]:4 = vector.to_elements [[VAR_19_]] : vector<4xf32>
// CHECK: [[VAR_29_:%.+]]:4 = vector.to_elements [[VAR_21_]] : vector<4xf32>
// CHECK: [[VAR_30_:%.+]] = vector.from_elements [[VAR_22_]]#0, [[VAR_22_]]#1, [[VAR_22_]]#2, [[VAR_22_]]#3, [[VAR_23_]]#0, [[VAR_23_]]#1, [[VAR_23_]]#2, [[VAR_23_]]#3, [[VAR_24_]]#0, [[VAR_24_]]#1, [[VAR_24_]]#2, [[VAR_24_]]#3, [[VAR_25_]]#0, [[VAR_25_]]#1, [[VAR_25_]]#2, [[VAR_25_]]#3, [[VAR_26_]]#0, [[VAR_26_]]#1, [[VAR_26_]]#2, [[VAR_26_]]#3, [[VAR_27_]]#0, [[VAR_27_]]#1, [[VAR_27_]]#2, [[VAR_27_]]#3, [[VAR_28_]]#0, [[VAR_28_]]#1, [[VAR_28_]]#2, [[VAR_28_]]#3, [[VAR_29_]]#0, [[VAR_29_]]#1, [[VAR_29_]]#2, [[VAR_29_]]#3 : vector<8x4xf32>
// CHECK: [[VAR_31_:%.+]] = vector.shape_cast [[VAR_30_]] : vector<8x4xf32> to vector<32xf32>
// CHECK: vector.store [[VAR_31_]], [[VAR_reshape_3_]]{{.}}[[VAR_3_]]{{.}} : memref<?xf32>, vector<32xf32>
// CHECK: }
// CHECK: }
// CHECK: return [[RES_]] : memref<?x32xf32>
Expand Down
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