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README.md

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# Example: Basic Assets
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This example demonstrates loading and displaying a static image and audio from selectable asset files out of RAM. A square is drawn over the top of the image, which can be controlled with user input.
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* SDRAM controller
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* Video generation
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* I2S audio generation
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* User input (DPAD = move square, B = green square, A = pink square, X = replay audio)
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* Reload assets during runtime via the Core Settings menu
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* Core menu signaling (box moves while OS menu is active)
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## Legal
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Analogue’s Development program was created to further video game hardware preservation with FPGA technology. Analogue does not support or endorse the use of infringing content.
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Analogue Developers have access to Analogue Pocket I/O’s so Developers can utilize cartridge adapters or interface with other pieces of original or bespoke hardware to support legacy media.

audio.json

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{
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"audio": {
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"magic": "APF_VER_1"
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}
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}

core.json

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{
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"core": {
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"magic": "APF_VER_1",
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"metadata": {
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"platform_ids": [
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"ex_platform"
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],
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"shortname": "Basic Assets",
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"description": "APF core example. Displays image and plays audio.",
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"author": "Example Author",
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"url": "https://github.com/open-fpga",
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"version": "1.0.0",
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"date_release": "2022-08-23"
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},
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"framework": {
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"target_product": "Analogue Pocket",
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"version_required": "1.1",
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"sleep_supported": false,
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"dock": {
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"supported": true,
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"analog_output": false
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},
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"hardware": {
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"link_port": false,
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"cartridge_adapter": -1
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}
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},
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"cores": [
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{
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"name": "default",
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"id": 0,
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"filename": "bitstream.rbf_r"
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}
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]
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}
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}

data.json

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{
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"data": {
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"magic": "APF_VER_1",
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"data_slots": [
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{
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"name": "Background",
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"id": 1,
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"required": true,
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"parameters": 3,
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"extensions": [
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"bin"
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],
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"size_exact": 184320,
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"address": "0x00000000"
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},
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{
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"name": "Audio",
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"id": 99,
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"required": true,
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"parameters": 3,
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"extensions": [
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"wav"
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],
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"size_exact": 0,
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"size_maximum": "0x3C00000",
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"address": "0x00400000"
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}
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]
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}
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}

dist/.gitkeep

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dist/assets/.keep

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dist/assets/ex_audio_1.wav

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dist/assets/ex_image_1.bin

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dist/platforms/ex_platform.json

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{
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"platform": {
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"category": "Example Cores",
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"name": "Example Platform",
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"year": 2022,
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"manufacturer": "Example Manufacturer"
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}
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}

info.txt

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Example Core - Basic Assets
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This example demonstrates loading and displaying a static image and audio from selectable asset files out of RAM. A square is drawn over the top of the image, which can be controlled with user input.
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* SDRAM controller
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* Video generation
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* I2S audio generation
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* User input displayed in Controls menu
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* Reload assets during runtime via the Core Settings menu
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* Core menu signaling (box moves while OS menu is active)

input.json

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{
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"input": {
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"magic": "APF_VER_1",
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"controllers": [
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{
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"type": "default",
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"mappings": [
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{
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"id": 0,
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"name": "Purple Square",
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"key": "pad_btn_a"
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},
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{
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"id": 1,
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"name": "Green Square",
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"key": "pad_btn_b"
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},
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{
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"id": 2,
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"name": "Replay Audio",
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"key": "pad_btn_x"
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}
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]
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}
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]
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}
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}

interact.json

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{
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"interact": {
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"magic": "APF_VER_1",
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"variables": [
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{
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"name": "Screen Border",
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"id": 1,
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"type": "check",
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"enabled": true,
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"persist": true,
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"address": "0x50000000",
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"defaultval": 1,
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"value": 1,
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"mask": "0xFFFF0000"
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}
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]
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}
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}

output/.gitkeep

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output/bitstream.rbf_r

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src/fpga/.gitignore

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*/db/
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*/incremental_db/
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*/simulation/
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*/greybox_tmp/
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incremental_db/
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db/
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PLLJ_PLLSPE_INFO.txt
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c5_pin_model_dump.txt
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cr_ie_info.json
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*.pin
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*.pof
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*.ptf.*
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*.qar
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*.qarlog
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*.qws
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*.rpt
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*.smsg
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*.sof
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*.sopc_builder
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*.summary
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*.txt
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*.bak
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*.cmp
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*.done
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*.xml
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*.sld
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*.cdf
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src/fpga/ap_core.qpf

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# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 2019 Intel Corporation. All rights reserved.
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# Your use of Intel Corporation's design tools, logic functions
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# and other software and tools, and any partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Intel Program License
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# Subscription Agreement, the Intel Quartus Prime License Agreement,
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# the Intel FPGA IP License Agreement, or other applicable license
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# agreement, including, without limitation, that your use is for
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# the sole purpose of programming logic devices manufactured by
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# Intel and sold by Intel or its authorized distributors. Please
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# refer to the applicable agreement for further details, at
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# https://fpgasoftware.intel.com/eula.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus Prime
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# Version 18.1.1 Build 646 04/11/2019 SJ Lite Edition
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# Date created = 21:31:36 January 22, 2020
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#
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# -------------------------------------------------------------------------- #
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QUARTUS_VERSION = "18.1"
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DATE = "21:31:36 January 22, 2020"
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# Revisions
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PROJECT_REVISION = "ap_core"

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