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feat: add basic la2k1000 support
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‎configs/platforms/loongarch64-2k1000.toml‎

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# Architecture identifier.
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arch = "loongarch64"
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# Platform identifier.
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platform = "loongarch64-2k1000"
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#
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# Platform configs
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#
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[plat]
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# Platform family.
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family = "loongarch64-2k1000"
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# Base address of the whole physical memory.
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phys-memory-base = 0x9800_0000 # uint
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# Size of the whole physical memory. (128M)
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phys-memory-size = 0x2800_0000 # uint
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# Base physical address of the kernel image.
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kernel-base-paddr = 0x9800_0000 # uint
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# Base virtual address of the kernel image.
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kernel-base-vaddr = "0x9000_0000_9800_0000" # uint
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# Linear mapping offset, for quick conversions between physical and virtual
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# addresses.
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phys-virt-offset = "0xffff_ffc0_0000_0000" # uint
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# Offset of bus address and phys address. some boards, the bus address is
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# different from the physical address.
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phys-bus-offset = 0 # uint
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# Kernel address space base.
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kernel-aspace-base = "0xffff_ffc0_0000_0000" # uint
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# Kernel address space size.
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kernel-aspace-size = "0x0000_003f_ffff_f000" # uint
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#
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# Device specifications
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#
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[devices]
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# MMIO regions with format (`base_paddr`, `size`).
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mmio-regions = [
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[0x1FE2_0000, 0x0000_1000], # UART
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[0x2000_0000, 0x1000_0000], # PCI
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[0x4000_0000, 0x0002_0000], # PCI RANGES
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] # [(uint, uint)]
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# VirtIO MMIO regions with format (`base_paddr`, `size`).
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virtio-mmio-regions = [] # [(uint, uint)]
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# Base physical address of the PCIe ECAM space.
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pci-ecam-base = 0x2000_0000 # uint
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# End PCI bus number.
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pci-bus-end = 0x7f # uint
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# PCI device memory ranges.
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pci-ranges = [
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[0, 0],
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[0x4000_0000, 0x0002_0000]
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] # [(uint, uint)]
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# serial@1fe001e0 {
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# interrupt-parent = <0x00008003>;
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# interrupts = <0x00000002 0x00000004>;
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# clock-frequency = <0x05f5e100>;
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# reg = <0x00000000 0x1fe001e0 0x00000000 0x00000100>;
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# compatible = "ns16550a";
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# };
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uart-paddr = 0x1FE20000 # uint
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# Timer interrupt frequency in Hz.
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timer-frequency = 100_000_000 # uint

‎modules/axhal/build.rs‎

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@@ -6,6 +6,7 @@ const BUILTIN_PLATFORMS: &[&str] = &[
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"aarch64-qemu-virt",
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"aarch64-raspi4",
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"loongarch64-qemu-virt",
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"loongarch64-2k1000",
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"riscv64-qemu-virt",
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"x86_64-pc-oslab",
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"x86_64-qemu-q35",
@@ -17,6 +18,7 @@ const BUILTIN_PLATFORM_FAMILIES: &[&str] = &[
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"aarch64-qemu-virt",
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"aarch64-raspi",
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"loongarch64-qemu-virt",
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"loongarch64-2k1000",
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"riscv64-qemu-virt",
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"x86-pc",
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];

‎modules/axhal/src/arch/loongarch64/mod.rs‎

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@@ -3,6 +3,7 @@ mod macros;
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mod context;
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mod trap;
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mod unaligned;
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use core::arch::asm;
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use loongArch64::register::{crmd, ecfg, eentry, pgdh, pgdl, stlbps, tlbidx, tlbrehi, tlbrentry};

‎modules/axhal/src/arch/loongarch64/trap.rs‎

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@@ -1,4 +1,7 @@
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use super::context::TrapFrame;
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use super::{
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context::TrapFrame,
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unaligned::emulate_load_store_insn
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};
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use loongArch64::register::{
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badv,
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estat::{self, Exception, Trap},
@@ -48,6 +51,7 @@ fn loongarch64_trap_handler(tf: &mut TrapFrame, from_user: bool) {
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tf.era += 4;
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tf.regs.a0 = crate::trap::handle_syscall(tf, tf.regs.a7) as usize;
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}
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Trap::Exception(Exception::AddressNotAligned) => unsafe { emulate_load_store_insn(tf) },
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Trap::Exception(Exception::LoadPageFault)
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| Trap::Exception(Exception::PageNonReadableFault) => {
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handle_page_fault(tf, MappingFlags::READ, from_user)

‎modules/axhal/src/arch/loongarch64/unaligned.S‎

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.macro fixup_ex from, to, fix
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.if \fix
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.section .fixup, "ax"
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\to:
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li.w $a0, -1
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jr $ra
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.previous
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.endif
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.section __ex_table, "a"
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.word \from\()b, \to\()b
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.previous
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.endm
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/*
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* unsigned long probe_user_read(void *addr, void *value, unsigned long n, bool symbol)
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*
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* a0: addr
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* a1: value
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* a2: n
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* a3: symbol
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*/
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.text
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.global temp_unaligned_read
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.p2align 2
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.type temp_unaligned_read,@function
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temp_unaligned_read:
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beqz $a2, 5f
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li.w $t1, 8
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li.w $t2, 0
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addi.d $t0, $a2, -1
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mul.d $t1, $t0, $t1
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add.d $a0, $a0, $t0
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beq $a3, $zero, 2f
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1: ld.b $t3, $a0, 0
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b 3f
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2: ld.bu $t3, $a0, 0
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3: sll.d $t3, $t3, $t1
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or $t2, $t2, $t3
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addi.d $t1, $t1, -8
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addi.d $a0, $a0, -1
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addi.d $a2, $a2, -1
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bgt $a2, $zero, 2b
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4: st.d $t2, $a1, 0
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move $a0, $a2
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jr $ra
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5: li.w $a0, -1
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jr $ra
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fixup_ex 1, 6, 1
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fixup_ex 2, 6, 0
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fixup_ex 4, 6, 0
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/*
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* unsigned long unaligned_write(void *addr, unsigned long value, unsigned long n)
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*
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* a0: addr
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* a1: value
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* a2: n
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*/
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.text
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.global temp_unaligned_write
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.p2align 2
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.type temp_unaligned_write,@function
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temp_unaligned_write:
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beqz $a2, 3f
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li.w $t0, 0
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1: srl.d $t1, $a1, $t0
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2: st.b $t1, $a0, 0
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addi.d $t0, $t0, 8
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addi.d $a2, $a2, -1
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addi.d $a0, $a0, 1
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bgt $a2, $zero, 1b
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move $a0, $a2
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jr $ra
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3: li.w $a0, -1
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jr $ra
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fixup_ex 2, 4, 1

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