Merge branch 'master' into CFlie_improved

Author: matejkarasek

Lua_scripts/DSM FwdPrg.lua

@@ -117,6 +117,7 @@
 71,1,JJRC345,SkyTmblr,1,Flip,HLess,RTH,LED,UNK1,UNK2,UNK3
 49,0,KF606,KF606,1,Trim
 49,1,KF606,MIG320,1,Trim,LED
+49,2,KF606,ZCZ50,1,Trim,UNK
 9,0,KN,WLToys,0,DRate,THold,IdleUp,Gyro,Ttrim,Atrim,Etrim
 9,1,KN,Feilun,0,DRate,THold,IdleUp,Gyro,Ttrim,Atrim,Etrim
 73,0,Kyosho,Std,0,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14
@@ -172,6 +173,7 @@
 5,1,V2x2,JXD506,1,Flip,Light,Pict,Video,HLess,StaSto,Emerg,Cam_UD
 48,0,V761,3CH,0,Gyro,Calib,Flip,RtnAct,Rtn
 48,1,V761,4CH,0,Gyro,Calib,Flip,RtnAct,Rtn
+48,2,V761,TOPRC,0,Gyro,Calib,Flip,RtnAct,Rtn
 46,0,V911s,V911s,1,Calib,Rate
 46,1,V911s,E119,1,Calib,Rate,6G_3D
 22,0,WFLY,WFR0xS,0,CH5,CH6,CH7,CH8,CH9

Lua_scripts/DSM FwdPrg_05_BW.lua

@@ -292,10 +292,17 @@ uint16_t AFHDS2A_callback()
 		case AFHDS2A_BIND2:
 		case AFHDS2A_BIND3:
 			AFHDS2A_build_bind_packet();
+			data_rx=A7105_ReadReg(A7105_00_MODE);			// Check if something has been received...
 			A7105_WriteData(AFHDS2A_TXPACKET_SIZE, packet_count%2 ? 0x0d : 0x8c);
-			if(!(A7105_ReadReg(A7105_00_MODE) & (1<<5)))	//  removed FECF check due to issues with fs-x6b -> & (1<<5 | 1<<6)
-			{ // CRCF Ok
+			if(!(A7105_ReadReg(A7105_00_MODE) & (1<<5)) && !(data_rx & 1))	// removed FECF check due to issues with fs-x6b ->  & (1<<5 | 1<<6)
+			{ // RX+CRCF Ok
 				A7105_ReadData(AFHDS2A_RXPACKET_SIZE);
+				#if 0
+					debug("RX");
+					for(uint8_t i=0; i<AFHDS2A_RXPACKET_SIZE ; i++)
+						debug(" %02X", packet[i]);
+					debugln("");
+				#endif
 				if(packet[0] == 0xbc && packet[9] == 0x01)
 				{
 					uint16_t addr;
@@ -330,7 +337,7 @@ uint16_t AFHDS2A_callback()
 				if(!(A7105_ReadReg(A7105_00_MODE) & 0x01))
 					break;
 			A7105_SetPower();
-			A7105_SetTxRxMode(TXRX_OFF);					// Turn LNA off since we are in near range and we want to prevent swamping
+			A7105_SetTxRxMode((packet_count & 0x40) ? TXRX_OFF : RX_EN);	// Turn LNA off time to time since we are in near range and we want to prevent swamping
 			A7105_Strobe(A7105_RX);
 			phase &= ~AFHDS2A_WAIT_WRITE;
 			phase++;

Lua_scripts/DSM FwdPrg_05_Color.lua

@@ -249,6 +249,10 @@ static uint8_t __attribute__((unused)) DSM_Check_RX_packet()
 
 uint16_t DSM_callback()
 {
+	#if defined MULTI_EU
+		if(sub_protocol == DSM2_1F || sub_protocol == DSM2_2F)
+			return 11000;
+	#endif
 	#define DSM_CH1_CH2_DELAY	4010			// Time between write of channel 1 and channel 2
 	#ifdef STM32_BOARD
 		#define DSM_WRITE_DELAY		1600		// Time after write to verify write complete