diff --git a/NEW KERNEL/.vscode/c_cpp_properties.json b/NEW KERNEL/.vscode/c_cpp_properties.json new file mode 100644 index 0000000..c2098a2 --- /dev/null +++ b/NEW KERNEL/.vscode/c_cpp_properties.json @@ -0,0 +1,18 @@ +{ + "configurations": [ + { + "name": "linux-gcc-x64", + "includePath": [ + "${workspaceFolder}/**" + ], + "compilerPath": "/usr/bin/gcc", + "cStandard": "${default}", + "cppStandard": "${default}", + "intelliSenseMode": "linux-gcc-x64", + "compilerArgs": [ + "" + ] + } + ], + "version": 4 +} \ No newline at end of file diff --git a/NEW KERNEL/.vscode/launch.json b/NEW KERNEL/.vscode/launch.json new file mode 100644 index 0000000..cc00405 --- /dev/null +++ b/NEW KERNEL/.vscode/launch.json @@ -0,0 +1,24 @@ +{ + "version": "0.2.0", + "configurations": [ + { + "name": "C/C++ Runner: Debug Session", + "type": "cppdbg", + "request": "launch", + "args": [], + "stopAtEntry": false, + "externalConsole": false, + "cwd": ".", + "program": "build/Debug/outDebug", + "MIMode": "gdb", + "miDebuggerPath": "gdb", + "setupCommands": [ + { + "description": "Enable pretty-printing for gdb", + "text": "-enable-pretty-printing", + "ignoreFailures": true + } + ] + } + ] +} \ No newline at end of file diff --git a/NEW KERNEL/.vscode/settings.json b/NEW KERNEL/.vscode/settings.json new file mode 100644 index 0000000..bb879da --- /dev/null +++ b/NEW KERNEL/.vscode/settings.json @@ -0,0 +1,59 @@ +{ + "C_Cpp_Runner.cCompilerPath": "gcc", + "C_Cpp_Runner.cppCompilerPath": "g++", + "C_Cpp_Runner.debuggerPath": "gdb", + "C_Cpp_Runner.cStandard": "", + "C_Cpp_Runner.cppStandard": "", + "C_Cpp_Runner.msvcBatchPath": "C:/Program Files/Microsoft Visual Studio/VR_NR/Community/VC/Auxiliary/Build/vcvarsall.bat", + "C_Cpp_Runner.useMsvc": false, + "C_Cpp_Runner.warnings": [ + "-Wall", + "-Wextra", + "-Wpedantic", + "-Wshadow", + "-Wformat=2", + "-Wcast-align", + "-Wconversion", + "-Wsign-conversion", + "-Wnull-dereference" + ], + "C_Cpp_Runner.msvcWarnings": [ + "/W4", + "/permissive-", + "/w14242", + "/w14287", + "/w14296", + "/w14311", + "/w14826", + "/w44062", + "/w44242", + "/w14905", + "/w14906", + "/w14263", + "/w44265", + "/w14928" + ], + "C_Cpp_Runner.enableWarnings": true, + "C_Cpp_Runner.warningsAsError": false, + "C_Cpp_Runner.compilerArgs": [], + "C_Cpp_Runner.linkerArgs": [], + "C_Cpp_Runner.includePaths": [], + "C_Cpp_Runner.includeSearch": [ + "*", + "**/*" + ], + "C_Cpp_Runner.excludeSearch": [ + "**/build", + "**/build/**", + "**/.*", + "**/.*/**", + "**/.vscode", + "**/.vscode/**" + ], + "C_Cpp_Runner.useAddressSanitizer": false, + "C_Cpp_Runner.useUndefinedSanitizer": false, + "C_Cpp_Runner.useLeakSanitizer": false, + "C_Cpp_Runner.showCompilationTime": false, + "C_Cpp_Runner.useLinkTimeOptimization": false, + "C_Cpp_Runner.msvcSecureNoWarnings": false +} \ No newline at end of file diff --git a/NEW KERNEL/ATA/src/asm/exception.asm b/NEW KERNEL/ATA/src/asm/exception.asm index dbfcab9..c149aef 100644 --- a/NEW KERNEL/ATA/src/asm/exception.asm +++ b/NEW KERNEL/ATA/src/asm/exception.asm @@ -1,39 +1,5 @@ section .text extern isr_exception_handler - global exception_0 - global exception_1 - global exception_2 - global exception_3 - global exception_4 - global exception_5 - global exception_6 - global exception_7 - global exception_8 - global exception_9 - global exception_10 - global exception_11 - global exception_12 - global exception_13 - global exception_14 - global exception_15 - global exception_16 - global exception_17 - global exception_18 - global exception_19 - global exception_20 - global exception_21 - global exception_22 - global exception_23 - global exception_24 - global exception_25 - global exception_26 - global exception_27 - global exception_28 - global exception_29 - global exception_30 - global exception_31 - global exception_128 - exception_handler: pusha ; push all registers @@ -61,196 +27,52 @@ exception_handler: iret -exception_0: - cli - push byte 0 ; store default err code(0) - push 0 ; push exception number index in IDT - jmp exception_handler - -exception_1: - cli - push byte 0 ; store default err code(0) - push 1 ; push exception number index in IDT - jmp exception_handler - -exception_2: - cli - push byte 0 ; store default err code(0) - push 2 ; push exception number index in IDT - jmp exception_handler - -exception_3: - cli - push byte 0 ; store default err code(0) - push 3 ; push exception number index in IDT - jmp exception_handler - -exception_4: - cli - push byte 0 ; store default err code(0) - push 4 ; push exception number index in IDT - jmp exception_handler - -exception_5: - cli - push byte 0 ; store default err code(0) - push 5 ; push exception number index in IDT - jmp exception_handler - -exception_6: - cli - push byte 0 ; store default err code(0) - push 6 ; push exception number index in IDT - jmp exception_handler - -exception_7: - cli - push byte 0 ; store default err code(0) - push 7 ; push exception number index in IDT - jmp exception_handler - -exception_8: - cli - push 8 ; push exception number index in IDT - jmp exception_handler - -exception_9: - cli - push byte 0 ; store default err code(0) - push 9 ; push exception number index in IDT - jmp exception_handler - -exception_10: - cli - push 10 ; push exception number index in IDT - jmp exception_handler - -exception_11: - cli - push 11 ; push exception number index in IDT - jmp exception_handler - -exception_12: - cli - push 12 ; push exception number index in IDT - jmp exception_handler - -exception_13: - cli - push 13 ; push exception number index in IDT - jmp exception_handler - -exception_14: - cli - push 14 ; push exception number index in IDT - jmp exception_handler - -exception_15: - cli - push byte 0 ; store default err code(0) - push 15 ; push exception number index in IDT - jmp exception_handler - -exception_16: - cli - push byte 0 ; store default err code(0) - push 16 ; push exception number index in IDT - jmp exception_handler - -exception_17: - cli - push byte 0 ; store default err code(0) - push 17 ; push exception number index in IDT - jmp exception_handler - -exception_18: - cli - push byte 0 ; store default err code(0) - push 18 ; push exception number index in IDT - jmp exception_handler - -exception_19: - cli - push byte 0 ; store default err code(0) - push 19 ; push exception number index in IDT - jmp exception_handler - -exception_20: - cli - push byte 0 ; store default err code(0) - push 20 ; push exception number index in IDT - jmp exception_handler - -exception_21: - cli - push byte 0 ; store default err code(0) - push 21 ; push exception number index in IDT - jmp exception_handler - -exception_22: - cli - push byte 0 ; store default err code(0) - push 22 ; push exception number index in IDT - jmp exception_handler - -exception_23: - cli - push byte 0 ; store default err code(0) - push 23 ; push exception number index in IDT - jmp exception_handler - -exception_24: - cli - push byte 0 ; store default err code(0) - push 24 ; push exception number index in IDT - jmp exception_handler - -exception_25: - cli - push byte 0 ; store default err code(0) - push 25 ; push exception number index in IDT - jmp exception_handler - -exception_26: - cli - push byte 0 ; store default err code(0) - push 26 ; push exception number index in IDT - jmp exception_handler - -exception_27: - cli - push byte 0 ; store default err code(0) - push 27 ; push exception number index in IDT - jmp exception_handler - -exception_28: - cli - push byte 0 ; store default err code(0) - push 28 ; push exception number index in IDT - jmp exception_handler - -exception_29: - cli - push byte 0 ; store default err code(0) - push 29 ; push exception number index in IDT - jmp exception_handler - -exception_30: - cli - push byte 0 ; store default err code(0) - push 30 ; push exception number index in IDT - jmp exception_handler - -exception_31: - cli - push byte 0 ; store default err code(0) - push 31 ; push exception number index in IDT - jmp exception_handler - -exception_128: - cli - push byte 0 ; store default err code(0) - push 128 ; push exception number index in IDT - jmp exception_handler - - +; Macro for interrupt service routines that do push an error code +%macro ISR_ERRCODE 1 +global exception_%1 +exception_%1: + ; We don't need to push a byte, the CPU did it for us + push %1 + jmp exception_handler +%endmacro + +; Macro for interrupt service routines that don't push an error code +%macro ISR_NOERRCODE 1 +global exception_%1 +exception_%1: + ; There is no error code + push byte 0 ; Push a default error code as REGISTERS expects it + push %1 ; Push the exception index + jmp exception_handler +%endmacro + + +ISR_NOERRCODE 0 ; Divison by zero exception +ISR_NOERRCODE 1 ; Debug exception +ISR_NOERRCODE 2 ; Non-maskable interrupt +ISR_NOERRCODE 3 ; INT3 breakpoint +ISR_NOERRCODE 4 ; Overflow exception +ISR_NOERRCODE 5 ; Bound exception +ISR_NOERRCODE 6 ; Invalid opcode +ISR_NOERRCODE 7 ; No FPU +ISR_ERRCODE 8 ; Double fault +ISR_NOERRCODE 9 ; Coprocessor segment overrun (reserved now) +ISR_ERRCODE 10 ; Invalid TSS +ISR_ERRCODE 11 ; Segment not present +ISR_ERRCODE 12 ; Stack segment exception +ISR_ERRCODE 13 ; General protection fault +ISR_ERRCODE 14 ; Page fault +ISR_NOERRCODE 15 ; Reserved exception +ISR_NOERRCODE 16 ; Floating-point exception +ISR_ERRCODE 17 ; Alignment check +ISR_NOERRCODE 18 ; Machine check +ISR_NOERRCODE 19 ; SIMD floating-point exception +ISR_NOERRCODE 20 ; Virtualization exception +ISR_ERRCODE 21 ; Control-protection exception +; 22 - 27 are reserved +ISR_NOERRCODE 28 ; Hypervisor injection exception +ISR_ERRCODE 29 ; VMM communication exception +ISR_ERRCODE 30 ; Security exception +ISR_NOERRCODE 31 ; Reserved + +ISR_NOERRCODE 128 ; System call \ No newline at end of file diff --git a/NEW KERNEL/ATA/src/isr.c b/NEW KERNEL/ATA/src/isr.c index 81380af..ceb135b 100644 --- a/NEW KERNEL/ATA/src/isr.c +++ b/NEW KERNEL/ATA/src/isr.c @@ -70,12 +70,12 @@ void isr_irq_handler(REGISTERS *reg) { pic8259_eoi(reg->int_no); } -static void print_registers(REGISTERS *reg) { +void isr_print_registers(REGISTERS *reg) { printf("REGISTERS:\n"); printf("err_code=%d\n", reg->err_code); printf("eax=0x%x, ebx=0x%x, ecx=0x%x, edx=0x%x\n", reg->eax, reg->ebx, reg->ecx, reg->edx); printf("edi=0x%x, esi=0x%x, ebp=0x%x, esp=0x%x\n", reg->edi, reg->esi, reg->ebp, reg->esp); - printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->ss, reg->eflags, reg->useresp); + printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->cs, reg->ss, reg->eflags, reg->useresp); } /** @@ -85,7 +85,9 @@ static void print_registers(REGISTERS *reg) { void isr_exception_handler(REGISTERS reg) { if (reg.int_no < 32) { printf("EXCEPTION: %s\n", exception_messages[reg.int_no]); - print_registers(®); + isr_print_registers(®); + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); for (;;) ; } diff --git a/NEW KERNEL/BIOS32/src/asm/exception.asm b/NEW KERNEL/BIOS32/src/asm/exception.asm index dbfcab9..c149aef 100644 --- a/NEW KERNEL/BIOS32/src/asm/exception.asm +++ b/NEW KERNEL/BIOS32/src/asm/exception.asm @@ -1,39 +1,5 @@ section .text extern isr_exception_handler - global exception_0 - global exception_1 - global exception_2 - global exception_3 - global exception_4 - global exception_5 - global exception_6 - global exception_7 - global exception_8 - global exception_9 - global exception_10 - global exception_11 - global exception_12 - global exception_13 - global exception_14 - global exception_15 - global exception_16 - global exception_17 - global exception_18 - global exception_19 - global exception_20 - global exception_21 - global exception_22 - global exception_23 - global exception_24 - global exception_25 - global exception_26 - global exception_27 - global exception_28 - global exception_29 - global exception_30 - global exception_31 - global exception_128 - exception_handler: pusha ; push all registers @@ -61,196 +27,52 @@ exception_handler: iret -exception_0: - cli - push byte 0 ; store default err code(0) - push 0 ; push exception number index in IDT - jmp exception_handler - -exception_1: - cli - push byte 0 ; store default err code(0) - push 1 ; push exception number index in IDT - jmp exception_handler - -exception_2: - cli - push byte 0 ; store default err code(0) - push 2 ; push exception number index in IDT - jmp exception_handler - -exception_3: - cli - push byte 0 ; store default err code(0) - push 3 ; push exception number index in IDT - jmp exception_handler - -exception_4: - cli - push byte 0 ; store default err code(0) - push 4 ; push exception number index in IDT - jmp exception_handler - -exception_5: - cli - push byte 0 ; store default err code(0) - push 5 ; push exception number index in IDT - jmp exception_handler - -exception_6: - cli - push byte 0 ; store default err code(0) - push 6 ; push exception number index in IDT - jmp exception_handler - -exception_7: - cli - push byte 0 ; store default err code(0) - push 7 ; push exception number index in IDT - jmp exception_handler - -exception_8: - cli - push 8 ; push exception number index in IDT - jmp exception_handler - -exception_9: - cli - push byte 0 ; store default err code(0) - push 9 ; push exception number index in IDT - jmp exception_handler - -exception_10: - cli - push 10 ; push exception number index in IDT - jmp exception_handler - -exception_11: - cli - push 11 ; push exception number index in IDT - jmp exception_handler - -exception_12: - cli - push 12 ; push exception number index in IDT - jmp exception_handler - -exception_13: - cli - push 13 ; push exception number index in IDT - jmp exception_handler - -exception_14: - cli - push 14 ; push exception number index in IDT - jmp exception_handler - -exception_15: - cli - push byte 0 ; store default err code(0) - push 15 ; push exception number index in IDT - jmp exception_handler - -exception_16: - cli - push byte 0 ; store default err code(0) - push 16 ; push exception number index in IDT - jmp exception_handler - -exception_17: - cli - push byte 0 ; store default err code(0) - push 17 ; push exception number index in IDT - jmp exception_handler - -exception_18: - cli - push byte 0 ; store default err code(0) - push 18 ; push exception number index in IDT - jmp exception_handler - -exception_19: - cli - push byte 0 ; store default err code(0) - push 19 ; push exception number index in IDT - jmp exception_handler - -exception_20: - cli - push byte 0 ; store default err code(0) - push 20 ; push exception number index in IDT - jmp exception_handler - -exception_21: - cli - push byte 0 ; store default err code(0) - push 21 ; push exception number index in IDT - jmp exception_handler - -exception_22: - cli - push byte 0 ; store default err code(0) - push 22 ; push exception number index in IDT - jmp exception_handler - -exception_23: - cli - push byte 0 ; store default err code(0) - push 23 ; push exception number index in IDT - jmp exception_handler - -exception_24: - cli - push byte 0 ; store default err code(0) - push 24 ; push exception number index in IDT - jmp exception_handler - -exception_25: - cli - push byte 0 ; store default err code(0) - push 25 ; push exception number index in IDT - jmp exception_handler - -exception_26: - cli - push byte 0 ; store default err code(0) - push 26 ; push exception number index in IDT - jmp exception_handler - -exception_27: - cli - push byte 0 ; store default err code(0) - push 27 ; push exception number index in IDT - jmp exception_handler - -exception_28: - cli - push byte 0 ; store default err code(0) - push 28 ; push exception number index in IDT - jmp exception_handler - -exception_29: - cli - push byte 0 ; store default err code(0) - push 29 ; push exception number index in IDT - jmp exception_handler - -exception_30: - cli - push byte 0 ; store default err code(0) - push 30 ; push exception number index in IDT - jmp exception_handler - -exception_31: - cli - push byte 0 ; store default err code(0) - push 31 ; push exception number index in IDT - jmp exception_handler - -exception_128: - cli - push byte 0 ; store default err code(0) - push 128 ; push exception number index in IDT - jmp exception_handler - - +; Macro for interrupt service routines that do push an error code +%macro ISR_ERRCODE 1 +global exception_%1 +exception_%1: + ; We don't need to push a byte, the CPU did it for us + push %1 + jmp exception_handler +%endmacro + +; Macro for interrupt service routines that don't push an error code +%macro ISR_NOERRCODE 1 +global exception_%1 +exception_%1: + ; There is no error code + push byte 0 ; Push a default error code as REGISTERS expects it + push %1 ; Push the exception index + jmp exception_handler +%endmacro + + +ISR_NOERRCODE 0 ; Divison by zero exception +ISR_NOERRCODE 1 ; Debug exception +ISR_NOERRCODE 2 ; Non-maskable interrupt +ISR_NOERRCODE 3 ; INT3 breakpoint +ISR_NOERRCODE 4 ; Overflow exception +ISR_NOERRCODE 5 ; Bound exception +ISR_NOERRCODE 6 ; Invalid opcode +ISR_NOERRCODE 7 ; No FPU +ISR_ERRCODE 8 ; Double fault +ISR_NOERRCODE 9 ; Coprocessor segment overrun (reserved now) +ISR_ERRCODE 10 ; Invalid TSS +ISR_ERRCODE 11 ; Segment not present +ISR_ERRCODE 12 ; Stack segment exception +ISR_ERRCODE 13 ; General protection fault +ISR_ERRCODE 14 ; Page fault +ISR_NOERRCODE 15 ; Reserved exception +ISR_NOERRCODE 16 ; Floating-point exception +ISR_ERRCODE 17 ; Alignment check +ISR_NOERRCODE 18 ; Machine check +ISR_NOERRCODE 19 ; SIMD floating-point exception +ISR_NOERRCODE 20 ; Virtualization exception +ISR_ERRCODE 21 ; Control-protection exception +; 22 - 27 are reserved +ISR_NOERRCODE 28 ; Hypervisor injection exception +ISR_ERRCODE 29 ; VMM communication exception +ISR_ERRCODE 30 ; Security exception +ISR_NOERRCODE 31 ; Reserved + +ISR_NOERRCODE 128 ; System call \ No newline at end of file diff --git a/NEW KERNEL/BIOS32/src/isr.c b/NEW KERNEL/BIOS32/src/isr.c index 8bdb2ad..ceb135b 100644 --- a/NEW KERNEL/BIOS32/src/isr.c +++ b/NEW KERNEL/BIOS32/src/isr.c @@ -70,12 +70,12 @@ void isr_irq_handler(REGISTERS *reg) { pic8259_eoi(reg->int_no); } -static void print_registers(REGISTERS *reg) { +void isr_print_registers(REGISTERS *reg) { printf("REGISTERS:\n"); printf("err_code=%d\n", reg->err_code); printf("eax=0x%x, ebx=0x%x, ecx=0x%x, edx=0x%x\n", reg->eax, reg->ebx, reg->ecx, reg->edx); printf("edi=0x%x, esi=0x%x, ebp=0x%x, esp=0x%x\n", reg->edi, reg->esi, reg->ebp, reg->esp); - printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->ss, reg->eflags, reg->useresp); + printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->cs, reg->ss, reg->eflags, reg->useresp); } /** @@ -85,7 +85,9 @@ static void print_registers(REGISTERS *reg) { void isr_exception_handler(REGISTERS reg) { if (reg.int_no < 32) { printf("EXCEPTION: %s\n", exception_messages[reg.int_no]); - print_registers(®); + isr_print_registers(®); + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); for (;;) ; } @@ -93,5 +95,4 @@ void isr_exception_handler(REGISTERS reg) { ISR handler = g_interrupt_handlers[reg.int_no]; handler(®); } -} - +} \ No newline at end of file diff --git a/NEW KERNEL/Bitmap Text/src/asm/exception.asm b/NEW KERNEL/Bitmap Text/src/asm/exception.asm index dbfcab9..c149aef 100644 --- a/NEW KERNEL/Bitmap Text/src/asm/exception.asm +++ b/NEW KERNEL/Bitmap Text/src/asm/exception.asm @@ -1,39 +1,5 @@ section .text extern isr_exception_handler - global exception_0 - global exception_1 - global exception_2 - global exception_3 - global exception_4 - global exception_5 - global exception_6 - global exception_7 - global exception_8 - global exception_9 - global exception_10 - global exception_11 - global exception_12 - global exception_13 - global exception_14 - global exception_15 - global exception_16 - global exception_17 - global exception_18 - global exception_19 - global exception_20 - global exception_21 - global exception_22 - global exception_23 - global exception_24 - global exception_25 - global exception_26 - global exception_27 - global exception_28 - global exception_29 - global exception_30 - global exception_31 - global exception_128 - exception_handler: pusha ; push all registers @@ -61,196 +27,52 @@ exception_handler: iret -exception_0: - cli - push byte 0 ; store default err code(0) - push 0 ; push exception number index in IDT - jmp exception_handler - -exception_1: - cli - push byte 0 ; store default err code(0) - push 1 ; push exception number index in IDT - jmp exception_handler - -exception_2: - cli - push byte 0 ; store default err code(0) - push 2 ; push exception number index in IDT - jmp exception_handler - -exception_3: - cli - push byte 0 ; store default err code(0) - push 3 ; push exception number index in IDT - jmp exception_handler - -exception_4: - cli - push byte 0 ; store default err code(0) - push 4 ; push exception number index in IDT - jmp exception_handler - -exception_5: - cli - push byte 0 ; store default err code(0) - push 5 ; push exception number index in IDT - jmp exception_handler - -exception_6: - cli - push byte 0 ; store default err code(0) - push 6 ; push exception number index in IDT - jmp exception_handler - -exception_7: - cli - push byte 0 ; store default err code(0) - push 7 ; push exception number index in IDT - jmp exception_handler - -exception_8: - cli - push 8 ; push exception number index in IDT - jmp exception_handler - -exception_9: - cli - push byte 0 ; store default err code(0) - push 9 ; push exception number index in IDT - jmp exception_handler - -exception_10: - cli - push 10 ; push exception number index in IDT - jmp exception_handler - -exception_11: - cli - push 11 ; push exception number index in IDT - jmp exception_handler - -exception_12: - cli - push 12 ; push exception number index in IDT - jmp exception_handler - -exception_13: - cli - push 13 ; push exception number index in IDT - jmp exception_handler - -exception_14: - cli - push 14 ; push exception number index in IDT - jmp exception_handler - -exception_15: - cli - push byte 0 ; store default err code(0) - push 15 ; push exception number index in IDT - jmp exception_handler - -exception_16: - cli - push byte 0 ; store default err code(0) - push 16 ; push exception number index in IDT - jmp exception_handler - -exception_17: - cli - push byte 0 ; store default err code(0) - push 17 ; push exception number index in IDT - jmp exception_handler - -exception_18: - cli - push byte 0 ; store default err code(0) - push 18 ; push exception number index in IDT - jmp exception_handler - -exception_19: - cli - push byte 0 ; store default err code(0) - push 19 ; push exception number index in IDT - jmp exception_handler - -exception_20: - cli - push byte 0 ; store default err code(0) - push 20 ; push exception number index in IDT - jmp exception_handler - -exception_21: - cli - push byte 0 ; store default err code(0) - push 21 ; push exception number index in IDT - jmp exception_handler - -exception_22: - cli - push byte 0 ; store default err code(0) - push 22 ; push exception number index in IDT - jmp exception_handler - -exception_23: - cli - push byte 0 ; store default err code(0) - push 23 ; push exception number index in IDT - jmp exception_handler - -exception_24: - cli - push byte 0 ; store default err code(0) - push 24 ; push exception number index in IDT - jmp exception_handler - -exception_25: - cli - push byte 0 ; store default err code(0) - push 25 ; push exception number index in IDT - jmp exception_handler - -exception_26: - cli - push byte 0 ; store default err code(0) - push 26 ; push exception number index in IDT - jmp exception_handler - -exception_27: - cli - push byte 0 ; store default err code(0) - push 27 ; push exception number index in IDT - jmp exception_handler - -exception_28: - cli - push byte 0 ; store default err code(0) - push 28 ; push exception number index in IDT - jmp exception_handler - -exception_29: - cli - push byte 0 ; store default err code(0) - push 29 ; push exception number index in IDT - jmp exception_handler - -exception_30: - cli - push byte 0 ; store default err code(0) - push 30 ; push exception number index in IDT - jmp exception_handler - -exception_31: - cli - push byte 0 ; store default err code(0) - push 31 ; push exception number index in IDT - jmp exception_handler - -exception_128: - cli - push byte 0 ; store default err code(0) - push 128 ; push exception number index in IDT - jmp exception_handler - - +; Macro for interrupt service routines that do push an error code +%macro ISR_ERRCODE 1 +global exception_%1 +exception_%1: + ; We don't need to push a byte, the CPU did it for us + push %1 + jmp exception_handler +%endmacro + +; Macro for interrupt service routines that don't push an error code +%macro ISR_NOERRCODE 1 +global exception_%1 +exception_%1: + ; There is no error code + push byte 0 ; Push a default error code as REGISTERS expects it + push %1 ; Push the exception index + jmp exception_handler +%endmacro + + +ISR_NOERRCODE 0 ; Divison by zero exception +ISR_NOERRCODE 1 ; Debug exception +ISR_NOERRCODE 2 ; Non-maskable interrupt +ISR_NOERRCODE 3 ; INT3 breakpoint +ISR_NOERRCODE 4 ; Overflow exception +ISR_NOERRCODE 5 ; Bound exception +ISR_NOERRCODE 6 ; Invalid opcode +ISR_NOERRCODE 7 ; No FPU +ISR_ERRCODE 8 ; Double fault +ISR_NOERRCODE 9 ; Coprocessor segment overrun (reserved now) +ISR_ERRCODE 10 ; Invalid TSS +ISR_ERRCODE 11 ; Segment not present +ISR_ERRCODE 12 ; Stack segment exception +ISR_ERRCODE 13 ; General protection fault +ISR_ERRCODE 14 ; Page fault +ISR_NOERRCODE 15 ; Reserved exception +ISR_NOERRCODE 16 ; Floating-point exception +ISR_ERRCODE 17 ; Alignment check +ISR_NOERRCODE 18 ; Machine check +ISR_NOERRCODE 19 ; SIMD floating-point exception +ISR_NOERRCODE 20 ; Virtualization exception +ISR_ERRCODE 21 ; Control-protection exception +; 22 - 27 are reserved +ISR_NOERRCODE 28 ; Hypervisor injection exception +ISR_ERRCODE 29 ; VMM communication exception +ISR_ERRCODE 30 ; Security exception +ISR_NOERRCODE 31 ; Reserved + +ISR_NOERRCODE 128 ; System call \ No newline at end of file diff --git a/NEW KERNEL/Bitmap Text/src/isr.c b/NEW KERNEL/Bitmap Text/src/isr.c index 81380af..ceb135b 100644 --- a/NEW KERNEL/Bitmap Text/src/isr.c +++ b/NEW KERNEL/Bitmap Text/src/isr.c @@ -70,12 +70,12 @@ void isr_irq_handler(REGISTERS *reg) { pic8259_eoi(reg->int_no); } -static void print_registers(REGISTERS *reg) { +void isr_print_registers(REGISTERS *reg) { printf("REGISTERS:\n"); printf("err_code=%d\n", reg->err_code); printf("eax=0x%x, ebx=0x%x, ecx=0x%x, edx=0x%x\n", reg->eax, reg->ebx, reg->ecx, reg->edx); printf("edi=0x%x, esi=0x%x, ebp=0x%x, esp=0x%x\n", reg->edi, reg->esi, reg->ebp, reg->esp); - printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->ss, reg->eflags, reg->useresp); + printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->cs, reg->ss, reg->eflags, reg->useresp); } /** @@ -85,7 +85,9 @@ static void print_registers(REGISTERS *reg) { void isr_exception_handler(REGISTERS reg) { if (reg.int_no < 32) { printf("EXCEPTION: %s\n", exception_messages[reg.int_no]); - print_registers(®); + isr_print_registers(®); + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); for (;;) ; } diff --git a/NEW KERNEL/Console/src/asm/exception.asm b/NEW KERNEL/Console/src/asm/exception.asm new file mode 100644 index 0000000..c149aef --- /dev/null +++ b/NEW KERNEL/Console/src/asm/exception.asm @@ -0,0 +1,78 @@ +section .text + extern isr_exception_handler + +exception_handler: + pusha ; push all registers + mov ax, ds + push eax ; save ds + + mov ax, 0x10 ; load kernel data segment + mov ds, ax + mov es, ax + mov fs, ax + mov gs, ax + + call isr_exception_handler + + pop ebx ; restore kernel data segment + mov ds, bx + mov es, bx + mov fs, bx + mov gs, bx + + popa ; restore all registers + add esp, 0x8 ; restore stack for erro no been pushed + + sti ; re-enable interrupts + iret + + +; Macro for interrupt service routines that do push an error code +%macro ISR_ERRCODE 1 +global exception_%1 +exception_%1: + ; We don't need to push a byte, the CPU did it for us + push %1 + jmp exception_handler +%endmacro + +; Macro for interrupt service routines that don't push an error code +%macro ISR_NOERRCODE 1 +global exception_%1 +exception_%1: + ; There is no error code + push byte 0 ; Push a default error code as REGISTERS expects it + push %1 ; Push the exception index + jmp exception_handler +%endmacro + + +ISR_NOERRCODE 0 ; Divison by zero exception +ISR_NOERRCODE 1 ; Debug exception +ISR_NOERRCODE 2 ; Non-maskable interrupt +ISR_NOERRCODE 3 ; INT3 breakpoint +ISR_NOERRCODE 4 ; Overflow exception +ISR_NOERRCODE 5 ; Bound exception +ISR_NOERRCODE 6 ; Invalid opcode +ISR_NOERRCODE 7 ; No FPU +ISR_ERRCODE 8 ; Double fault +ISR_NOERRCODE 9 ; Coprocessor segment overrun (reserved now) +ISR_ERRCODE 10 ; Invalid TSS +ISR_ERRCODE 11 ; Segment not present +ISR_ERRCODE 12 ; Stack segment exception +ISR_ERRCODE 13 ; General protection fault +ISR_ERRCODE 14 ; Page fault +ISR_NOERRCODE 15 ; Reserved exception +ISR_NOERRCODE 16 ; Floating-point exception +ISR_ERRCODE 17 ; Alignment check +ISR_NOERRCODE 18 ; Machine check +ISR_NOERRCODE 19 ; SIMD floating-point exception +ISR_NOERRCODE 20 ; Virtualization exception +ISR_ERRCODE 21 ; Control-protection exception +; 22 - 27 are reserved +ISR_NOERRCODE 28 ; Hypervisor injection exception +ISR_ERRCODE 29 ; VMM communication exception +ISR_ERRCODE 30 ; Security exception +ISR_NOERRCODE 31 ; Reserved + +ISR_NOERRCODE 128 ; System call \ No newline at end of file diff --git a/NEW KERNEL/Console/src/isr.c b/NEW KERNEL/Console/src/isr.c new file mode 100644 index 0000000..ceb135b --- /dev/null +++ b/NEW KERNEL/Console/src/isr.c @@ -0,0 +1,98 @@ +#include "isr.h" +#include "idt.h" +#include "8259_pic.h" +#include "console.h" + +// For both exceptions and irq interrupt +ISR g_interrupt_handlers[NO_INTERRUPT_HANDLERS]; + +// for more details, see Intel manual -> Interrupt & Exception Handling +char *exception_messages[32] = { + "Division By Zero", + "Debug", + "Non Maskable Interrupt", + "Breakpoint", + "Overflow", + "BOUND Range Exceeded", + "Invalid Opcode", + "Device Not Available (No Math Coprocessor)", + "Double Fault", + "Coprocessor Segment Overrun", + "Invalid TSS", + "Segment Not Present", + "Stack-Segment Fault", + "General Protection", + "Page Fault", + "Unknown Interrupt (intel reserved)", + "x87 FPU Floating-Point Error (Math Fault)", + "Alignment Check", + "Machine Check", + "SIMD Floating-Point Exception", + "Virtualization Exception", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved" +}; + +/** + * register given handler to interrupt handlers at given num + */ +void isr_register_interrupt_handler(int num, ISR handler) { + printf("IRQ %d registered\n", num); + if (num < NO_INTERRUPT_HANDLERS) + g_interrupt_handlers[num] = handler; +} + +/* + * turn off current interrupt +*/ +void isr_end_interrupt(int num) { + pic8259_eoi(num); +} + +/** + * invoke isr routine and send eoi to pic, + * being called in irq.asm + */ +void isr_irq_handler(REGISTERS *reg) { + if (g_interrupt_handlers[reg->int_no] != NULL) { + ISR handler = g_interrupt_handlers[reg->int_no]; + handler(reg); + } + pic8259_eoi(reg->int_no); +} + +void isr_print_registers(REGISTERS *reg) { + printf("REGISTERS:\n"); + printf("err_code=%d\n", reg->err_code); + printf("eax=0x%x, ebx=0x%x, ecx=0x%x, edx=0x%x\n", reg->eax, reg->ebx, reg->ecx, reg->edx); + printf("edi=0x%x, esi=0x%x, ebp=0x%x, esp=0x%x\n", reg->edi, reg->esi, reg->ebp, reg->esp); + printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->cs, reg->ss, reg->eflags, reg->useresp); +} + +/** + * invoke exception routine, + * being called in exception.asm + */ +void isr_exception_handler(REGISTERS reg) { + if (reg.int_no < 32) { + printf("EXCEPTION: %s\n", exception_messages[reg.int_no]); + isr_print_registers(®); + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); + for (;;) + ; + } + if (g_interrupt_handlers[reg.int_no] != NULL) { + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); + } +} \ No newline at end of file diff --git a/NEW KERNEL/FPU/src/asm/exception.asm b/NEW KERNEL/FPU/src/asm/exception.asm index dbfcab9..c149aef 100644 --- a/NEW KERNEL/FPU/src/asm/exception.asm +++ b/NEW KERNEL/FPU/src/asm/exception.asm @@ -1,39 +1,5 @@ section .text extern isr_exception_handler - global exception_0 - global exception_1 - global exception_2 - global exception_3 - global exception_4 - global exception_5 - global exception_6 - global exception_7 - global exception_8 - global exception_9 - global exception_10 - global exception_11 - global exception_12 - global exception_13 - global exception_14 - global exception_15 - global exception_16 - global exception_17 - global exception_18 - global exception_19 - global exception_20 - global exception_21 - global exception_22 - global exception_23 - global exception_24 - global exception_25 - global exception_26 - global exception_27 - global exception_28 - global exception_29 - global exception_30 - global exception_31 - global exception_128 - exception_handler: pusha ; push all registers @@ -61,196 +27,52 @@ exception_handler: iret -exception_0: - cli - push byte 0 ; store default err code(0) - push 0 ; push exception number index in IDT - jmp exception_handler - -exception_1: - cli - push byte 0 ; store default err code(0) - push 1 ; push exception number index in IDT - jmp exception_handler - -exception_2: - cli - push byte 0 ; store default err code(0) - push 2 ; push exception number index in IDT - jmp exception_handler - -exception_3: - cli - push byte 0 ; store default err code(0) - push 3 ; push exception number index in IDT - jmp exception_handler - -exception_4: - cli - push byte 0 ; store default err code(0) - push 4 ; push exception number index in IDT - jmp exception_handler - -exception_5: - cli - push byte 0 ; store default err code(0) - push 5 ; push exception number index in IDT - jmp exception_handler - -exception_6: - cli - push byte 0 ; store default err code(0) - push 6 ; push exception number index in IDT - jmp exception_handler - -exception_7: - cli - push byte 0 ; store default err code(0) - push 7 ; push exception number index in IDT - jmp exception_handler - -exception_8: - cli - push 8 ; push exception number index in IDT - jmp exception_handler - -exception_9: - cli - push byte 0 ; store default err code(0) - push 9 ; push exception number index in IDT - jmp exception_handler - -exception_10: - cli - push 10 ; push exception number index in IDT - jmp exception_handler - -exception_11: - cli - push 11 ; push exception number index in IDT - jmp exception_handler - -exception_12: - cli - push 12 ; push exception number index in IDT - jmp exception_handler - -exception_13: - cli - push 13 ; push exception number index in IDT - jmp exception_handler - -exception_14: - cli - push 14 ; push exception number index in IDT - jmp exception_handler - -exception_15: - cli - push byte 0 ; store default err code(0) - push 15 ; push exception number index in IDT - jmp exception_handler - -exception_16: - cli - push byte 0 ; store default err code(0) - push 16 ; push exception number index in IDT - jmp exception_handler - -exception_17: - cli - push byte 0 ; store default err code(0) - push 17 ; push exception number index in IDT - jmp exception_handler - -exception_18: - cli - push byte 0 ; store default err code(0) - push 18 ; push exception number index in IDT - jmp exception_handler - -exception_19: - cli - push byte 0 ; store default err code(0) - push 19 ; push exception number index in IDT - jmp exception_handler - -exception_20: - cli - push byte 0 ; store default err code(0) - push 20 ; push exception number index in IDT - jmp exception_handler - -exception_21: - cli - push byte 0 ; store default err code(0) - push 21 ; push exception number index in IDT - jmp exception_handler - -exception_22: - cli - push byte 0 ; store default err code(0) - push 22 ; push exception number index in IDT - jmp exception_handler - -exception_23: - cli - push byte 0 ; store default err code(0) - push 23 ; push exception number index in IDT - jmp exception_handler - -exception_24: - cli - push byte 0 ; store default err code(0) - push 24 ; push exception number index in IDT - jmp exception_handler - -exception_25: - cli - push byte 0 ; store default err code(0) - push 25 ; push exception number index in IDT - jmp exception_handler - -exception_26: - cli - push byte 0 ; store default err code(0) - push 26 ; push exception number index in IDT - jmp exception_handler - -exception_27: - cli - push byte 0 ; store default err code(0) - push 27 ; push exception number index in IDT - jmp exception_handler - -exception_28: - cli - push byte 0 ; store default err code(0) - push 28 ; push exception number index in IDT - jmp exception_handler - -exception_29: - cli - push byte 0 ; store default err code(0) - push 29 ; push exception number index in IDT - jmp exception_handler - -exception_30: - cli - push byte 0 ; store default err code(0) - push 30 ; push exception number index in IDT - jmp exception_handler - -exception_31: - cli - push byte 0 ; store default err code(0) - push 31 ; push exception number index in IDT - jmp exception_handler - -exception_128: - cli - push byte 0 ; store default err code(0) - push 128 ; push exception number index in IDT - jmp exception_handler - - +; Macro for interrupt service routines that do push an error code +%macro ISR_ERRCODE 1 +global exception_%1 +exception_%1: + ; We don't need to push a byte, the CPU did it for us + push %1 + jmp exception_handler +%endmacro + +; Macro for interrupt service routines that don't push an error code +%macro ISR_NOERRCODE 1 +global exception_%1 +exception_%1: + ; There is no error code + push byte 0 ; Push a default error code as REGISTERS expects it + push %1 ; Push the exception index + jmp exception_handler +%endmacro + + +ISR_NOERRCODE 0 ; Divison by zero exception +ISR_NOERRCODE 1 ; Debug exception +ISR_NOERRCODE 2 ; Non-maskable interrupt +ISR_NOERRCODE 3 ; INT3 breakpoint +ISR_NOERRCODE 4 ; Overflow exception +ISR_NOERRCODE 5 ; Bound exception +ISR_NOERRCODE 6 ; Invalid opcode +ISR_NOERRCODE 7 ; No FPU +ISR_ERRCODE 8 ; Double fault +ISR_NOERRCODE 9 ; Coprocessor segment overrun (reserved now) +ISR_ERRCODE 10 ; Invalid TSS +ISR_ERRCODE 11 ; Segment not present +ISR_ERRCODE 12 ; Stack segment exception +ISR_ERRCODE 13 ; General protection fault +ISR_ERRCODE 14 ; Page fault +ISR_NOERRCODE 15 ; Reserved exception +ISR_NOERRCODE 16 ; Floating-point exception +ISR_ERRCODE 17 ; Alignment check +ISR_NOERRCODE 18 ; Machine check +ISR_NOERRCODE 19 ; SIMD floating-point exception +ISR_NOERRCODE 20 ; Virtualization exception +ISR_ERRCODE 21 ; Control-protection exception +; 22 - 27 are reserved +ISR_NOERRCODE 28 ; Hypervisor injection exception +ISR_ERRCODE 29 ; VMM communication exception +ISR_ERRCODE 30 ; Security exception +ISR_NOERRCODE 31 ; Reserved + +ISR_NOERRCODE 128 ; System call \ No newline at end of file diff --git a/NEW KERNEL/FPU/src/isr.c b/NEW KERNEL/FPU/src/isr.c index 81380af..ceb135b 100644 --- a/NEW KERNEL/FPU/src/isr.c +++ b/NEW KERNEL/FPU/src/isr.c @@ -70,12 +70,12 @@ void isr_irq_handler(REGISTERS *reg) { pic8259_eoi(reg->int_no); } -static void print_registers(REGISTERS *reg) { +void isr_print_registers(REGISTERS *reg) { printf("REGISTERS:\n"); printf("err_code=%d\n", reg->err_code); printf("eax=0x%x, ebx=0x%x, ecx=0x%x, edx=0x%x\n", reg->eax, reg->ebx, reg->ecx, reg->edx); printf("edi=0x%x, esi=0x%x, ebp=0x%x, esp=0x%x\n", reg->edi, reg->esi, reg->ebp, reg->esp); - printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->ss, reg->eflags, reg->useresp); + printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->cs, reg->ss, reg->eflags, reg->useresp); } /** @@ -85,7 +85,9 @@ static void print_registers(REGISTERS *reg) { void isr_exception_handler(REGISTERS reg) { if (reg.int_no < 32) { printf("EXCEPTION: %s\n", exception_messages[reg.int_no]); - print_registers(®); + isr_print_registers(®); + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); for (;;) ; } diff --git a/NEW KERNEL/GDT/src/asm/exception.asm b/NEW KERNEL/GDT/src/asm/exception.asm new file mode 100644 index 0000000..c149aef --- /dev/null +++ b/NEW KERNEL/GDT/src/asm/exception.asm @@ -0,0 +1,78 @@ +section .text + extern isr_exception_handler + +exception_handler: + pusha ; push all registers + mov ax, ds + push eax ; save ds + + mov ax, 0x10 ; load kernel data segment + mov ds, ax + mov es, ax + mov fs, ax + mov gs, ax + + call isr_exception_handler + + pop ebx ; restore kernel data segment + mov ds, bx + mov es, bx + mov fs, bx + mov gs, bx + + popa ; restore all registers + add esp, 0x8 ; restore stack for erro no been pushed + + sti ; re-enable interrupts + iret + + +; Macro for interrupt service routines that do push an error code +%macro ISR_ERRCODE 1 +global exception_%1 +exception_%1: + ; We don't need to push a byte, the CPU did it for us + push %1 + jmp exception_handler +%endmacro + +; Macro for interrupt service routines that don't push an error code +%macro ISR_NOERRCODE 1 +global exception_%1 +exception_%1: + ; There is no error code + push byte 0 ; Push a default error code as REGISTERS expects it + push %1 ; Push the exception index + jmp exception_handler +%endmacro + + +ISR_NOERRCODE 0 ; Divison by zero exception +ISR_NOERRCODE 1 ; Debug exception +ISR_NOERRCODE 2 ; Non-maskable interrupt +ISR_NOERRCODE 3 ; INT3 breakpoint +ISR_NOERRCODE 4 ; Overflow exception +ISR_NOERRCODE 5 ; Bound exception +ISR_NOERRCODE 6 ; Invalid opcode +ISR_NOERRCODE 7 ; No FPU +ISR_ERRCODE 8 ; Double fault +ISR_NOERRCODE 9 ; Coprocessor segment overrun (reserved now) +ISR_ERRCODE 10 ; Invalid TSS +ISR_ERRCODE 11 ; Segment not present +ISR_ERRCODE 12 ; Stack segment exception +ISR_ERRCODE 13 ; General protection fault +ISR_ERRCODE 14 ; Page fault +ISR_NOERRCODE 15 ; Reserved exception +ISR_NOERRCODE 16 ; Floating-point exception +ISR_ERRCODE 17 ; Alignment check +ISR_NOERRCODE 18 ; Machine check +ISR_NOERRCODE 19 ; SIMD floating-point exception +ISR_NOERRCODE 20 ; Virtualization exception +ISR_ERRCODE 21 ; Control-protection exception +; 22 - 27 are reserved +ISR_NOERRCODE 28 ; Hypervisor injection exception +ISR_ERRCODE 29 ; VMM communication exception +ISR_ERRCODE 30 ; Security exception +ISR_NOERRCODE 31 ; Reserved + +ISR_NOERRCODE 128 ; System call \ No newline at end of file diff --git a/NEW KERNEL/GDT/src/isr.c b/NEW KERNEL/GDT/src/isr.c new file mode 100644 index 0000000..ceb135b --- /dev/null +++ b/NEW KERNEL/GDT/src/isr.c @@ -0,0 +1,98 @@ +#include "isr.h" +#include "idt.h" +#include "8259_pic.h" +#include "console.h" + +// For both exceptions and irq interrupt +ISR g_interrupt_handlers[NO_INTERRUPT_HANDLERS]; + +// for more details, see Intel manual -> Interrupt & Exception Handling +char *exception_messages[32] = { + "Division By Zero", + "Debug", + "Non Maskable Interrupt", + "Breakpoint", + "Overflow", + "BOUND Range Exceeded", + "Invalid Opcode", + "Device Not Available (No Math Coprocessor)", + "Double Fault", + "Coprocessor Segment Overrun", + "Invalid TSS", + "Segment Not Present", + "Stack-Segment Fault", + "General Protection", + "Page Fault", + "Unknown Interrupt (intel reserved)", + "x87 FPU Floating-Point Error (Math Fault)", + "Alignment Check", + "Machine Check", + "SIMD Floating-Point Exception", + "Virtualization Exception", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved" +}; + +/** + * register given handler to interrupt handlers at given num + */ +void isr_register_interrupt_handler(int num, ISR handler) { + printf("IRQ %d registered\n", num); + if (num < NO_INTERRUPT_HANDLERS) + g_interrupt_handlers[num] = handler; +} + +/* + * turn off current interrupt +*/ +void isr_end_interrupt(int num) { + pic8259_eoi(num); +} + +/** + * invoke isr routine and send eoi to pic, + * being called in irq.asm + */ +void isr_irq_handler(REGISTERS *reg) { + if (g_interrupt_handlers[reg->int_no] != NULL) { + ISR handler = g_interrupt_handlers[reg->int_no]; + handler(reg); + } + pic8259_eoi(reg->int_no); +} + +void isr_print_registers(REGISTERS *reg) { + printf("REGISTERS:\n"); + printf("err_code=%d\n", reg->err_code); + printf("eax=0x%x, ebx=0x%x, ecx=0x%x, edx=0x%x\n", reg->eax, reg->ebx, reg->ecx, reg->edx); + printf("edi=0x%x, esi=0x%x, ebp=0x%x, esp=0x%x\n", reg->edi, reg->esi, reg->ebp, reg->esp); + printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->cs, reg->ss, reg->eflags, reg->useresp); +} + +/** + * invoke exception routine, + * being called in exception.asm + */ +void isr_exception_handler(REGISTERS reg) { + if (reg.int_no < 32) { + printf("EXCEPTION: %s\n", exception_messages[reg.int_no]); + isr_print_registers(®); + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); + for (;;) + ; + } + if (g_interrupt_handlers[reg.int_no] != NULL) { + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); + } +} \ No newline at end of file diff --git a/NEW KERNEL/IDT/src/asm/exception.asm b/NEW KERNEL/IDT/src/asm/exception.asm index dbfcab9..c149aef 100644 --- a/NEW KERNEL/IDT/src/asm/exception.asm +++ b/NEW KERNEL/IDT/src/asm/exception.asm @@ -1,39 +1,5 @@ section .text extern isr_exception_handler - global exception_0 - global exception_1 - global exception_2 - global exception_3 - global exception_4 - global exception_5 - global exception_6 - global exception_7 - global exception_8 - global exception_9 - global exception_10 - global exception_11 - global exception_12 - global exception_13 - global exception_14 - global exception_15 - global exception_16 - global exception_17 - global exception_18 - global exception_19 - global exception_20 - global exception_21 - global exception_22 - global exception_23 - global exception_24 - global exception_25 - global exception_26 - global exception_27 - global exception_28 - global exception_29 - global exception_30 - global exception_31 - global exception_128 - exception_handler: pusha ; push all registers @@ -61,196 +27,52 @@ exception_handler: iret -exception_0: - cli - push byte 0 ; store default err code(0) - push 0 ; push exception number index in IDT - jmp exception_handler - -exception_1: - cli - push byte 0 ; store default err code(0) - push 1 ; push exception number index in IDT - jmp exception_handler - -exception_2: - cli - push byte 0 ; store default err code(0) - push 2 ; push exception number index in IDT - jmp exception_handler - -exception_3: - cli - push byte 0 ; store default err code(0) - push 3 ; push exception number index in IDT - jmp exception_handler - -exception_4: - cli - push byte 0 ; store default err code(0) - push 4 ; push exception number index in IDT - jmp exception_handler - -exception_5: - cli - push byte 0 ; store default err code(0) - push 5 ; push exception number index in IDT - jmp exception_handler - -exception_6: - cli - push byte 0 ; store default err code(0) - push 6 ; push exception number index in IDT - jmp exception_handler - -exception_7: - cli - push byte 0 ; store default err code(0) - push 7 ; push exception number index in IDT - jmp exception_handler - -exception_8: - cli - push 8 ; push exception number index in IDT - jmp exception_handler - -exception_9: - cli - push byte 0 ; store default err code(0) - push 9 ; push exception number index in IDT - jmp exception_handler - -exception_10: - cli - push 10 ; push exception number index in IDT - jmp exception_handler - -exception_11: - cli - push 11 ; push exception number index in IDT - jmp exception_handler - -exception_12: - cli - push 12 ; push exception number index in IDT - jmp exception_handler - -exception_13: - cli - push 13 ; push exception number index in IDT - jmp exception_handler - -exception_14: - cli - push 14 ; push exception number index in IDT - jmp exception_handler - -exception_15: - cli - push byte 0 ; store default err code(0) - push 15 ; push exception number index in IDT - jmp exception_handler - -exception_16: - cli - push byte 0 ; store default err code(0) - push 16 ; push exception number index in IDT - jmp exception_handler - -exception_17: - cli - push byte 0 ; store default err code(0) - push 17 ; push exception number index in IDT - jmp exception_handler - -exception_18: - cli - push byte 0 ; store default err code(0) - push 18 ; push exception number index in IDT - jmp exception_handler - -exception_19: - cli - push byte 0 ; store default err code(0) - push 19 ; push exception number index in IDT - jmp exception_handler - -exception_20: - cli - push byte 0 ; store default err code(0) - push 20 ; push exception number index in IDT - jmp exception_handler - -exception_21: - cli - push byte 0 ; store default err code(0) - push 21 ; push exception number index in IDT - jmp exception_handler - -exception_22: - cli - push byte 0 ; store default err code(0) - push 22 ; push exception number index in IDT - jmp exception_handler - -exception_23: - cli - push byte 0 ; store default err code(0) - push 23 ; push exception number index in IDT - jmp exception_handler - -exception_24: - cli - push byte 0 ; store default err code(0) - push 24 ; push exception number index in IDT - jmp exception_handler - -exception_25: - cli - push byte 0 ; store default err code(0) - push 25 ; push exception number index in IDT - jmp exception_handler - -exception_26: - cli - push byte 0 ; store default err code(0) - push 26 ; push exception number index in IDT - jmp exception_handler - -exception_27: - cli - push byte 0 ; store default err code(0) - push 27 ; push exception number index in IDT - jmp exception_handler - -exception_28: - cli - push byte 0 ; store default err code(0) - push 28 ; push exception number index in IDT - jmp exception_handler - -exception_29: - cli - push byte 0 ; store default err code(0) - push 29 ; push exception number index in IDT - jmp exception_handler - -exception_30: - cli - push byte 0 ; store default err code(0) - push 30 ; push exception number index in IDT - jmp exception_handler - -exception_31: - cli - push byte 0 ; store default err code(0) - push 31 ; push exception number index in IDT - jmp exception_handler - -exception_128: - cli - push byte 0 ; store default err code(0) - push 128 ; push exception number index in IDT - jmp exception_handler - - +; Macro for interrupt service routines that do push an error code +%macro ISR_ERRCODE 1 +global exception_%1 +exception_%1: + ; We don't need to push a byte, the CPU did it for us + push %1 + jmp exception_handler +%endmacro + +; Macro for interrupt service routines that don't push an error code +%macro ISR_NOERRCODE 1 +global exception_%1 +exception_%1: + ; There is no error code + push byte 0 ; Push a default error code as REGISTERS expects it + push %1 ; Push the exception index + jmp exception_handler +%endmacro + + +ISR_NOERRCODE 0 ; Divison by zero exception +ISR_NOERRCODE 1 ; Debug exception +ISR_NOERRCODE 2 ; Non-maskable interrupt +ISR_NOERRCODE 3 ; INT3 breakpoint +ISR_NOERRCODE 4 ; Overflow exception +ISR_NOERRCODE 5 ; Bound exception +ISR_NOERRCODE 6 ; Invalid opcode +ISR_NOERRCODE 7 ; No FPU +ISR_ERRCODE 8 ; Double fault +ISR_NOERRCODE 9 ; Coprocessor segment overrun (reserved now) +ISR_ERRCODE 10 ; Invalid TSS +ISR_ERRCODE 11 ; Segment not present +ISR_ERRCODE 12 ; Stack segment exception +ISR_ERRCODE 13 ; General protection fault +ISR_ERRCODE 14 ; Page fault +ISR_NOERRCODE 15 ; Reserved exception +ISR_NOERRCODE 16 ; Floating-point exception +ISR_ERRCODE 17 ; Alignment check +ISR_NOERRCODE 18 ; Machine check +ISR_NOERRCODE 19 ; SIMD floating-point exception +ISR_NOERRCODE 20 ; Virtualization exception +ISR_ERRCODE 21 ; Control-protection exception +; 22 - 27 are reserved +ISR_NOERRCODE 28 ; Hypervisor injection exception +ISR_ERRCODE 29 ; VMM communication exception +ISR_ERRCODE 30 ; Security exception +ISR_NOERRCODE 31 ; Reserved + +ISR_NOERRCODE 128 ; System call \ No newline at end of file diff --git a/NEW KERNEL/IDT/src/isr.c b/NEW KERNEL/IDT/src/isr.c index 8bdb2ad..ceb135b 100644 --- a/NEW KERNEL/IDT/src/isr.c +++ b/NEW KERNEL/IDT/src/isr.c @@ -70,12 +70,12 @@ void isr_irq_handler(REGISTERS *reg) { pic8259_eoi(reg->int_no); } -static void print_registers(REGISTERS *reg) { +void isr_print_registers(REGISTERS *reg) { printf("REGISTERS:\n"); printf("err_code=%d\n", reg->err_code); printf("eax=0x%x, ebx=0x%x, ecx=0x%x, edx=0x%x\n", reg->eax, reg->ebx, reg->ecx, reg->edx); printf("edi=0x%x, esi=0x%x, ebp=0x%x, esp=0x%x\n", reg->edi, reg->esi, reg->ebp, reg->esp); - printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->ss, reg->eflags, reg->useresp); + printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->cs, reg->ss, reg->eflags, reg->useresp); } /** @@ -85,7 +85,9 @@ static void print_registers(REGISTERS *reg) { void isr_exception_handler(REGISTERS reg) { if (reg.int_no < 32) { printf("EXCEPTION: %s\n", exception_messages[reg.int_no]); - print_registers(®); + isr_print_registers(®); + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); for (;;) ; } @@ -93,5 +95,4 @@ void isr_exception_handler(REGISTERS reg) { ISR handler = g_interrupt_handlers[reg.int_no]; handler(®); } -} - +} \ No newline at end of file diff --git a/NEW KERNEL/KHeap/src/asm/exception.asm b/NEW KERNEL/KHeap/src/asm/exception.asm index dbfcab9..c149aef 100644 --- a/NEW KERNEL/KHeap/src/asm/exception.asm +++ b/NEW KERNEL/KHeap/src/asm/exception.asm @@ -1,39 +1,5 @@ section .text extern isr_exception_handler - global exception_0 - global exception_1 - global exception_2 - global exception_3 - global exception_4 - global exception_5 - global exception_6 - global exception_7 - global exception_8 - global exception_9 - global exception_10 - global exception_11 - global exception_12 - global exception_13 - global exception_14 - global exception_15 - global exception_16 - global exception_17 - global exception_18 - global exception_19 - global exception_20 - global exception_21 - global exception_22 - global exception_23 - global exception_24 - global exception_25 - global exception_26 - global exception_27 - global exception_28 - global exception_29 - global exception_30 - global exception_31 - global exception_128 - exception_handler: pusha ; push all registers @@ -61,196 +27,52 @@ exception_handler: iret -exception_0: - cli - push byte 0 ; store default err code(0) - push 0 ; push exception number index in IDT - jmp exception_handler - -exception_1: - cli - push byte 0 ; store default err code(0) - push 1 ; push exception number index in IDT - jmp exception_handler - -exception_2: - cli - push byte 0 ; store default err code(0) - push 2 ; push exception number index in IDT - jmp exception_handler - -exception_3: - cli - push byte 0 ; store default err code(0) - push 3 ; push exception number index in IDT - jmp exception_handler - -exception_4: - cli - push byte 0 ; store default err code(0) - push 4 ; push exception number index in IDT - jmp exception_handler - -exception_5: - cli - push byte 0 ; store default err code(0) - push 5 ; push exception number index in IDT - jmp exception_handler - -exception_6: - cli - push byte 0 ; store default err code(0) - push 6 ; push exception number index in IDT - jmp exception_handler - -exception_7: - cli - push byte 0 ; store default err code(0) - push 7 ; push exception number index in IDT - jmp exception_handler - -exception_8: - cli - push 8 ; push exception number index in IDT - jmp exception_handler - -exception_9: - cli - push byte 0 ; store default err code(0) - push 9 ; push exception number index in IDT - jmp exception_handler - -exception_10: - cli - push 10 ; push exception number index in IDT - jmp exception_handler - -exception_11: - cli - push 11 ; push exception number index in IDT - jmp exception_handler - -exception_12: - cli - push 12 ; push exception number index in IDT - jmp exception_handler - -exception_13: - cli - push 13 ; push exception number index in IDT - jmp exception_handler - -exception_14: - cli - push 14 ; push exception number index in IDT - jmp exception_handler - -exception_15: - cli - push byte 0 ; store default err code(0) - push 15 ; push exception number index in IDT - jmp exception_handler - -exception_16: - cli - push byte 0 ; store default err code(0) - push 16 ; push exception number index in IDT - jmp exception_handler - -exception_17: - cli - push byte 0 ; store default err code(0) - push 17 ; push exception number index in IDT - jmp exception_handler - -exception_18: - cli - push byte 0 ; store default err code(0) - push 18 ; push exception number index in IDT - jmp exception_handler - -exception_19: - cli - push byte 0 ; store default err code(0) - push 19 ; push exception number index in IDT - jmp exception_handler - -exception_20: - cli - push byte 0 ; store default err code(0) - push 20 ; push exception number index in IDT - jmp exception_handler - -exception_21: - cli - push byte 0 ; store default err code(0) - push 21 ; push exception number index in IDT - jmp exception_handler - -exception_22: - cli - push byte 0 ; store default err code(0) - push 22 ; push exception number index in IDT - jmp exception_handler - -exception_23: - cli - push byte 0 ; store default err code(0) - push 23 ; push exception number index in IDT - jmp exception_handler - -exception_24: - cli - push byte 0 ; store default err code(0) - push 24 ; push exception number index in IDT - jmp exception_handler - -exception_25: - cli - push byte 0 ; store default err code(0) - push 25 ; push exception number index in IDT - jmp exception_handler - -exception_26: - cli - push byte 0 ; store default err code(0) - push 26 ; push exception number index in IDT - jmp exception_handler - -exception_27: - cli - push byte 0 ; store default err code(0) - push 27 ; push exception number index in IDT - jmp exception_handler - -exception_28: - cli - push byte 0 ; store default err code(0) - push 28 ; push exception number index in IDT - jmp exception_handler - -exception_29: - cli - push byte 0 ; store default err code(0) - push 29 ; push exception number index in IDT - jmp exception_handler - -exception_30: - cli - push byte 0 ; store default err code(0) - push 30 ; push exception number index in IDT - jmp exception_handler - -exception_31: - cli - push byte 0 ; store default err code(0) - push 31 ; push exception number index in IDT - jmp exception_handler - -exception_128: - cli - push byte 0 ; store default err code(0) - push 128 ; push exception number index in IDT - jmp exception_handler - - +; Macro for interrupt service routines that do push an error code +%macro ISR_ERRCODE 1 +global exception_%1 +exception_%1: + ; We don't need to push a byte, the CPU did it for us + push %1 + jmp exception_handler +%endmacro + +; Macro for interrupt service routines that don't push an error code +%macro ISR_NOERRCODE 1 +global exception_%1 +exception_%1: + ; There is no error code + push byte 0 ; Push a default error code as REGISTERS expects it + push %1 ; Push the exception index + jmp exception_handler +%endmacro + + +ISR_NOERRCODE 0 ; Divison by zero exception +ISR_NOERRCODE 1 ; Debug exception +ISR_NOERRCODE 2 ; Non-maskable interrupt +ISR_NOERRCODE 3 ; INT3 breakpoint +ISR_NOERRCODE 4 ; Overflow exception +ISR_NOERRCODE 5 ; Bound exception +ISR_NOERRCODE 6 ; Invalid opcode +ISR_NOERRCODE 7 ; No FPU +ISR_ERRCODE 8 ; Double fault +ISR_NOERRCODE 9 ; Coprocessor segment overrun (reserved now) +ISR_ERRCODE 10 ; Invalid TSS +ISR_ERRCODE 11 ; Segment not present +ISR_ERRCODE 12 ; Stack segment exception +ISR_ERRCODE 13 ; General protection fault +ISR_ERRCODE 14 ; Page fault +ISR_NOERRCODE 15 ; Reserved exception +ISR_NOERRCODE 16 ; Floating-point exception +ISR_ERRCODE 17 ; Alignment check +ISR_NOERRCODE 18 ; Machine check +ISR_NOERRCODE 19 ; SIMD floating-point exception +ISR_NOERRCODE 20 ; Virtualization exception +ISR_ERRCODE 21 ; Control-protection exception +; 22 - 27 are reserved +ISR_NOERRCODE 28 ; Hypervisor injection exception +ISR_ERRCODE 29 ; VMM communication exception +ISR_ERRCODE 30 ; Security exception +ISR_NOERRCODE 31 ; Reserved + +ISR_NOERRCODE 128 ; System call \ No newline at end of file diff --git a/NEW KERNEL/KHeap/src/isr.c b/NEW KERNEL/KHeap/src/isr.c index 81380af..ceb135b 100644 --- a/NEW KERNEL/KHeap/src/isr.c +++ b/NEW KERNEL/KHeap/src/isr.c @@ -70,12 +70,12 @@ void isr_irq_handler(REGISTERS *reg) { pic8259_eoi(reg->int_no); } -static void print_registers(REGISTERS *reg) { +void isr_print_registers(REGISTERS *reg) { printf("REGISTERS:\n"); printf("err_code=%d\n", reg->err_code); printf("eax=0x%x, ebx=0x%x, ecx=0x%x, edx=0x%x\n", reg->eax, reg->ebx, reg->ecx, reg->edx); printf("edi=0x%x, esi=0x%x, ebp=0x%x, esp=0x%x\n", reg->edi, reg->esi, reg->ebp, reg->esp); - printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->ss, reg->eflags, reg->useresp); + printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->cs, reg->ss, reg->eflags, reg->useresp); } /** @@ -85,7 +85,9 @@ static void print_registers(REGISTERS *reg) { void isr_exception_handler(REGISTERS reg) { if (reg.int_no < 32) { printf("EXCEPTION: %s\n", exception_messages[reg.int_no]); - print_registers(®); + isr_print_registers(®); + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); for (;;) ; } diff --git a/NEW KERNEL/Keyboard/src/asm/exception.asm b/NEW KERNEL/Keyboard/src/asm/exception.asm index dbfcab9..c149aef 100644 --- a/NEW KERNEL/Keyboard/src/asm/exception.asm +++ b/NEW KERNEL/Keyboard/src/asm/exception.asm @@ -1,39 +1,5 @@ section .text extern isr_exception_handler - global exception_0 - global exception_1 - global exception_2 - global exception_3 - global exception_4 - global exception_5 - global exception_6 - global exception_7 - global exception_8 - global exception_9 - global exception_10 - global exception_11 - global exception_12 - global exception_13 - global exception_14 - global exception_15 - global exception_16 - global exception_17 - global exception_18 - global exception_19 - global exception_20 - global exception_21 - global exception_22 - global exception_23 - global exception_24 - global exception_25 - global exception_26 - global exception_27 - global exception_28 - global exception_29 - global exception_30 - global exception_31 - global exception_128 - exception_handler: pusha ; push all registers @@ -61,196 +27,52 @@ exception_handler: iret -exception_0: - cli - push byte 0 ; store default err code(0) - push 0 ; push exception number index in IDT - jmp exception_handler - -exception_1: - cli - push byte 0 ; store default err code(0) - push 1 ; push exception number index in IDT - jmp exception_handler - -exception_2: - cli - push byte 0 ; store default err code(0) - push 2 ; push exception number index in IDT - jmp exception_handler - -exception_3: - cli - push byte 0 ; store default err code(0) - push 3 ; push exception number index in IDT - jmp exception_handler - -exception_4: - cli - push byte 0 ; store default err code(0) - push 4 ; push exception number index in IDT - jmp exception_handler - -exception_5: - cli - push byte 0 ; store default err code(0) - push 5 ; push exception number index in IDT - jmp exception_handler - -exception_6: - cli - push byte 0 ; store default err code(0) - push 6 ; push exception number index in IDT - jmp exception_handler - -exception_7: - cli - push byte 0 ; store default err code(0) - push 7 ; push exception number index in IDT - jmp exception_handler - -exception_8: - cli - push 8 ; push exception number index in IDT - jmp exception_handler - -exception_9: - cli - push byte 0 ; store default err code(0) - push 9 ; push exception number index in IDT - jmp exception_handler - -exception_10: - cli - push 10 ; push exception number index in IDT - jmp exception_handler - -exception_11: - cli - push 11 ; push exception number index in IDT - jmp exception_handler - -exception_12: - cli - push 12 ; push exception number index in IDT - jmp exception_handler - -exception_13: - cli - push 13 ; push exception number index in IDT - jmp exception_handler - -exception_14: - cli - push 14 ; push exception number index in IDT - jmp exception_handler - -exception_15: - cli - push byte 0 ; store default err code(0) - push 15 ; push exception number index in IDT - jmp exception_handler - -exception_16: - cli - push byte 0 ; store default err code(0) - push 16 ; push exception number index in IDT - jmp exception_handler - -exception_17: - cli - push byte 0 ; store default err code(0) - push 17 ; push exception number index in IDT - jmp exception_handler - -exception_18: - cli - push byte 0 ; store default err code(0) - push 18 ; push exception number index in IDT - jmp exception_handler - -exception_19: - cli - push byte 0 ; store default err code(0) - push 19 ; push exception number index in IDT - jmp exception_handler - -exception_20: - cli - push byte 0 ; store default err code(0) - push 20 ; push exception number index in IDT - jmp exception_handler - -exception_21: - cli - push byte 0 ; store default err code(0) - push 21 ; push exception number index in IDT - jmp exception_handler - -exception_22: - cli - push byte 0 ; store default err code(0) - push 22 ; push exception number index in IDT - jmp exception_handler - -exception_23: - cli - push byte 0 ; store default err code(0) - push 23 ; push exception number index in IDT - jmp exception_handler - -exception_24: - cli - push byte 0 ; store default err code(0) - push 24 ; push exception number index in IDT - jmp exception_handler - -exception_25: - cli - push byte 0 ; store default err code(0) - push 25 ; push exception number index in IDT - jmp exception_handler - -exception_26: - cli - push byte 0 ; store default err code(0) - push 26 ; push exception number index in IDT - jmp exception_handler - -exception_27: - cli - push byte 0 ; store default err code(0) - push 27 ; push exception number index in IDT - jmp exception_handler - -exception_28: - cli - push byte 0 ; store default err code(0) - push 28 ; push exception number index in IDT - jmp exception_handler - -exception_29: - cli - push byte 0 ; store default err code(0) - push 29 ; push exception number index in IDT - jmp exception_handler - -exception_30: - cli - push byte 0 ; store default err code(0) - push 30 ; push exception number index in IDT - jmp exception_handler - -exception_31: - cli - push byte 0 ; store default err code(0) - push 31 ; push exception number index in IDT - jmp exception_handler - -exception_128: - cli - push byte 0 ; store default err code(0) - push 128 ; push exception number index in IDT - jmp exception_handler - - +; Macro for interrupt service routines that do push an error code +%macro ISR_ERRCODE 1 +global exception_%1 +exception_%1: + ; We don't need to push a byte, the CPU did it for us + push %1 + jmp exception_handler +%endmacro + +; Macro for interrupt service routines that don't push an error code +%macro ISR_NOERRCODE 1 +global exception_%1 +exception_%1: + ; There is no error code + push byte 0 ; Push a default error code as REGISTERS expects it + push %1 ; Push the exception index + jmp exception_handler +%endmacro + + +ISR_NOERRCODE 0 ; Divison by zero exception +ISR_NOERRCODE 1 ; Debug exception +ISR_NOERRCODE 2 ; Non-maskable interrupt +ISR_NOERRCODE 3 ; INT3 breakpoint +ISR_NOERRCODE 4 ; Overflow exception +ISR_NOERRCODE 5 ; Bound exception +ISR_NOERRCODE 6 ; Invalid opcode +ISR_NOERRCODE 7 ; No FPU +ISR_ERRCODE 8 ; Double fault +ISR_NOERRCODE 9 ; Coprocessor segment overrun (reserved now) +ISR_ERRCODE 10 ; Invalid TSS +ISR_ERRCODE 11 ; Segment not present +ISR_ERRCODE 12 ; Stack segment exception +ISR_ERRCODE 13 ; General protection fault +ISR_ERRCODE 14 ; Page fault +ISR_NOERRCODE 15 ; Reserved exception +ISR_NOERRCODE 16 ; Floating-point exception +ISR_ERRCODE 17 ; Alignment check +ISR_NOERRCODE 18 ; Machine check +ISR_NOERRCODE 19 ; SIMD floating-point exception +ISR_NOERRCODE 20 ; Virtualization exception +ISR_ERRCODE 21 ; Control-protection exception +; 22 - 27 are reserved +ISR_NOERRCODE 28 ; Hypervisor injection exception +ISR_ERRCODE 29 ; VMM communication exception +ISR_ERRCODE 30 ; Security exception +ISR_NOERRCODE 31 ; Reserved + +ISR_NOERRCODE 128 ; System call \ No newline at end of file diff --git a/NEW KERNEL/Keyboard/src/isr.c b/NEW KERNEL/Keyboard/src/isr.c index 40e4953..ceb135b 100644 --- a/NEW KERNEL/Keyboard/src/isr.c +++ b/NEW KERNEL/Keyboard/src/isr.c @@ -70,12 +70,12 @@ void isr_irq_handler(REGISTERS *reg) { pic8259_eoi(reg->int_no); } -static void print_registers(REGISTERS *reg) { +void isr_print_registers(REGISTERS *reg) { printf("REGISTERS:\n"); printf("err_code=%d\n", reg->err_code); printf("eax=0x%x, ebx=0x%x, ecx=0x%x, edx=0x%x\n", reg->eax, reg->ebx, reg->ecx, reg->edx); printf("edi=0x%x, esi=0x%x, ebp=0x%x, esp=0x%x\n", reg->edi, reg->esi, reg->ebp, reg->esp); - printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->ss, reg->eflags, reg->useresp); + printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->cs, reg->ss, reg->eflags, reg->useresp); } /** @@ -85,7 +85,9 @@ static void print_registers(REGISTERS *reg) { void isr_exception_handler(REGISTERS reg) { if (reg.int_no < 32) { printf("EXCEPTION: %s\n", exception_messages[reg.int_no]); - print_registers(®); + isr_print_registers(®); + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); for (;;) ; } @@ -93,4 +95,4 @@ void isr_exception_handler(REGISTERS reg) { ISR handler = g_interrupt_handlers[reg.int_no]; handler(®); } -} +} \ No newline at end of file diff --git a/NEW KERNEL/Memory Info/src/asm/exception.asm b/NEW KERNEL/Memory Info/src/asm/exception.asm new file mode 100644 index 0000000..c149aef --- /dev/null +++ b/NEW KERNEL/Memory Info/src/asm/exception.asm @@ -0,0 +1,78 @@ +section .text + extern isr_exception_handler + +exception_handler: + pusha ; push all registers + mov ax, ds + push eax ; save ds + + mov ax, 0x10 ; load kernel data segment + mov ds, ax + mov es, ax + mov fs, ax + mov gs, ax + + call isr_exception_handler + + pop ebx ; restore kernel data segment + mov ds, bx + mov es, bx + mov fs, bx + mov gs, bx + + popa ; restore all registers + add esp, 0x8 ; restore stack for erro no been pushed + + sti ; re-enable interrupts + iret + + +; Macro for interrupt service routines that do push an error code +%macro ISR_ERRCODE 1 +global exception_%1 +exception_%1: + ; We don't need to push a byte, the CPU did it for us + push %1 + jmp exception_handler +%endmacro + +; Macro for interrupt service routines that don't push an error code +%macro ISR_NOERRCODE 1 +global exception_%1 +exception_%1: + ; There is no error code + push byte 0 ; Push a default error code as REGISTERS expects it + push %1 ; Push the exception index + jmp exception_handler +%endmacro + + +ISR_NOERRCODE 0 ; Divison by zero exception +ISR_NOERRCODE 1 ; Debug exception +ISR_NOERRCODE 2 ; Non-maskable interrupt +ISR_NOERRCODE 3 ; INT3 breakpoint +ISR_NOERRCODE 4 ; Overflow exception +ISR_NOERRCODE 5 ; Bound exception +ISR_NOERRCODE 6 ; Invalid opcode +ISR_NOERRCODE 7 ; No FPU +ISR_ERRCODE 8 ; Double fault +ISR_NOERRCODE 9 ; Coprocessor segment overrun (reserved now) +ISR_ERRCODE 10 ; Invalid TSS +ISR_ERRCODE 11 ; Segment not present +ISR_ERRCODE 12 ; Stack segment exception +ISR_ERRCODE 13 ; General protection fault +ISR_ERRCODE 14 ; Page fault +ISR_NOERRCODE 15 ; Reserved exception +ISR_NOERRCODE 16 ; Floating-point exception +ISR_ERRCODE 17 ; Alignment check +ISR_NOERRCODE 18 ; Machine check +ISR_NOERRCODE 19 ; SIMD floating-point exception +ISR_NOERRCODE 20 ; Virtualization exception +ISR_ERRCODE 21 ; Control-protection exception +; 22 - 27 are reserved +ISR_NOERRCODE 28 ; Hypervisor injection exception +ISR_ERRCODE 29 ; VMM communication exception +ISR_ERRCODE 30 ; Security exception +ISR_NOERRCODE 31 ; Reserved + +ISR_NOERRCODE 128 ; System call \ No newline at end of file diff --git a/NEW KERNEL/Memory Info/src/isr.c b/NEW KERNEL/Memory Info/src/isr.c new file mode 100644 index 0000000..ceb135b --- /dev/null +++ b/NEW KERNEL/Memory Info/src/isr.c @@ -0,0 +1,98 @@ +#include "isr.h" +#include "idt.h" +#include "8259_pic.h" +#include "console.h" + +// For both exceptions and irq interrupt +ISR g_interrupt_handlers[NO_INTERRUPT_HANDLERS]; + +// for more details, see Intel manual -> Interrupt & Exception Handling +char *exception_messages[32] = { + "Division By Zero", + "Debug", + "Non Maskable Interrupt", + "Breakpoint", + "Overflow", + "BOUND Range Exceeded", + "Invalid Opcode", + "Device Not Available (No Math Coprocessor)", + "Double Fault", + "Coprocessor Segment Overrun", + "Invalid TSS", + "Segment Not Present", + "Stack-Segment Fault", + "General Protection", + "Page Fault", + "Unknown Interrupt (intel reserved)", + "x87 FPU Floating-Point Error (Math Fault)", + "Alignment Check", + "Machine Check", + "SIMD Floating-Point Exception", + "Virtualization Exception", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved" +}; + +/** + * register given handler to interrupt handlers at given num + */ +void isr_register_interrupt_handler(int num, ISR handler) { + printf("IRQ %d registered\n", num); + if (num < NO_INTERRUPT_HANDLERS) + g_interrupt_handlers[num] = handler; +} + +/* + * turn off current interrupt +*/ +void isr_end_interrupt(int num) { + pic8259_eoi(num); +} + +/** + * invoke isr routine and send eoi to pic, + * being called in irq.asm + */ +void isr_irq_handler(REGISTERS *reg) { + if (g_interrupt_handlers[reg->int_no] != NULL) { + ISR handler = g_interrupt_handlers[reg->int_no]; + handler(reg); + } + pic8259_eoi(reg->int_no); +} + +void isr_print_registers(REGISTERS *reg) { + printf("REGISTERS:\n"); + printf("err_code=%d\n", reg->err_code); + printf("eax=0x%x, ebx=0x%x, ecx=0x%x, edx=0x%x\n", reg->eax, reg->ebx, reg->ecx, reg->edx); + printf("edi=0x%x, esi=0x%x, ebp=0x%x, esp=0x%x\n", reg->edi, reg->esi, reg->ebp, reg->esp); + printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->cs, reg->ss, reg->eflags, reg->useresp); +} + +/** + * invoke exception routine, + * being called in exception.asm + */ +void isr_exception_handler(REGISTERS reg) { + if (reg.int_no < 32) { + printf("EXCEPTION: %s\n", exception_messages[reg.int_no]); + isr_print_registers(®); + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); + for (;;) + ; + } + if (g_interrupt_handlers[reg.int_no] != NULL) { + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); + } +} \ No newline at end of file diff --git a/NEW KERNEL/Mouse/src/asm/exception.asm b/NEW KERNEL/Mouse/src/asm/exception.asm index dbfcab9..c149aef 100644 --- a/NEW KERNEL/Mouse/src/asm/exception.asm +++ b/NEW KERNEL/Mouse/src/asm/exception.asm @@ -1,39 +1,5 @@ section .text extern isr_exception_handler - global exception_0 - global exception_1 - global exception_2 - global exception_3 - global exception_4 - global exception_5 - global exception_6 - global exception_7 - global exception_8 - global exception_9 - global exception_10 - global exception_11 - global exception_12 - global exception_13 - global exception_14 - global exception_15 - global exception_16 - global exception_17 - global exception_18 - global exception_19 - global exception_20 - global exception_21 - global exception_22 - global exception_23 - global exception_24 - global exception_25 - global exception_26 - global exception_27 - global exception_28 - global exception_29 - global exception_30 - global exception_31 - global exception_128 - exception_handler: pusha ; push all registers @@ -61,196 +27,52 @@ exception_handler: iret -exception_0: - cli - push byte 0 ; store default err code(0) - push 0 ; push exception number index in IDT - jmp exception_handler - -exception_1: - cli - push byte 0 ; store default err code(0) - push 1 ; push exception number index in IDT - jmp exception_handler - -exception_2: - cli - push byte 0 ; store default err code(0) - push 2 ; push exception number index in IDT - jmp exception_handler - -exception_3: - cli - push byte 0 ; store default err code(0) - push 3 ; push exception number index in IDT - jmp exception_handler - -exception_4: - cli - push byte 0 ; store default err code(0) - push 4 ; push exception number index in IDT - jmp exception_handler - -exception_5: - cli - push byte 0 ; store default err code(0) - push 5 ; push exception number index in IDT - jmp exception_handler - -exception_6: - cli - push byte 0 ; store default err code(0) - push 6 ; push exception number index in IDT - jmp exception_handler - -exception_7: - cli - push byte 0 ; store default err code(0) - push 7 ; push exception number index in IDT - jmp exception_handler - -exception_8: - cli - push 8 ; push exception number index in IDT - jmp exception_handler - -exception_9: - cli - push byte 0 ; store default err code(0) - push 9 ; push exception number index in IDT - jmp exception_handler - -exception_10: - cli - push 10 ; push exception number index in IDT - jmp exception_handler - -exception_11: - cli - push 11 ; push exception number index in IDT - jmp exception_handler - -exception_12: - cli - push 12 ; push exception number index in IDT - jmp exception_handler - -exception_13: - cli - push 13 ; push exception number index in IDT - jmp exception_handler - -exception_14: - cli - push 14 ; push exception number index in IDT - jmp exception_handler - -exception_15: - cli - push byte 0 ; store default err code(0) - push 15 ; push exception number index in IDT - jmp exception_handler - -exception_16: - cli - push byte 0 ; store default err code(0) - push 16 ; push exception number index in IDT - jmp exception_handler - -exception_17: - cli - push byte 0 ; store default err code(0) - push 17 ; push exception number index in IDT - jmp exception_handler - -exception_18: - cli - push byte 0 ; store default err code(0) - push 18 ; push exception number index in IDT - jmp exception_handler - -exception_19: - cli - push byte 0 ; store default err code(0) - push 19 ; push exception number index in IDT - jmp exception_handler - -exception_20: - cli - push byte 0 ; store default err code(0) - push 20 ; push exception number index in IDT - jmp exception_handler - -exception_21: - cli - push byte 0 ; store default err code(0) - push 21 ; push exception number index in IDT - jmp exception_handler - -exception_22: - cli - push byte 0 ; store default err code(0) - push 22 ; push exception number index in IDT - jmp exception_handler - -exception_23: - cli - push byte 0 ; store default err code(0) - push 23 ; push exception number index in IDT - jmp exception_handler - -exception_24: - cli - push byte 0 ; store default err code(0) - push 24 ; push exception number index in IDT - jmp exception_handler - -exception_25: - cli - push byte 0 ; store default err code(0) - push 25 ; push exception number index in IDT - jmp exception_handler - -exception_26: - cli - push byte 0 ; store default err code(0) - push 26 ; push exception number index in IDT - jmp exception_handler - -exception_27: - cli - push byte 0 ; store default err code(0) - push 27 ; push exception number index in IDT - jmp exception_handler - -exception_28: - cli - push byte 0 ; store default err code(0) - push 28 ; push exception number index in IDT - jmp exception_handler - -exception_29: - cli - push byte 0 ; store default err code(0) - push 29 ; push exception number index in IDT - jmp exception_handler - -exception_30: - cli - push byte 0 ; store default err code(0) - push 30 ; push exception number index in IDT - jmp exception_handler - -exception_31: - cli - push byte 0 ; store default err code(0) - push 31 ; push exception number index in IDT - jmp exception_handler - -exception_128: - cli - push byte 0 ; store default err code(0) - push 128 ; push exception number index in IDT - jmp exception_handler - - +; Macro for interrupt service routines that do push an error code +%macro ISR_ERRCODE 1 +global exception_%1 +exception_%1: + ; We don't need to push a byte, the CPU did it for us + push %1 + jmp exception_handler +%endmacro + +; Macro for interrupt service routines that don't push an error code +%macro ISR_NOERRCODE 1 +global exception_%1 +exception_%1: + ; There is no error code + push byte 0 ; Push a default error code as REGISTERS expects it + push %1 ; Push the exception index + jmp exception_handler +%endmacro + + +ISR_NOERRCODE 0 ; Divison by zero exception +ISR_NOERRCODE 1 ; Debug exception +ISR_NOERRCODE 2 ; Non-maskable interrupt +ISR_NOERRCODE 3 ; INT3 breakpoint +ISR_NOERRCODE 4 ; Overflow exception +ISR_NOERRCODE 5 ; Bound exception +ISR_NOERRCODE 6 ; Invalid opcode +ISR_NOERRCODE 7 ; No FPU +ISR_ERRCODE 8 ; Double fault +ISR_NOERRCODE 9 ; Coprocessor segment overrun (reserved now) +ISR_ERRCODE 10 ; Invalid TSS +ISR_ERRCODE 11 ; Segment not present +ISR_ERRCODE 12 ; Stack segment exception +ISR_ERRCODE 13 ; General protection fault +ISR_ERRCODE 14 ; Page fault +ISR_NOERRCODE 15 ; Reserved exception +ISR_NOERRCODE 16 ; Floating-point exception +ISR_ERRCODE 17 ; Alignment check +ISR_NOERRCODE 18 ; Machine check +ISR_NOERRCODE 19 ; SIMD floating-point exception +ISR_NOERRCODE 20 ; Virtualization exception +ISR_ERRCODE 21 ; Control-protection exception +; 22 - 27 are reserved +ISR_NOERRCODE 28 ; Hypervisor injection exception +ISR_ERRCODE 29 ; VMM communication exception +ISR_ERRCODE 30 ; Security exception +ISR_NOERRCODE 31 ; Reserved + +ISR_NOERRCODE 128 ; System call \ No newline at end of file diff --git a/NEW KERNEL/Mouse/src/isr.c b/NEW KERNEL/Mouse/src/isr.c index 40e4953..ceb135b 100644 --- a/NEW KERNEL/Mouse/src/isr.c +++ b/NEW KERNEL/Mouse/src/isr.c @@ -70,12 +70,12 @@ void isr_irq_handler(REGISTERS *reg) { pic8259_eoi(reg->int_no); } -static void print_registers(REGISTERS *reg) { +void isr_print_registers(REGISTERS *reg) { printf("REGISTERS:\n"); printf("err_code=%d\n", reg->err_code); printf("eax=0x%x, ebx=0x%x, ecx=0x%x, edx=0x%x\n", reg->eax, reg->ebx, reg->ecx, reg->edx); printf("edi=0x%x, esi=0x%x, ebp=0x%x, esp=0x%x\n", reg->edi, reg->esi, reg->ebp, reg->esp); - printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->ss, reg->eflags, reg->useresp); + printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->cs, reg->ss, reg->eflags, reg->useresp); } /** @@ -85,7 +85,9 @@ static void print_registers(REGISTERS *reg) { void isr_exception_handler(REGISTERS reg) { if (reg.int_no < 32) { printf("EXCEPTION: %s\n", exception_messages[reg.int_no]); - print_registers(®); + isr_print_registers(®); + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); for (;;) ; } @@ -93,4 +95,4 @@ void isr_exception_handler(REGISTERS reg) { ISR handler = g_interrupt_handlers[reg.int_no]; handler(®); } -} +} \ No newline at end of file diff --git a/NEW KERNEL/Paging/obj/8259_pic.o b/NEW KERNEL/Paging/obj/8259_pic.o new file mode 100644 index 0000000..48494c4 Binary files /dev/null and b/NEW KERNEL/Paging/obj/8259_pic.o differ diff --git a/NEW KERNEL/Paging/obj/asm/entry.o b/NEW KERNEL/Paging/obj/asm/entry.o new file mode 100644 index 0000000..3bd90da Binary files /dev/null and b/NEW KERNEL/Paging/obj/asm/entry.o differ diff --git a/NEW KERNEL/Paging/obj/asm/exception.o b/NEW KERNEL/Paging/obj/asm/exception.o new file mode 100644 index 0000000..100e60b Binary files /dev/null and b/NEW KERNEL/Paging/obj/asm/exception.o differ diff --git a/NEW KERNEL/Paging/obj/asm/irq.o b/NEW KERNEL/Paging/obj/asm/irq.o new file mode 100644 index 0000000..9b538a1 Binary files /dev/null and b/NEW KERNEL/Paging/obj/asm/irq.o differ diff --git a/NEW KERNEL/Paging/obj/asm/load_gdt.o b/NEW KERNEL/Paging/obj/asm/load_gdt.o new file mode 100644 index 0000000..9ce39d1 Binary files /dev/null and b/NEW KERNEL/Paging/obj/asm/load_gdt.o differ diff --git a/NEW KERNEL/Paging/obj/asm/load_idt.o b/NEW KERNEL/Paging/obj/asm/load_idt.o new file mode 100644 index 0000000..b271413 Binary files /dev/null and b/NEW KERNEL/Paging/obj/asm/load_idt.o differ diff --git a/NEW KERNEL/Paging/obj/console.o b/NEW KERNEL/Paging/obj/console.o new file mode 100644 index 0000000..167dc77 Binary files /dev/null and b/NEW KERNEL/Paging/obj/console.o differ diff --git a/NEW KERNEL/Paging/obj/gdt.o b/NEW KERNEL/Paging/obj/gdt.o new file mode 100644 index 0000000..c69c595 Binary files /dev/null and b/NEW KERNEL/Paging/obj/gdt.o differ diff --git a/NEW KERNEL/Paging/obj/idt.o b/NEW KERNEL/Paging/obj/idt.o new file mode 100644 index 0000000..1fe811f Binary files /dev/null and b/NEW KERNEL/Paging/obj/idt.o differ diff --git a/NEW KERNEL/Paging/obj/io_ports.o b/NEW KERNEL/Paging/obj/io_ports.o new file mode 100644 index 0000000..b4f513d Binary files /dev/null and b/NEW KERNEL/Paging/obj/io_ports.o differ diff --git a/NEW KERNEL/Paging/obj/isr.o b/NEW KERNEL/Paging/obj/isr.o new file mode 100644 index 0000000..af6f3d6 Binary files /dev/null and b/NEW KERNEL/Paging/obj/isr.o differ diff --git a/NEW KERNEL/Paging/obj/kernel.o b/NEW KERNEL/Paging/obj/kernel.o new file mode 100644 index 0000000..c00142f Binary files /dev/null and b/NEW KERNEL/Paging/obj/kernel.o differ diff --git a/NEW KERNEL/Paging/obj/keyboard.o b/NEW KERNEL/Paging/obj/keyboard.o new file mode 100644 index 0000000..5cf3ae9 Binary files /dev/null and b/NEW KERNEL/Paging/obj/keyboard.o differ diff --git a/NEW KERNEL/Paging/obj/kheap.o b/NEW KERNEL/Paging/obj/kheap.o new file mode 100644 index 0000000..6e379db Binary files /dev/null and b/NEW KERNEL/Paging/obj/kheap.o differ diff --git a/NEW KERNEL/Paging/obj/paging.o b/NEW KERNEL/Paging/obj/paging.o new file mode 100644 index 0000000..91f33a8 Binary files /dev/null and b/NEW KERNEL/Paging/obj/paging.o differ diff --git a/NEW KERNEL/Paging/obj/pmm.o b/NEW KERNEL/Paging/obj/pmm.o new file mode 100644 index 0000000..272f0c4 Binary files /dev/null and b/NEW KERNEL/Paging/obj/pmm.o differ diff --git a/NEW KERNEL/Paging/obj/string.o b/NEW KERNEL/Paging/obj/string.o new file mode 100644 index 0000000..033b399 Binary files /dev/null and b/NEW KERNEL/Paging/obj/string.o differ diff --git a/NEW KERNEL/Paging/obj/vga.o b/NEW KERNEL/Paging/obj/vga.o new file mode 100644 index 0000000..a84cf7d Binary files /dev/null and b/NEW KERNEL/Paging/obj/vga.o differ diff --git a/NEW KERNEL/Paging/out/Paging.iso b/NEW KERNEL/Paging/out/Paging.iso new file mode 100644 index 0000000..e05cfaf Binary files /dev/null and b/NEW KERNEL/Paging/out/Paging.iso differ diff --git a/NEW KERNEL/Paging/out/isodir/boot/Paging.bin b/NEW KERNEL/Paging/out/isodir/boot/Paging.bin new file mode 100755 index 0000000..d9ba4c7 Binary files /dev/null and b/NEW KERNEL/Paging/out/isodir/boot/Paging.bin differ diff --git a/NEW KERNEL/Paging/out/isodir/boot/grub/grub.cfg b/NEW KERNEL/Paging/out/isodir/boot/grub/grub.cfg new file mode 100644 index 0000000..8c07c52 --- /dev/null +++ b/NEW KERNEL/Paging/out/isodir/boot/grub/grub.cfg @@ -0,0 +1,3 @@ +menuentry "Paging" { + multiboot /boot/Paging.bin +} diff --git a/NEW KERNEL/Paging/src/asm/exception.asm b/NEW KERNEL/Paging/src/asm/exception.asm index dbfcab9..c149aef 100644 --- a/NEW KERNEL/Paging/src/asm/exception.asm +++ b/NEW KERNEL/Paging/src/asm/exception.asm @@ -1,39 +1,5 @@ section .text extern isr_exception_handler - global exception_0 - global exception_1 - global exception_2 - global exception_3 - global exception_4 - global exception_5 - global exception_6 - global exception_7 - global exception_8 - global exception_9 - global exception_10 - global exception_11 - global exception_12 - global exception_13 - global exception_14 - global exception_15 - global exception_16 - global exception_17 - global exception_18 - global exception_19 - global exception_20 - global exception_21 - global exception_22 - global exception_23 - global exception_24 - global exception_25 - global exception_26 - global exception_27 - global exception_28 - global exception_29 - global exception_30 - global exception_31 - global exception_128 - exception_handler: pusha ; push all registers @@ -61,196 +27,52 @@ exception_handler: iret -exception_0: - cli - push byte 0 ; store default err code(0) - push 0 ; push exception number index in IDT - jmp exception_handler - -exception_1: - cli - push byte 0 ; store default err code(0) - push 1 ; push exception number index in IDT - jmp exception_handler - -exception_2: - cli - push byte 0 ; store default err code(0) - push 2 ; push exception number index in IDT - jmp exception_handler - -exception_3: - cli - push byte 0 ; store default err code(0) - push 3 ; push exception number index in IDT - jmp exception_handler - -exception_4: - cli - push byte 0 ; store default err code(0) - push 4 ; push exception number index in IDT - jmp exception_handler - -exception_5: - cli - push byte 0 ; store default err code(0) - push 5 ; push exception number index in IDT - jmp exception_handler - -exception_6: - cli - push byte 0 ; store default err code(0) - push 6 ; push exception number index in IDT - jmp exception_handler - -exception_7: - cli - push byte 0 ; store default err code(0) - push 7 ; push exception number index in IDT - jmp exception_handler - -exception_8: - cli - push 8 ; push exception number index in IDT - jmp exception_handler - -exception_9: - cli - push byte 0 ; store default err code(0) - push 9 ; push exception number index in IDT - jmp exception_handler - -exception_10: - cli - push 10 ; push exception number index in IDT - jmp exception_handler - -exception_11: - cli - push 11 ; push exception number index in IDT - jmp exception_handler - -exception_12: - cli - push 12 ; push exception number index in IDT - jmp exception_handler - -exception_13: - cli - push 13 ; push exception number index in IDT - jmp exception_handler - -exception_14: - cli - push 14 ; push exception number index in IDT - jmp exception_handler - -exception_15: - cli - push byte 0 ; store default err code(0) - push 15 ; push exception number index in IDT - jmp exception_handler - -exception_16: - cli - push byte 0 ; store default err code(0) - push 16 ; push exception number index in IDT - jmp exception_handler - -exception_17: - cli - push byte 0 ; store default err code(0) - push 17 ; push exception number index in IDT - jmp exception_handler - -exception_18: - cli - push byte 0 ; store default err code(0) - push 18 ; push exception number index in IDT - jmp exception_handler - -exception_19: - cli - push byte 0 ; store default err code(0) - push 19 ; push exception number index in IDT - jmp exception_handler - -exception_20: - cli - push byte 0 ; store default err code(0) - push 20 ; push exception number index in IDT - jmp exception_handler - -exception_21: - cli - push byte 0 ; store default err code(0) - push 21 ; push exception number index in IDT - jmp exception_handler - -exception_22: - cli - push byte 0 ; store default err code(0) - push 22 ; push exception number index in IDT - jmp exception_handler - -exception_23: - cli - push byte 0 ; store default err code(0) - push 23 ; push exception number index in IDT - jmp exception_handler - -exception_24: - cli - push byte 0 ; store default err code(0) - push 24 ; push exception number index in IDT - jmp exception_handler - -exception_25: - cli - push byte 0 ; store default err code(0) - push 25 ; push exception number index in IDT - jmp exception_handler - -exception_26: - cli - push byte 0 ; store default err code(0) - push 26 ; push exception number index in IDT - jmp exception_handler - -exception_27: - cli - push byte 0 ; store default err code(0) - push 27 ; push exception number index in IDT - jmp exception_handler - -exception_28: - cli - push byte 0 ; store default err code(0) - push 28 ; push exception number index in IDT - jmp exception_handler - -exception_29: - cli - push byte 0 ; store default err code(0) - push 29 ; push exception number index in IDT - jmp exception_handler - -exception_30: - cli - push byte 0 ; store default err code(0) - push 30 ; push exception number index in IDT - jmp exception_handler - -exception_31: - cli - push byte 0 ; store default err code(0) - push 31 ; push exception number index in IDT - jmp exception_handler - -exception_128: - cli - push byte 0 ; store default err code(0) - push 128 ; push exception number index in IDT - jmp exception_handler - - +; Macro for interrupt service routines that do push an error code +%macro ISR_ERRCODE 1 +global exception_%1 +exception_%1: + ; We don't need to push a byte, the CPU did it for us + push %1 + jmp exception_handler +%endmacro + +; Macro for interrupt service routines that don't push an error code +%macro ISR_NOERRCODE 1 +global exception_%1 +exception_%1: + ; There is no error code + push byte 0 ; Push a default error code as REGISTERS expects it + push %1 ; Push the exception index + jmp exception_handler +%endmacro + + +ISR_NOERRCODE 0 ; Divison by zero exception +ISR_NOERRCODE 1 ; Debug exception +ISR_NOERRCODE 2 ; Non-maskable interrupt +ISR_NOERRCODE 3 ; INT3 breakpoint +ISR_NOERRCODE 4 ; Overflow exception +ISR_NOERRCODE 5 ; Bound exception +ISR_NOERRCODE 6 ; Invalid opcode +ISR_NOERRCODE 7 ; No FPU +ISR_ERRCODE 8 ; Double fault +ISR_NOERRCODE 9 ; Coprocessor segment overrun (reserved now) +ISR_ERRCODE 10 ; Invalid TSS +ISR_ERRCODE 11 ; Segment not present +ISR_ERRCODE 12 ; Stack segment exception +ISR_ERRCODE 13 ; General protection fault +ISR_ERRCODE 14 ; Page fault +ISR_NOERRCODE 15 ; Reserved exception +ISR_NOERRCODE 16 ; Floating-point exception +ISR_ERRCODE 17 ; Alignment check +ISR_NOERRCODE 18 ; Machine check +ISR_NOERRCODE 19 ; SIMD floating-point exception +ISR_NOERRCODE 20 ; Virtualization exception +ISR_ERRCODE 21 ; Control-protection exception +; 22 - 27 are reserved +ISR_NOERRCODE 28 ; Hypervisor injection exception +ISR_ERRCODE 29 ; VMM communication exception +ISR_ERRCODE 30 ; Security exception +ISR_NOERRCODE 31 ; Reserved + +ISR_NOERRCODE 128 ; System call \ No newline at end of file diff --git a/NEW KERNEL/Paging/src/idt.c b/NEW KERNEL/Paging/src/idt.c index 9057653..1f697ee 100644 --- a/NEW KERNEL/Paging/src/idt.c +++ b/NEW KERNEL/Paging/src/idt.c @@ -49,12 +49,6 @@ void idt_init() { idt_set_entry(19, (uint32)exception_19, 0x08, 0x8E); idt_set_entry(20, (uint32)exception_20, 0x08, 0x8E); idt_set_entry(21, (uint32)exception_21, 0x08, 0x8E); - idt_set_entry(22, (uint32)exception_22, 0x08, 0x8E); - idt_set_entry(23, (uint32)exception_23, 0x08, 0x8E); - idt_set_entry(24, (uint32)exception_24, 0x08, 0x8E); - idt_set_entry(25, (uint32)exception_25, 0x08, 0x8E); - idt_set_entry(26, (uint32)exception_26, 0x08, 0x8E); - idt_set_entry(27, (uint32)exception_27, 0x08, 0x8E); idt_set_entry(28, (uint32)exception_28, 0x08, 0x8E); idt_set_entry(29, (uint32)exception_29, 0x08, 0x8E); idt_set_entry(30, (uint32)exception_30, 0x08, 0x8E); diff --git a/NEW KERNEL/Paging/src/isr.c b/NEW KERNEL/Paging/src/isr.c index 27b8e45..ceb135b 100644 --- a/NEW KERNEL/Paging/src/isr.c +++ b/NEW KERNEL/Paging/src/isr.c @@ -75,7 +75,7 @@ void isr_print_registers(REGISTERS *reg) { printf("err_code=%d\n", reg->err_code); printf("eax=0x%x, ebx=0x%x, ecx=0x%x, edx=0x%x\n", reg->eax, reg->ebx, reg->ecx, reg->edx); printf("edi=0x%x, esi=0x%x, ebp=0x%x, esp=0x%x\n", reg->edi, reg->esi, reg->ebp, reg->esp); - printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->ss, reg->eflags, reg->useresp); + printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->cs, reg->ss, reg->eflags, reg->useresp); } /** diff --git a/NEW KERNEL/Physical Memory Manager/src/asm/exception.asm b/NEW KERNEL/Physical Memory Manager/src/asm/exception.asm index dbfcab9..c149aef 100644 --- a/NEW KERNEL/Physical Memory Manager/src/asm/exception.asm +++ b/NEW KERNEL/Physical Memory Manager/src/asm/exception.asm @@ -1,39 +1,5 @@ section .text extern isr_exception_handler - global exception_0 - global exception_1 - global exception_2 - global exception_3 - global exception_4 - global exception_5 - global exception_6 - global exception_7 - global exception_8 - global exception_9 - global exception_10 - global exception_11 - global exception_12 - global exception_13 - global exception_14 - global exception_15 - global exception_16 - global exception_17 - global exception_18 - global exception_19 - global exception_20 - global exception_21 - global exception_22 - global exception_23 - global exception_24 - global exception_25 - global exception_26 - global exception_27 - global exception_28 - global exception_29 - global exception_30 - global exception_31 - global exception_128 - exception_handler: pusha ; push all registers @@ -61,196 +27,52 @@ exception_handler: iret -exception_0: - cli - push byte 0 ; store default err code(0) - push 0 ; push exception number index in IDT - jmp exception_handler - -exception_1: - cli - push byte 0 ; store default err code(0) - push 1 ; push exception number index in IDT - jmp exception_handler - -exception_2: - cli - push byte 0 ; store default err code(0) - push 2 ; push exception number index in IDT - jmp exception_handler - -exception_3: - cli - push byte 0 ; store default err code(0) - push 3 ; push exception number index in IDT - jmp exception_handler - -exception_4: - cli - push byte 0 ; store default err code(0) - push 4 ; push exception number index in IDT - jmp exception_handler - -exception_5: - cli - push byte 0 ; store default err code(0) - push 5 ; push exception number index in IDT - jmp exception_handler - -exception_6: - cli - push byte 0 ; store default err code(0) - push 6 ; push exception number index in IDT - jmp exception_handler - -exception_7: - cli - push byte 0 ; store default err code(0) - push 7 ; push exception number index in IDT - jmp exception_handler - -exception_8: - cli - push 8 ; push exception number index in IDT - jmp exception_handler - -exception_9: - cli - push byte 0 ; store default err code(0) - push 9 ; push exception number index in IDT - jmp exception_handler - -exception_10: - cli - push 10 ; push exception number index in IDT - jmp exception_handler - -exception_11: - cli - push 11 ; push exception number index in IDT - jmp exception_handler - -exception_12: - cli - push 12 ; push exception number index in IDT - jmp exception_handler - -exception_13: - cli - push 13 ; push exception number index in IDT - jmp exception_handler - -exception_14: - cli - push 14 ; push exception number index in IDT - jmp exception_handler - -exception_15: - cli - push byte 0 ; store default err code(0) - push 15 ; push exception number index in IDT - jmp exception_handler - -exception_16: - cli - push byte 0 ; store default err code(0) - push 16 ; push exception number index in IDT - jmp exception_handler - -exception_17: - cli - push byte 0 ; store default err code(0) - push 17 ; push exception number index in IDT - jmp exception_handler - -exception_18: - cli - push byte 0 ; store default err code(0) - push 18 ; push exception number index in IDT - jmp exception_handler - -exception_19: - cli - push byte 0 ; store default err code(0) - push 19 ; push exception number index in IDT - jmp exception_handler - -exception_20: - cli - push byte 0 ; store default err code(0) - push 20 ; push exception number index in IDT - jmp exception_handler - -exception_21: - cli - push byte 0 ; store default err code(0) - push 21 ; push exception number index in IDT - jmp exception_handler - -exception_22: - cli - push byte 0 ; store default err code(0) - push 22 ; push exception number index in IDT - jmp exception_handler - -exception_23: - cli - push byte 0 ; store default err code(0) - push 23 ; push exception number index in IDT - jmp exception_handler - -exception_24: - cli - push byte 0 ; store default err code(0) - push 24 ; push exception number index in IDT - jmp exception_handler - -exception_25: - cli - push byte 0 ; store default err code(0) - push 25 ; push exception number index in IDT - jmp exception_handler - -exception_26: - cli - push byte 0 ; store default err code(0) - push 26 ; push exception number index in IDT - jmp exception_handler - -exception_27: - cli - push byte 0 ; store default err code(0) - push 27 ; push exception number index in IDT - jmp exception_handler - -exception_28: - cli - push byte 0 ; store default err code(0) - push 28 ; push exception number index in IDT - jmp exception_handler - -exception_29: - cli - push byte 0 ; store default err code(0) - push 29 ; push exception number index in IDT - jmp exception_handler - -exception_30: - cli - push byte 0 ; store default err code(0) - push 30 ; push exception number index in IDT - jmp exception_handler - -exception_31: - cli - push byte 0 ; store default err code(0) - push 31 ; push exception number index in IDT - jmp exception_handler - -exception_128: - cli - push byte 0 ; store default err code(0) - push 128 ; push exception number index in IDT - jmp exception_handler - - +; Macro for interrupt service routines that do push an error code +%macro ISR_ERRCODE 1 +global exception_%1 +exception_%1: + ; We don't need to push a byte, the CPU did it for us + push %1 + jmp exception_handler +%endmacro + +; Macro for interrupt service routines that don't push an error code +%macro ISR_NOERRCODE 1 +global exception_%1 +exception_%1: + ; There is no error code + push byte 0 ; Push a default error code as REGISTERS expects it + push %1 ; Push the exception index + jmp exception_handler +%endmacro + + +ISR_NOERRCODE 0 ; Divison by zero exception +ISR_NOERRCODE 1 ; Debug exception +ISR_NOERRCODE 2 ; Non-maskable interrupt +ISR_NOERRCODE 3 ; INT3 breakpoint +ISR_NOERRCODE 4 ; Overflow exception +ISR_NOERRCODE 5 ; Bound exception +ISR_NOERRCODE 6 ; Invalid opcode +ISR_NOERRCODE 7 ; No FPU +ISR_ERRCODE 8 ; Double fault +ISR_NOERRCODE 9 ; Coprocessor segment overrun (reserved now) +ISR_ERRCODE 10 ; Invalid TSS +ISR_ERRCODE 11 ; Segment not present +ISR_ERRCODE 12 ; Stack segment exception +ISR_ERRCODE 13 ; General protection fault +ISR_ERRCODE 14 ; Page fault +ISR_NOERRCODE 15 ; Reserved exception +ISR_NOERRCODE 16 ; Floating-point exception +ISR_ERRCODE 17 ; Alignment check +ISR_NOERRCODE 18 ; Machine check +ISR_NOERRCODE 19 ; SIMD floating-point exception +ISR_NOERRCODE 20 ; Virtualization exception +ISR_ERRCODE 21 ; Control-protection exception +; 22 - 27 are reserved +ISR_NOERRCODE 28 ; Hypervisor injection exception +ISR_ERRCODE 29 ; VMM communication exception +ISR_ERRCODE 30 ; Security exception +ISR_NOERRCODE 31 ; Reserved + +ISR_NOERRCODE 128 ; System call \ No newline at end of file diff --git a/NEW KERNEL/Physical Memory Manager/src/isr.c b/NEW KERNEL/Physical Memory Manager/src/isr.c index 81380af..ceb135b 100644 --- a/NEW KERNEL/Physical Memory Manager/src/isr.c +++ b/NEW KERNEL/Physical Memory Manager/src/isr.c @@ -70,12 +70,12 @@ void isr_irq_handler(REGISTERS *reg) { pic8259_eoi(reg->int_no); } -static void print_registers(REGISTERS *reg) { +void isr_print_registers(REGISTERS *reg) { printf("REGISTERS:\n"); printf("err_code=%d\n", reg->err_code); printf("eax=0x%x, ebx=0x%x, ecx=0x%x, edx=0x%x\n", reg->eax, reg->ebx, reg->ecx, reg->edx); printf("edi=0x%x, esi=0x%x, ebp=0x%x, esp=0x%x\n", reg->edi, reg->esi, reg->ebp, reg->esp); - printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->ss, reg->eflags, reg->useresp); + printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->cs, reg->ss, reg->eflags, reg->useresp); } /** @@ -85,7 +85,9 @@ static void print_registers(REGISTERS *reg) { void isr_exception_handler(REGISTERS reg) { if (reg.int_no < 32) { printf("EXCEPTION: %s\n", exception_messages[reg.int_no]); - print_registers(®); + isr_print_registers(®); + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); for (;;) ; } diff --git a/NEW KERNEL/TSS/obj/asm/entry.o b/NEW KERNEL/TSS/obj/asm/entry.o new file mode 100644 index 0000000..6b0380f Binary files /dev/null and b/NEW KERNEL/TSS/obj/asm/entry.o differ diff --git a/NEW KERNEL/TSS/obj/asm/load_gdt.o b/NEW KERNEL/TSS/obj/asm/load_gdt.o new file mode 100644 index 0000000..9ce39d1 Binary files /dev/null and b/NEW KERNEL/TSS/obj/asm/load_gdt.o differ diff --git a/NEW KERNEL/TSS/obj/asm/load_tss.o b/NEW KERNEL/TSS/obj/asm/load_tss.o new file mode 100644 index 0000000..8093226 Binary files /dev/null and b/NEW KERNEL/TSS/obj/asm/load_tss.o differ diff --git a/NEW KERNEL/TSS/obj/console.o b/NEW KERNEL/TSS/obj/console.o new file mode 100644 index 0000000..ac77bb6 Binary files /dev/null and b/NEW KERNEL/TSS/obj/console.o differ diff --git a/NEW KERNEL/TSS/obj/gdt.o b/NEW KERNEL/TSS/obj/gdt.o new file mode 100644 index 0000000..c69c595 Binary files /dev/null and b/NEW KERNEL/TSS/obj/gdt.o differ diff --git a/NEW KERNEL/TSS/obj/io_ports.o b/NEW KERNEL/TSS/obj/io_ports.o new file mode 100644 index 0000000..b4f513d Binary files /dev/null and b/NEW KERNEL/TSS/obj/io_ports.o differ diff --git a/NEW KERNEL/TSS/obj/kernel.o b/NEW KERNEL/TSS/obj/kernel.o new file mode 100644 index 0000000..55fe294 Binary files /dev/null and b/NEW KERNEL/TSS/obj/kernel.o differ diff --git a/NEW KERNEL/TSS/obj/string.o b/NEW KERNEL/TSS/obj/string.o new file mode 100644 index 0000000..c48f271 Binary files /dev/null and b/NEW KERNEL/TSS/obj/string.o differ diff --git a/NEW KERNEL/TSS/obj/tss.o b/NEW KERNEL/TSS/obj/tss.o new file mode 100644 index 0000000..5dcd9b3 Binary files /dev/null and b/NEW KERNEL/TSS/obj/tss.o differ diff --git a/NEW KERNEL/TSS/obj/vga.o b/NEW KERNEL/TSS/obj/vga.o new file mode 100644 index 0000000..a84cf7d Binary files /dev/null and b/NEW KERNEL/TSS/obj/vga.o differ diff --git a/NEW KERNEL/TSS/out/TSS.iso b/NEW KERNEL/TSS/out/TSS.iso new file mode 100644 index 0000000..3987841 Binary files /dev/null and b/NEW KERNEL/TSS/out/TSS.iso differ diff --git a/NEW KERNEL/TSS/out/isodir/boot/TSS.bin b/NEW KERNEL/TSS/out/isodir/boot/TSS.bin new file mode 100755 index 0000000..8341c1f Binary files /dev/null and b/NEW KERNEL/TSS/out/isodir/boot/TSS.bin differ diff --git a/NEW KERNEL/TSS/out/isodir/boot/grub/grub.cfg b/NEW KERNEL/TSS/out/isodir/boot/grub/grub.cfg new file mode 100644 index 0000000..263aeb1 --- /dev/null +++ b/NEW KERNEL/TSS/out/isodir/boot/grub/grub.cfg @@ -0,0 +1,3 @@ +menuentry "TSS" { + multiboot /boot/TSS.bin +} diff --git a/NEW KERNEL/TSS/src/asm/exception.asm b/NEW KERNEL/TSS/src/asm/exception.asm new file mode 100644 index 0000000..c149aef --- /dev/null +++ b/NEW KERNEL/TSS/src/asm/exception.asm @@ -0,0 +1,78 @@ +section .text + extern isr_exception_handler + +exception_handler: + pusha ; push all registers + mov ax, ds + push eax ; save ds + + mov ax, 0x10 ; load kernel data segment + mov ds, ax + mov es, ax + mov fs, ax + mov gs, ax + + call isr_exception_handler + + pop ebx ; restore kernel data segment + mov ds, bx + mov es, bx + mov fs, bx + mov gs, bx + + popa ; restore all registers + add esp, 0x8 ; restore stack for erro no been pushed + + sti ; re-enable interrupts + iret + + +; Macro for interrupt service routines that do push an error code +%macro ISR_ERRCODE 1 +global exception_%1 +exception_%1: + ; We don't need to push a byte, the CPU did it for us + push %1 + jmp exception_handler +%endmacro + +; Macro for interrupt service routines that don't push an error code +%macro ISR_NOERRCODE 1 +global exception_%1 +exception_%1: + ; There is no error code + push byte 0 ; Push a default error code as REGISTERS expects it + push %1 ; Push the exception index + jmp exception_handler +%endmacro + + +ISR_NOERRCODE 0 ; Divison by zero exception +ISR_NOERRCODE 1 ; Debug exception +ISR_NOERRCODE 2 ; Non-maskable interrupt +ISR_NOERRCODE 3 ; INT3 breakpoint +ISR_NOERRCODE 4 ; Overflow exception +ISR_NOERRCODE 5 ; Bound exception +ISR_NOERRCODE 6 ; Invalid opcode +ISR_NOERRCODE 7 ; No FPU +ISR_ERRCODE 8 ; Double fault +ISR_NOERRCODE 9 ; Coprocessor segment overrun (reserved now) +ISR_ERRCODE 10 ; Invalid TSS +ISR_ERRCODE 11 ; Segment not present +ISR_ERRCODE 12 ; Stack segment exception +ISR_ERRCODE 13 ; General protection fault +ISR_ERRCODE 14 ; Page fault +ISR_NOERRCODE 15 ; Reserved exception +ISR_NOERRCODE 16 ; Floating-point exception +ISR_ERRCODE 17 ; Alignment check +ISR_NOERRCODE 18 ; Machine check +ISR_NOERRCODE 19 ; SIMD floating-point exception +ISR_NOERRCODE 20 ; Virtualization exception +ISR_ERRCODE 21 ; Control-protection exception +; 22 - 27 are reserved +ISR_NOERRCODE 28 ; Hypervisor injection exception +ISR_ERRCODE 29 ; VMM communication exception +ISR_ERRCODE 30 ; Security exception +ISR_NOERRCODE 31 ; Reserved + +ISR_NOERRCODE 128 ; System call \ No newline at end of file diff --git a/NEW KERNEL/TSS/src/isr.c b/NEW KERNEL/TSS/src/isr.c new file mode 100644 index 0000000..ceb135b --- /dev/null +++ b/NEW KERNEL/TSS/src/isr.c @@ -0,0 +1,98 @@ +#include "isr.h" +#include "idt.h" +#include "8259_pic.h" +#include "console.h" + +// For both exceptions and irq interrupt +ISR g_interrupt_handlers[NO_INTERRUPT_HANDLERS]; + +// for more details, see Intel manual -> Interrupt & Exception Handling +char *exception_messages[32] = { + "Division By Zero", + "Debug", + "Non Maskable Interrupt", + "Breakpoint", + "Overflow", + "BOUND Range Exceeded", + "Invalid Opcode", + "Device Not Available (No Math Coprocessor)", + "Double Fault", + "Coprocessor Segment Overrun", + "Invalid TSS", + "Segment Not Present", + "Stack-Segment Fault", + "General Protection", + "Page Fault", + "Unknown Interrupt (intel reserved)", + "x87 FPU Floating-Point Error (Math Fault)", + "Alignment Check", + "Machine Check", + "SIMD Floating-Point Exception", + "Virtualization Exception", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved", + "Reserved" +}; + +/** + * register given handler to interrupt handlers at given num + */ +void isr_register_interrupt_handler(int num, ISR handler) { + printf("IRQ %d registered\n", num); + if (num < NO_INTERRUPT_HANDLERS) + g_interrupt_handlers[num] = handler; +} + +/* + * turn off current interrupt +*/ +void isr_end_interrupt(int num) { + pic8259_eoi(num); +} + +/** + * invoke isr routine and send eoi to pic, + * being called in irq.asm + */ +void isr_irq_handler(REGISTERS *reg) { + if (g_interrupt_handlers[reg->int_no] != NULL) { + ISR handler = g_interrupt_handlers[reg->int_no]; + handler(reg); + } + pic8259_eoi(reg->int_no); +} + +void isr_print_registers(REGISTERS *reg) { + printf("REGISTERS:\n"); + printf("err_code=%d\n", reg->err_code); + printf("eax=0x%x, ebx=0x%x, ecx=0x%x, edx=0x%x\n", reg->eax, reg->ebx, reg->ecx, reg->edx); + printf("edi=0x%x, esi=0x%x, ebp=0x%x, esp=0x%x\n", reg->edi, reg->esi, reg->ebp, reg->esp); + printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->cs, reg->ss, reg->eflags, reg->useresp); +} + +/** + * invoke exception routine, + * being called in exception.asm + */ +void isr_exception_handler(REGISTERS reg) { + if (reg.int_no < 32) { + printf("EXCEPTION: %s\n", exception_messages[reg.int_no]); + isr_print_registers(®); + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); + for (;;) + ; + } + if (g_interrupt_handlers[reg.int_no] != NULL) { + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); + } +} \ No newline at end of file diff --git a/NEW KERNEL/Terminal/src/asm/exception.asm b/NEW KERNEL/Terminal/src/asm/exception.asm index dbfcab9..c149aef 100644 --- a/NEW KERNEL/Terminal/src/asm/exception.asm +++ b/NEW KERNEL/Terminal/src/asm/exception.asm @@ -1,39 +1,5 @@ section .text extern isr_exception_handler - global exception_0 - global exception_1 - global exception_2 - global exception_3 - global exception_4 - global exception_5 - global exception_6 - global exception_7 - global exception_8 - global exception_9 - global exception_10 - global exception_11 - global exception_12 - global exception_13 - global exception_14 - global exception_15 - global exception_16 - global exception_17 - global exception_18 - global exception_19 - global exception_20 - global exception_21 - global exception_22 - global exception_23 - global exception_24 - global exception_25 - global exception_26 - global exception_27 - global exception_28 - global exception_29 - global exception_30 - global exception_31 - global exception_128 - exception_handler: pusha ; push all registers @@ -61,196 +27,52 @@ exception_handler: iret -exception_0: - cli - push byte 0 ; store default err code(0) - push 0 ; push exception number index in IDT - jmp exception_handler - -exception_1: - cli - push byte 0 ; store default err code(0) - push 1 ; push exception number index in IDT - jmp exception_handler - -exception_2: - cli - push byte 0 ; store default err code(0) - push 2 ; push exception number index in IDT - jmp exception_handler - -exception_3: - cli - push byte 0 ; store default err code(0) - push 3 ; push exception number index in IDT - jmp exception_handler - -exception_4: - cli - push byte 0 ; store default err code(0) - push 4 ; push exception number index in IDT - jmp exception_handler - -exception_5: - cli - push byte 0 ; store default err code(0) - push 5 ; push exception number index in IDT - jmp exception_handler - -exception_6: - cli - push byte 0 ; store default err code(0) - push 6 ; push exception number index in IDT - jmp exception_handler - -exception_7: - cli - push byte 0 ; store default err code(0) - push 7 ; push exception number index in IDT - jmp exception_handler - -exception_8: - cli - push 8 ; push exception number index in IDT - jmp exception_handler - -exception_9: - cli - push byte 0 ; store default err code(0) - push 9 ; push exception number index in IDT - jmp exception_handler - -exception_10: - cli - push 10 ; push exception number index in IDT - jmp exception_handler - -exception_11: - cli - push 11 ; push exception number index in IDT - jmp exception_handler - -exception_12: - cli - push 12 ; push exception number index in IDT - jmp exception_handler - -exception_13: - cli - push 13 ; push exception number index in IDT - jmp exception_handler - -exception_14: - cli - push 14 ; push exception number index in IDT - jmp exception_handler - -exception_15: - cli - push byte 0 ; store default err code(0) - push 15 ; push exception number index in IDT - jmp exception_handler - -exception_16: - cli - push byte 0 ; store default err code(0) - push 16 ; push exception number index in IDT - jmp exception_handler - -exception_17: - cli - push byte 0 ; store default err code(0) - push 17 ; push exception number index in IDT - jmp exception_handler - -exception_18: - cli - push byte 0 ; store default err code(0) - push 18 ; push exception number index in IDT - jmp exception_handler - -exception_19: - cli - push byte 0 ; store default err code(0) - push 19 ; push exception number index in IDT - jmp exception_handler - -exception_20: - cli - push byte 0 ; store default err code(0) - push 20 ; push exception number index in IDT - jmp exception_handler - -exception_21: - cli - push byte 0 ; store default err code(0) - push 21 ; push exception number index in IDT - jmp exception_handler - -exception_22: - cli - push byte 0 ; store default err code(0) - push 22 ; push exception number index in IDT - jmp exception_handler - -exception_23: - cli - push byte 0 ; store default err code(0) - push 23 ; push exception number index in IDT - jmp exception_handler - -exception_24: - cli - push byte 0 ; store default err code(0) - push 24 ; push exception number index in IDT - jmp exception_handler - -exception_25: - cli - push byte 0 ; store default err code(0) - push 25 ; push exception number index in IDT - jmp exception_handler - -exception_26: - cli - push byte 0 ; store default err code(0) - push 26 ; push exception number index in IDT - jmp exception_handler - -exception_27: - cli - push byte 0 ; store default err code(0) - push 27 ; push exception number index in IDT - jmp exception_handler - -exception_28: - cli - push byte 0 ; store default err code(0) - push 28 ; push exception number index in IDT - jmp exception_handler - -exception_29: - cli - push byte 0 ; store default err code(0) - push 29 ; push exception number index in IDT - jmp exception_handler - -exception_30: - cli - push byte 0 ; store default err code(0) - push 30 ; push exception number index in IDT - jmp exception_handler - -exception_31: - cli - push byte 0 ; store default err code(0) - push 31 ; push exception number index in IDT - jmp exception_handler - -exception_128: - cli - push byte 0 ; store default err code(0) - push 128 ; push exception number index in IDT - jmp exception_handler - - +; Macro for interrupt service routines that do push an error code +%macro ISR_ERRCODE 1 +global exception_%1 +exception_%1: + ; We don't need to push a byte, the CPU did it for us + push %1 + jmp exception_handler +%endmacro + +; Macro for interrupt service routines that don't push an error code +%macro ISR_NOERRCODE 1 +global exception_%1 +exception_%1: + ; There is no error code + push byte 0 ; Push a default error code as REGISTERS expects it + push %1 ; Push the exception index + jmp exception_handler +%endmacro + + +ISR_NOERRCODE 0 ; Divison by zero exception +ISR_NOERRCODE 1 ; Debug exception +ISR_NOERRCODE 2 ; Non-maskable interrupt +ISR_NOERRCODE 3 ; INT3 breakpoint +ISR_NOERRCODE 4 ; Overflow exception +ISR_NOERRCODE 5 ; Bound exception +ISR_NOERRCODE 6 ; Invalid opcode +ISR_NOERRCODE 7 ; No FPU +ISR_ERRCODE 8 ; Double fault +ISR_NOERRCODE 9 ; Coprocessor segment overrun (reserved now) +ISR_ERRCODE 10 ; Invalid TSS +ISR_ERRCODE 11 ; Segment not present +ISR_ERRCODE 12 ; Stack segment exception +ISR_ERRCODE 13 ; General protection fault +ISR_ERRCODE 14 ; Page fault +ISR_NOERRCODE 15 ; Reserved exception +ISR_NOERRCODE 16 ; Floating-point exception +ISR_ERRCODE 17 ; Alignment check +ISR_NOERRCODE 18 ; Machine check +ISR_NOERRCODE 19 ; SIMD floating-point exception +ISR_NOERRCODE 20 ; Virtualization exception +ISR_ERRCODE 21 ; Control-protection exception +; 22 - 27 are reserved +ISR_NOERRCODE 28 ; Hypervisor injection exception +ISR_ERRCODE 29 ; VMM communication exception +ISR_ERRCODE 30 ; Security exception +ISR_NOERRCODE 31 ; Reserved + +ISR_NOERRCODE 128 ; System call \ No newline at end of file diff --git a/NEW KERNEL/Terminal/src/isr.c b/NEW KERNEL/Terminal/src/isr.c index 81380af..ceb135b 100644 --- a/NEW KERNEL/Terminal/src/isr.c +++ b/NEW KERNEL/Terminal/src/isr.c @@ -70,12 +70,12 @@ void isr_irq_handler(REGISTERS *reg) { pic8259_eoi(reg->int_no); } -static void print_registers(REGISTERS *reg) { +void isr_print_registers(REGISTERS *reg) { printf("REGISTERS:\n"); printf("err_code=%d\n", reg->err_code); printf("eax=0x%x, ebx=0x%x, ecx=0x%x, edx=0x%x\n", reg->eax, reg->ebx, reg->ecx, reg->edx); printf("edi=0x%x, esi=0x%x, ebp=0x%x, esp=0x%x\n", reg->edi, reg->esi, reg->ebp, reg->esp); - printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->ss, reg->eflags, reg->useresp); + printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->cs, reg->ss, reg->eflags, reg->useresp); } /** @@ -85,7 +85,9 @@ static void print_registers(REGISTERS *reg) { void isr_exception_handler(REGISTERS reg) { if (reg.int_no < 32) { printf("EXCEPTION: %s\n", exception_messages[reg.int_no]); - print_registers(®); + isr_print_registers(®); + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); for (;;) ; } diff --git a/NEW KERNEL/Timer/src/asm/exception.asm b/NEW KERNEL/Timer/src/asm/exception.asm index dbfcab9..c149aef 100644 --- a/NEW KERNEL/Timer/src/asm/exception.asm +++ b/NEW KERNEL/Timer/src/asm/exception.asm @@ -1,39 +1,5 @@ section .text extern isr_exception_handler - global exception_0 - global exception_1 - global exception_2 - global exception_3 - global exception_4 - global exception_5 - global exception_6 - global exception_7 - global exception_8 - global exception_9 - global exception_10 - global exception_11 - global exception_12 - global exception_13 - global exception_14 - global exception_15 - global exception_16 - global exception_17 - global exception_18 - global exception_19 - global exception_20 - global exception_21 - global exception_22 - global exception_23 - global exception_24 - global exception_25 - global exception_26 - global exception_27 - global exception_28 - global exception_29 - global exception_30 - global exception_31 - global exception_128 - exception_handler: pusha ; push all registers @@ -61,196 +27,52 @@ exception_handler: iret -exception_0: - cli - push byte 0 ; store default err code(0) - push 0 ; push exception number index in IDT - jmp exception_handler - -exception_1: - cli - push byte 0 ; store default err code(0) - push 1 ; push exception number index in IDT - jmp exception_handler - -exception_2: - cli - push byte 0 ; store default err code(0) - push 2 ; push exception number index in IDT - jmp exception_handler - -exception_3: - cli - push byte 0 ; store default err code(0) - push 3 ; push exception number index in IDT - jmp exception_handler - -exception_4: - cli - push byte 0 ; store default err code(0) - push 4 ; push exception number index in IDT - jmp exception_handler - -exception_5: - cli - push byte 0 ; store default err code(0) - push 5 ; push exception number index in IDT - jmp exception_handler - -exception_6: - cli - push byte 0 ; store default err code(0) - push 6 ; push exception number index in IDT - jmp exception_handler - -exception_7: - cli - push byte 0 ; store default err code(0) - push 7 ; push exception number index in IDT - jmp exception_handler - -exception_8: - cli - push 8 ; push exception number index in IDT - jmp exception_handler - -exception_9: - cli - push byte 0 ; store default err code(0) - push 9 ; push exception number index in IDT - jmp exception_handler - -exception_10: - cli - push 10 ; push exception number index in IDT - jmp exception_handler - -exception_11: - cli - push 11 ; push exception number index in IDT - jmp exception_handler - -exception_12: - cli - push 12 ; push exception number index in IDT - jmp exception_handler - -exception_13: - cli - push 13 ; push exception number index in IDT - jmp exception_handler - -exception_14: - cli - push 14 ; push exception number index in IDT - jmp exception_handler - -exception_15: - cli - push byte 0 ; store default err code(0) - push 15 ; push exception number index in IDT - jmp exception_handler - -exception_16: - cli - push byte 0 ; store default err code(0) - push 16 ; push exception number index in IDT - jmp exception_handler - -exception_17: - cli - push byte 0 ; store default err code(0) - push 17 ; push exception number index in IDT - jmp exception_handler - -exception_18: - cli - push byte 0 ; store default err code(0) - push 18 ; push exception number index in IDT - jmp exception_handler - -exception_19: - cli - push byte 0 ; store default err code(0) - push 19 ; push exception number index in IDT - jmp exception_handler - -exception_20: - cli - push byte 0 ; store default err code(0) - push 20 ; push exception number index in IDT - jmp exception_handler - -exception_21: - cli - push byte 0 ; store default err code(0) - push 21 ; push exception number index in IDT - jmp exception_handler - -exception_22: - cli - push byte 0 ; store default err code(0) - push 22 ; push exception number index in IDT - jmp exception_handler - -exception_23: - cli - push byte 0 ; store default err code(0) - push 23 ; push exception number index in IDT - jmp exception_handler - -exception_24: - cli - push byte 0 ; store default err code(0) - push 24 ; push exception number index in IDT - jmp exception_handler - -exception_25: - cli - push byte 0 ; store default err code(0) - push 25 ; push exception number index in IDT - jmp exception_handler - -exception_26: - cli - push byte 0 ; store default err code(0) - push 26 ; push exception number index in IDT - jmp exception_handler - -exception_27: - cli - push byte 0 ; store default err code(0) - push 27 ; push exception number index in IDT - jmp exception_handler - -exception_28: - cli - push byte 0 ; store default err code(0) - push 28 ; push exception number index in IDT - jmp exception_handler - -exception_29: - cli - push byte 0 ; store default err code(0) - push 29 ; push exception number index in IDT - jmp exception_handler - -exception_30: - cli - push byte 0 ; store default err code(0) - push 30 ; push exception number index in IDT - jmp exception_handler - -exception_31: - cli - push byte 0 ; store default err code(0) - push 31 ; push exception number index in IDT - jmp exception_handler - -exception_128: - cli - push byte 0 ; store default err code(0) - push 128 ; push exception number index in IDT - jmp exception_handler - - +; Macro for interrupt service routines that do push an error code +%macro ISR_ERRCODE 1 +global exception_%1 +exception_%1: + ; We don't need to push a byte, the CPU did it for us + push %1 + jmp exception_handler +%endmacro + +; Macro for interrupt service routines that don't push an error code +%macro ISR_NOERRCODE 1 +global exception_%1 +exception_%1: + ; There is no error code + push byte 0 ; Push a default error code as REGISTERS expects it + push %1 ; Push the exception index + jmp exception_handler +%endmacro + + +ISR_NOERRCODE 0 ; Divison by zero exception +ISR_NOERRCODE 1 ; Debug exception +ISR_NOERRCODE 2 ; Non-maskable interrupt +ISR_NOERRCODE 3 ; INT3 breakpoint +ISR_NOERRCODE 4 ; Overflow exception +ISR_NOERRCODE 5 ; Bound exception +ISR_NOERRCODE 6 ; Invalid opcode +ISR_NOERRCODE 7 ; No FPU +ISR_ERRCODE 8 ; Double fault +ISR_NOERRCODE 9 ; Coprocessor segment overrun (reserved now) +ISR_ERRCODE 10 ; Invalid TSS +ISR_ERRCODE 11 ; Segment not present +ISR_ERRCODE 12 ; Stack segment exception +ISR_ERRCODE 13 ; General protection fault +ISR_ERRCODE 14 ; Page fault +ISR_NOERRCODE 15 ; Reserved exception +ISR_NOERRCODE 16 ; Floating-point exception +ISR_ERRCODE 17 ; Alignment check +ISR_NOERRCODE 18 ; Machine check +ISR_NOERRCODE 19 ; SIMD floating-point exception +ISR_NOERRCODE 20 ; Virtualization exception +ISR_ERRCODE 21 ; Control-protection exception +; 22 - 27 are reserved +ISR_NOERRCODE 28 ; Hypervisor injection exception +ISR_ERRCODE 29 ; VMM communication exception +ISR_ERRCODE 30 ; Security exception +ISR_NOERRCODE 31 ; Reserved + +ISR_NOERRCODE 128 ; System call \ No newline at end of file diff --git a/NEW KERNEL/Timer/src/isr.c b/NEW KERNEL/Timer/src/isr.c index 40e4953..ceb135b 100644 --- a/NEW KERNEL/Timer/src/isr.c +++ b/NEW KERNEL/Timer/src/isr.c @@ -70,12 +70,12 @@ void isr_irq_handler(REGISTERS *reg) { pic8259_eoi(reg->int_no); } -static void print_registers(REGISTERS *reg) { +void isr_print_registers(REGISTERS *reg) { printf("REGISTERS:\n"); printf("err_code=%d\n", reg->err_code); printf("eax=0x%x, ebx=0x%x, ecx=0x%x, edx=0x%x\n", reg->eax, reg->ebx, reg->ecx, reg->edx); printf("edi=0x%x, esi=0x%x, ebp=0x%x, esp=0x%x\n", reg->edi, reg->esi, reg->ebp, reg->esp); - printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->ss, reg->eflags, reg->useresp); + printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->cs, reg->ss, reg->eflags, reg->useresp); } /** @@ -85,7 +85,9 @@ static void print_registers(REGISTERS *reg) { void isr_exception_handler(REGISTERS reg) { if (reg.int_no < 32) { printf("EXCEPTION: %s\n", exception_messages[reg.int_no]); - print_registers(®); + isr_print_registers(®); + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); for (;;) ; } @@ -93,4 +95,4 @@ void isr_exception_handler(REGISTERS reg) { ISR handler = g_interrupt_handlers[reg.int_no]; handler(®); } -} +} \ No newline at end of file diff --git a/NEW KERNEL/VESA VBE/src/asm/exception.asm b/NEW KERNEL/VESA VBE/src/asm/exception.asm index dbfcab9..c149aef 100644 --- a/NEW KERNEL/VESA VBE/src/asm/exception.asm +++ b/NEW KERNEL/VESA VBE/src/asm/exception.asm @@ -1,39 +1,5 @@ section .text extern isr_exception_handler - global exception_0 - global exception_1 - global exception_2 - global exception_3 - global exception_4 - global exception_5 - global exception_6 - global exception_7 - global exception_8 - global exception_9 - global exception_10 - global exception_11 - global exception_12 - global exception_13 - global exception_14 - global exception_15 - global exception_16 - global exception_17 - global exception_18 - global exception_19 - global exception_20 - global exception_21 - global exception_22 - global exception_23 - global exception_24 - global exception_25 - global exception_26 - global exception_27 - global exception_28 - global exception_29 - global exception_30 - global exception_31 - global exception_128 - exception_handler: pusha ; push all registers @@ -61,196 +27,52 @@ exception_handler: iret -exception_0: - cli - push byte 0 ; store default err code(0) - push 0 ; push exception number index in IDT - jmp exception_handler - -exception_1: - cli - push byte 0 ; store default err code(0) - push 1 ; push exception number index in IDT - jmp exception_handler - -exception_2: - cli - push byte 0 ; store default err code(0) - push 2 ; push exception number index in IDT - jmp exception_handler - -exception_3: - cli - push byte 0 ; store default err code(0) - push 3 ; push exception number index in IDT - jmp exception_handler - -exception_4: - cli - push byte 0 ; store default err code(0) - push 4 ; push exception number index in IDT - jmp exception_handler - -exception_5: - cli - push byte 0 ; store default err code(0) - push 5 ; push exception number index in IDT - jmp exception_handler - -exception_6: - cli - push byte 0 ; store default err code(0) - push 6 ; push exception number index in IDT - jmp exception_handler - -exception_7: - cli - push byte 0 ; store default err code(0) - push 7 ; push exception number index in IDT - jmp exception_handler - -exception_8: - cli - push 8 ; push exception number index in IDT - jmp exception_handler - -exception_9: - cli - push byte 0 ; store default err code(0) - push 9 ; push exception number index in IDT - jmp exception_handler - -exception_10: - cli - push 10 ; push exception number index in IDT - jmp exception_handler - -exception_11: - cli - push 11 ; push exception number index in IDT - jmp exception_handler - -exception_12: - cli - push 12 ; push exception number index in IDT - jmp exception_handler - -exception_13: - cli - push 13 ; push exception number index in IDT - jmp exception_handler - -exception_14: - cli - push 14 ; push exception number index in IDT - jmp exception_handler - -exception_15: - cli - push byte 0 ; store default err code(0) - push 15 ; push exception number index in IDT - jmp exception_handler - -exception_16: - cli - push byte 0 ; store default err code(0) - push 16 ; push exception number index in IDT - jmp exception_handler - -exception_17: - cli - push byte 0 ; store default err code(0) - push 17 ; push exception number index in IDT - jmp exception_handler - -exception_18: - cli - push byte 0 ; store default err code(0) - push 18 ; push exception number index in IDT - jmp exception_handler - -exception_19: - cli - push byte 0 ; store default err code(0) - push 19 ; push exception number index in IDT - jmp exception_handler - -exception_20: - cli - push byte 0 ; store default err code(0) - push 20 ; push exception number index in IDT - jmp exception_handler - -exception_21: - cli - push byte 0 ; store default err code(0) - push 21 ; push exception number index in IDT - jmp exception_handler - -exception_22: - cli - push byte 0 ; store default err code(0) - push 22 ; push exception number index in IDT - jmp exception_handler - -exception_23: - cli - push byte 0 ; store default err code(0) - push 23 ; push exception number index in IDT - jmp exception_handler - -exception_24: - cli - push byte 0 ; store default err code(0) - push 24 ; push exception number index in IDT - jmp exception_handler - -exception_25: - cli - push byte 0 ; store default err code(0) - push 25 ; push exception number index in IDT - jmp exception_handler - -exception_26: - cli - push byte 0 ; store default err code(0) - push 26 ; push exception number index in IDT - jmp exception_handler - -exception_27: - cli - push byte 0 ; store default err code(0) - push 27 ; push exception number index in IDT - jmp exception_handler - -exception_28: - cli - push byte 0 ; store default err code(0) - push 28 ; push exception number index in IDT - jmp exception_handler - -exception_29: - cli - push byte 0 ; store default err code(0) - push 29 ; push exception number index in IDT - jmp exception_handler - -exception_30: - cli - push byte 0 ; store default err code(0) - push 30 ; push exception number index in IDT - jmp exception_handler - -exception_31: - cli - push byte 0 ; store default err code(0) - push 31 ; push exception number index in IDT - jmp exception_handler - -exception_128: - cli - push byte 0 ; store default err code(0) - push 128 ; push exception number index in IDT - jmp exception_handler - - +; Macro for interrupt service routines that do push an error code +%macro ISR_ERRCODE 1 +global exception_%1 +exception_%1: + ; We don't need to push a byte, the CPU did it for us + push %1 + jmp exception_handler +%endmacro + +; Macro for interrupt service routines that don't push an error code +%macro ISR_NOERRCODE 1 +global exception_%1 +exception_%1: + ; There is no error code + push byte 0 ; Push a default error code as REGISTERS expects it + push %1 ; Push the exception index + jmp exception_handler +%endmacro + + +ISR_NOERRCODE 0 ; Divison by zero exception +ISR_NOERRCODE 1 ; Debug exception +ISR_NOERRCODE 2 ; Non-maskable interrupt +ISR_NOERRCODE 3 ; INT3 breakpoint +ISR_NOERRCODE 4 ; Overflow exception +ISR_NOERRCODE 5 ; Bound exception +ISR_NOERRCODE 6 ; Invalid opcode +ISR_NOERRCODE 7 ; No FPU +ISR_ERRCODE 8 ; Double fault +ISR_NOERRCODE 9 ; Coprocessor segment overrun (reserved now) +ISR_ERRCODE 10 ; Invalid TSS +ISR_ERRCODE 11 ; Segment not present +ISR_ERRCODE 12 ; Stack segment exception +ISR_ERRCODE 13 ; General protection fault +ISR_ERRCODE 14 ; Page fault +ISR_NOERRCODE 15 ; Reserved exception +ISR_NOERRCODE 16 ; Floating-point exception +ISR_ERRCODE 17 ; Alignment check +ISR_NOERRCODE 18 ; Machine check +ISR_NOERRCODE 19 ; SIMD floating-point exception +ISR_NOERRCODE 20 ; Virtualization exception +ISR_ERRCODE 21 ; Control-protection exception +; 22 - 27 are reserved +ISR_NOERRCODE 28 ; Hypervisor injection exception +ISR_ERRCODE 29 ; VMM communication exception +ISR_ERRCODE 30 ; Security exception +ISR_NOERRCODE 31 ; Reserved + +ISR_NOERRCODE 128 ; System call \ No newline at end of file diff --git a/NEW KERNEL/VESA VBE/src/isr.c b/NEW KERNEL/VESA VBE/src/isr.c index 81380af..ceb135b 100644 --- a/NEW KERNEL/VESA VBE/src/isr.c +++ b/NEW KERNEL/VESA VBE/src/isr.c @@ -70,12 +70,12 @@ void isr_irq_handler(REGISTERS *reg) { pic8259_eoi(reg->int_no); } -static void print_registers(REGISTERS *reg) { +void isr_print_registers(REGISTERS *reg) { printf("REGISTERS:\n"); printf("err_code=%d\n", reg->err_code); printf("eax=0x%x, ebx=0x%x, ecx=0x%x, edx=0x%x\n", reg->eax, reg->ebx, reg->ecx, reg->edx); printf("edi=0x%x, esi=0x%x, ebp=0x%x, esp=0x%x\n", reg->edi, reg->esi, reg->ebp, reg->esp); - printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->ss, reg->eflags, reg->useresp); + printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->cs, reg->ss, reg->eflags, reg->useresp); } /** @@ -85,7 +85,9 @@ static void print_registers(REGISTERS *reg) { void isr_exception_handler(REGISTERS reg) { if (reg.int_no < 32) { printf("EXCEPTION: %s\n", exception_messages[reg.int_no]); - print_registers(®); + isr_print_registers(®); + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); for (;;) ; } diff --git a/NEW KERNEL/VGA/src/asm/exception.asm b/NEW KERNEL/VGA/src/asm/exception.asm index dbfcab9..c149aef 100644 --- a/NEW KERNEL/VGA/src/asm/exception.asm +++ b/NEW KERNEL/VGA/src/asm/exception.asm @@ -1,39 +1,5 @@ section .text extern isr_exception_handler - global exception_0 - global exception_1 - global exception_2 - global exception_3 - global exception_4 - global exception_5 - global exception_6 - global exception_7 - global exception_8 - global exception_9 - global exception_10 - global exception_11 - global exception_12 - global exception_13 - global exception_14 - global exception_15 - global exception_16 - global exception_17 - global exception_18 - global exception_19 - global exception_20 - global exception_21 - global exception_22 - global exception_23 - global exception_24 - global exception_25 - global exception_26 - global exception_27 - global exception_28 - global exception_29 - global exception_30 - global exception_31 - global exception_128 - exception_handler: pusha ; push all registers @@ -61,196 +27,52 @@ exception_handler: iret -exception_0: - cli - push byte 0 ; store default err code(0) - push 0 ; push exception number index in IDT - jmp exception_handler - -exception_1: - cli - push byte 0 ; store default err code(0) - push 1 ; push exception number index in IDT - jmp exception_handler - -exception_2: - cli - push byte 0 ; store default err code(0) - push 2 ; push exception number index in IDT - jmp exception_handler - -exception_3: - cli - push byte 0 ; store default err code(0) - push 3 ; push exception number index in IDT - jmp exception_handler - -exception_4: - cli - push byte 0 ; store default err code(0) - push 4 ; push exception number index in IDT - jmp exception_handler - -exception_5: - cli - push byte 0 ; store default err code(0) - push 5 ; push exception number index in IDT - jmp exception_handler - -exception_6: - cli - push byte 0 ; store default err code(0) - push 6 ; push exception number index in IDT - jmp exception_handler - -exception_7: - cli - push byte 0 ; store default err code(0) - push 7 ; push exception number index in IDT - jmp exception_handler - -exception_8: - cli - push 8 ; push exception number index in IDT - jmp exception_handler - -exception_9: - cli - push byte 0 ; store default err code(0) - push 9 ; push exception number index in IDT - jmp exception_handler - -exception_10: - cli - push 10 ; push exception number index in IDT - jmp exception_handler - -exception_11: - cli - push 11 ; push exception number index in IDT - jmp exception_handler - -exception_12: - cli - push 12 ; push exception number index in IDT - jmp exception_handler - -exception_13: - cli - push 13 ; push exception number index in IDT - jmp exception_handler - -exception_14: - cli - push 14 ; push exception number index in IDT - jmp exception_handler - -exception_15: - cli - push byte 0 ; store default err code(0) - push 15 ; push exception number index in IDT - jmp exception_handler - -exception_16: - cli - push byte 0 ; store default err code(0) - push 16 ; push exception number index in IDT - jmp exception_handler - -exception_17: - cli - push byte 0 ; store default err code(0) - push 17 ; push exception number index in IDT - jmp exception_handler - -exception_18: - cli - push byte 0 ; store default err code(0) - push 18 ; push exception number index in IDT - jmp exception_handler - -exception_19: - cli - push byte 0 ; store default err code(0) - push 19 ; push exception number index in IDT - jmp exception_handler - -exception_20: - cli - push byte 0 ; store default err code(0) - push 20 ; push exception number index in IDT - jmp exception_handler - -exception_21: - cli - push byte 0 ; store default err code(0) - push 21 ; push exception number index in IDT - jmp exception_handler - -exception_22: - cli - push byte 0 ; store default err code(0) - push 22 ; push exception number index in IDT - jmp exception_handler - -exception_23: - cli - push byte 0 ; store default err code(0) - push 23 ; push exception number index in IDT - jmp exception_handler - -exception_24: - cli - push byte 0 ; store default err code(0) - push 24 ; push exception number index in IDT - jmp exception_handler - -exception_25: - cli - push byte 0 ; store default err code(0) - push 25 ; push exception number index in IDT - jmp exception_handler - -exception_26: - cli - push byte 0 ; store default err code(0) - push 26 ; push exception number index in IDT - jmp exception_handler - -exception_27: - cli - push byte 0 ; store default err code(0) - push 27 ; push exception number index in IDT - jmp exception_handler - -exception_28: - cli - push byte 0 ; store default err code(0) - push 28 ; push exception number index in IDT - jmp exception_handler - -exception_29: - cli - push byte 0 ; store default err code(0) - push 29 ; push exception number index in IDT - jmp exception_handler - -exception_30: - cli - push byte 0 ; store default err code(0) - push 30 ; push exception number index in IDT - jmp exception_handler - -exception_31: - cli - push byte 0 ; store default err code(0) - push 31 ; push exception number index in IDT - jmp exception_handler - -exception_128: - cli - push byte 0 ; store default err code(0) - push 128 ; push exception number index in IDT - jmp exception_handler - - +; Macro for interrupt service routines that do push an error code +%macro ISR_ERRCODE 1 +global exception_%1 +exception_%1: + ; We don't need to push a byte, the CPU did it for us + push %1 + jmp exception_handler +%endmacro + +; Macro for interrupt service routines that don't push an error code +%macro ISR_NOERRCODE 1 +global exception_%1 +exception_%1: + ; There is no error code + push byte 0 ; Push a default error code as REGISTERS expects it + push %1 ; Push the exception index + jmp exception_handler +%endmacro + + +ISR_NOERRCODE 0 ; Divison by zero exception +ISR_NOERRCODE 1 ; Debug exception +ISR_NOERRCODE 2 ; Non-maskable interrupt +ISR_NOERRCODE 3 ; INT3 breakpoint +ISR_NOERRCODE 4 ; Overflow exception +ISR_NOERRCODE 5 ; Bound exception +ISR_NOERRCODE 6 ; Invalid opcode +ISR_NOERRCODE 7 ; No FPU +ISR_ERRCODE 8 ; Double fault +ISR_NOERRCODE 9 ; Coprocessor segment overrun (reserved now) +ISR_ERRCODE 10 ; Invalid TSS +ISR_ERRCODE 11 ; Segment not present +ISR_ERRCODE 12 ; Stack segment exception +ISR_ERRCODE 13 ; General protection fault +ISR_ERRCODE 14 ; Page fault +ISR_NOERRCODE 15 ; Reserved exception +ISR_NOERRCODE 16 ; Floating-point exception +ISR_ERRCODE 17 ; Alignment check +ISR_NOERRCODE 18 ; Machine check +ISR_NOERRCODE 19 ; SIMD floating-point exception +ISR_NOERRCODE 20 ; Virtualization exception +ISR_ERRCODE 21 ; Control-protection exception +; 22 - 27 are reserved +ISR_NOERRCODE 28 ; Hypervisor injection exception +ISR_ERRCODE 29 ; VMM communication exception +ISR_ERRCODE 30 ; Security exception +ISR_NOERRCODE 31 ; Reserved + +ISR_NOERRCODE 128 ; System call \ No newline at end of file diff --git a/NEW KERNEL/VGA/src/isr.c b/NEW KERNEL/VGA/src/isr.c index 81380af..ceb135b 100644 --- a/NEW KERNEL/VGA/src/isr.c +++ b/NEW KERNEL/VGA/src/isr.c @@ -70,12 +70,12 @@ void isr_irq_handler(REGISTERS *reg) { pic8259_eoi(reg->int_no); } -static void print_registers(REGISTERS *reg) { +void isr_print_registers(REGISTERS *reg) { printf("REGISTERS:\n"); printf("err_code=%d\n", reg->err_code); printf("eax=0x%x, ebx=0x%x, ecx=0x%x, edx=0x%x\n", reg->eax, reg->ebx, reg->ecx, reg->edx); printf("edi=0x%x, esi=0x%x, ebp=0x%x, esp=0x%x\n", reg->edi, reg->esi, reg->ebp, reg->esp); - printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->ss, reg->eflags, reg->useresp); + printf("eip=0x%x, cs=0x%x, ss=0x%x, eflags=0x%x, useresp=0x%x\n", reg->eip, reg->cs, reg->ss, reg->eflags, reg->useresp); } /** @@ -85,7 +85,9 @@ static void print_registers(REGISTERS *reg) { void isr_exception_handler(REGISTERS reg) { if (reg.int_no < 32) { printf("EXCEPTION: %s\n", exception_messages[reg.int_no]); - print_registers(®); + isr_print_registers(®); + ISR handler = g_interrupt_handlers[reg.int_no]; + handler(®); for (;;) ; }