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Merge pull request #24 from rameloni/fix-issue-12
Update to the new tywaves backend, integrated in Chisel-CIRCT compilation
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.gitignore

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*.anno.json
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tmp/
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tmp/
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*.vcd
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*.fst

README.md

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Once published locally, you can use it in your project by adding the following line to your `build.sbt` file:
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```scala
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libraryDependencies += "com.github.rameloni" %% "tywaves-demo-backend" % "your-version-here"
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libraryDependencies += "com.github.rameloni" %% "tywaves-chisel-api" % "your-version-here"
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```
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# Usage in a project through the Tywaves-Chisel-API
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- [ ] Automatic/custom signal value rendering
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- [ ] For loops code generation
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# Versioning and tools
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# Versioning and tools ([ref](https://github.com/rameloni/tywaves-chisel-demo/wiki/Tywaves-internals#tywaves-software-architecture))
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| Name of this scala package | Tywaves-Chisel-API (this repo) | Chisel | Firtool | Tywaves-rs | Surfer |
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|------------------------------------------------------------|:-----------------------------------------------------------------------------------------------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|:-----------------------------------------------------------------------------------------------------------------------|:------------------------------------------------------------------------------|:-------------------------------------------------------------------------------------------------------------------------------------------------|
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| `com.github.rameloni::tywaves-demo-backend:0.3.1-SNAPSHOT` | 0.3.1-SNAPSHOT (_coming soon_) | [v6.4.2-tywaves-SNAPSHOT](https://github.com/rameloni/chisel/releases/tag/v6.4.2-tywaves-SNAPSHOT) from `rameloni/chisel` (fork of chisel) | [v0.1.1](https://github.com/rameloni/circt/releases/tag/v0.1.1-tywaves-SNAPSHOT) from `rameloni/circt` (fork of circt) | [v0.1.2](https://github.com/rameloni/tywaves-rs/releases/tag/v0.1.2-SNAPSHOT) | [v0.3.1-tywaves-dev-SNAPSHOT]() from `surfer-tywaves-demo` _COMING SOON_ |
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| `com.github.rameloni::tywaves-demo-backend:0.3.0-SNAPSHOT` | 0.3.0-SNAPSHOT (_coming soon_) | [v6.4.2-tywaves-SNAPSHOT](https://github.com/rameloni/chisel/releases/tag/v6.4.2-tywaves-SNAPSHOT) from `rameloni/chisel` (fork of chisel) | [v0.1.1](https://github.com/rameloni/circt/releases/tag/v0.1.1-tywaves-SNAPSHOT) from `rameloni/circt` (fork of circt) | [v0.1.1](https://github.com/rameloni/tywaves-rs/releases/tag/v0.1.1-SNAPSHOT) | [v0.3.0-tywaves-dev-SNAPSHOT](https://gitlab.com/rameloni/surfer-tywaves-demo/-/releases/v0.3.0-tywaves-dev-SNAPSHOT) from `surfer-tywaves-demo` |
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| `com.github.rameloni::tywaves-demo-backend:0.2.1-SNAPSHOT` | [0.2.1-SNAPSHOT](https://github.com/rameloni/tywaves-chisel-demo/releases/tag/v0.2.1-SNAPSHOT) | [v6.1.0-tywaves-SNAPSHOT](https://github.com/rameloni/chisel/releases/tag/v6.1.0-tywaves-SNAPSHOT) from `rameloni/chisel` (fork of chisel), _needed for the parametric workspace_ | [v1.75.0](https://github.com/llvm/circt/releases/tag/firtool-1.75.0) official repo | [v0.1.0](https://github.com/rameloni/tywaves-rs/releases/tag/v0.1.0-SNAPSHOT) | [v0.2.1-tywaves-dev-SNAPSHOT](https://gitlab.com/rameloni/surfer-tywaves-demo/-/releases/v0.2.1-tywaves-dev-SNAPSHOT) from `surfer-tywaves-demo` |
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| `com.github.rameloni::tywaves-demo-backend:0.2.0-SNAPSHOT` | [0.2.0-SNAPSHOT](https://github.com/rameloni/tywaves-chisel-demo/releases/tag/v0.2.0-SNAPSHOT) | [v6.1.0-tywaves-SNAPSHOT](https://github.com/rameloni/chisel/releases/tag/v6.1.0-tywaves-SNAPSHOT) from `rameloni/chisel` (fork of chisel), _needed for the parametric workspace_ | [v1.75.0](https://github.com/llvm/circt/releases/tag/firtool-1.75.0) official repo | - | [v0.2.0-tywaves-dev-SNAPSHOT](https://gitlab.com/rameloni/surfer-tywaves-demo/-/releases/v0.2.0-tywaves-dev-SNAPSHOT) from `surfer-tywaves-demo` |
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| `com.github.rameloni::tywaves-demo-backend:0.1.0-SNAPSHOT` | [0.1.1-SNAPSHOT](https://github.com/rameloni/tywaves-chisel-demo/releases/tag/v0.1.1-SNAPSHOT) | [v6.1.0-tywaves-SNAPSHOT](https://github.com/rameloni/chisel/releases/tag/v6.1.0-tywaves-SNAPSHOT) from `rameloni/chisel` (fork of chisel), _needed for the parametric workspace_ | [v1.75.0](https://github.com/llvm/circt/releases/tag/firtool-1.75.0) official repo | - | [v0.1.1-SNAPSHOT]() from `surfer-tywaves-demo` |
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| `com.github.rameloni::tywaves-demo-backend:0.1.0-SNAPSHOT` | [0.1.0-SNAPSHOT](https://github.com/rameloni/tywaves-chisel-demo/releases/tag/v0.1.0-SNAPSHOT) | [v6.1.0](https://github.com/chipsalliance/chisel/releases/tag/v6.1.0) official repo | [v1.62.0](https://github.com/llvm/circt/releases/tag/firtool-1.62.0) official repo | - | [v0.1.0-SNAPSHOT]() from `surfer-tywaves-demo` |
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Use the new name of the library in your sbt dependencies: `com.github.rameloni::tywaves-chisel-api:<version>`.
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| Release | Chisel fork version (from `rameloni/chisel`) | Firtool fork version (from `rameloni/circt`) | Tywaves-rs version | Surfer-tywaves version |
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|:-------------------------------|:---------------------------------------------------------------------------------------------------|:---------------------------------------------------------------------------------|:------------------------------------------------------------------------------|:----------------------------------------------------------------------------------------------------------------------|
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| 0.3.1-SNAPSHOT (_coming soon_) | [v6.4.2-tywaves-SNAPSHOT](https://github.com/rameloni/chisel/releases/tag/v6.4.2-tywaves-SNAPSHOT) | [v0.1.1](https://github.com/rameloni/circt/releases/tag/v0.1.1-tywaves-SNAPSHOT) | [v0.1.2](https://github.com/rameloni/tywaves-rs/releases/tag/v0.1.2-SNAPSHOT) | [v0.3.1-tywaves-dev-SNAPSHOT]() _COMING SOON_ |
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| 0.3.0-SNAPSHOT (_coming soon_) | [v6.4.2-tywaves-SNAPSHOT](https://github.com/rameloni/chisel/releases/tag/v6.4.2-tywaves-SNAPSHOT) | [v0.1.1](https://github.com/rameloni/circt/releases/tag/v0.1.1-tywaves-SNAPSHOT) | [v0.1.1](https://github.com/rameloni/tywaves-rs/releases/tag/v0.1.1-SNAPSHOT) | [v0.3.0-tywaves-dev-SNAPSHOT](https://gitlab.com/rameloni/surfer-tywaves-demo/-/releases/v0.3.0-tywaves-dev-SNAPSHOT) |
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## Old backend implementations ([ref](https://github.com/rameloni/tywaves-chisel-demo/wiki/An-alternative-solution-(old-demo-version)))
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Use the old name of the library in your sbt dependencies: `com.github.rameloni::tywaves-demo-backend:<version>`.
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| Release | Chisel fork version (from `rameloni/chisel`) | Firtool version (official CIRCT repo) | Tywaves-rs version | Surfer-tywaves version |
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|:-----------------------------------------------------------------------------------------------|:---------------------------------------------------------------------------------------------------|:---------------------------------------------------------------------|:------------------------------------------------------------------------------|:----------------------------------------------------------------------------------------------------------------------|
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| [0.2.1-SNAPSHOT](https://github.com/rameloni/tywaves-chisel-demo/releases/tag/v0.2.1-SNAPSHOT) | [v6.1.0-tywaves-SNAPSHOT](https://github.com/rameloni/chisel/releases/tag/v6.1.0-tywaves-SNAPSHOT) | [v1.75.0](https://github.com/llvm/circt/releases/tag/firtool-1.75.0) | [v0.1.0](https://github.com/rameloni/tywaves-rs/releases/tag/v0.1.0-SNAPSHOT) | [v0.2.1-tywaves-dev-SNAPSHOT](https://gitlab.com/rameloni/surfer-tywaves-demo/-/releases/v0.2.1-tywaves-dev-SNAPSHOT) |
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| [0.2.0-SNAPSHOT](https://github.com/rameloni/tywaves-chisel-demo/releases/tag/v0.2.0-SNAPSHOT) | [v6.1.0-tywaves-SNAPSHOT](https://github.com/rameloni/chisel/releases/tag/v6.1.0-tywaves-SNAPSHOT) | [v1.75.0](https://github.com/llvm/circt/releases/tag/firtool-1.75.0) | - | [v0.2.0-tywaves-dev-SNAPSHOT](https://gitlab.com/rameloni/surfer-tywaves-demo/-/releases/v0.2.0-tywaves-dev-SNAPSHOT) |
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| [0.1.1-SNAPSHOT](https://github.com/rameloni/tywaves-chisel-demo/releases/tag/v0.1.1-SNAPSHOT) | [v6.1.0-tywaves-SNAPSHOT](https://github.com/rameloni/chisel/releases/tag/v6.1.0-tywaves-SNAPSHOT) | [v1.75.0](https://github.com/llvm/circt/releases/tag/firtool-1.75.0) | - | [v0.1.1-SNAPSHOT]() |
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| [0.1.0-SNAPSHOT](https://github.com/rameloni/tywaves-chisel-demo/releases/tag/v0.1.0-SNAPSHOT) | [v6.1.0](https://github.com/chipsalliance/chisel/releases/tag/v6.1.0) official repo | [v1.62.0](https://github.com/llvm/circt/releases/tag/firtool-1.62.0) | - | [v0.1.0-SNAPSHOT]() |
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#
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[^1]: While `TywavesSimulator` is a central part of the Tywaves project and its functionalities are not fully supported
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yet, the `ParametricSimulator` is able to simulate any Chisel circuit. In case you need to simulate a circuit that is

build.sbt

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buildInfoPackage := "tywaves",
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buildInfoUsePackageAsPath := true,
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).settings(
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name := "TyWaves-demo-backend",
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name := "tywaves-chisel-api",
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addCompilerPlugin(
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"org.chipsalliance" % "chisel-plugin" % chiselVersion cross CrossVersion.full
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),
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libraryDependencies += "org.chipsalliance" %% "chisel" % chiselVersion,
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libraryDependencies += "org.scalatest" %% "scalatest" % scalatestVersion % "test",
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libraryDependencies += "org.chipsalliance" %% "chisel" % chiselVersion,
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libraryDependencies += "org.scalatest" %% "scalatest" % scalatestVersion % "test",
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// libraryDependencies += "io.circe" %% "circe-core" % circeVersion,
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// libraryDependencies += "io.circe" %% "circe-generic" % circeVersion,
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// libraryDependencies += "io.circe" %% "circe-generic-extras" % "0.14.3",

example/gcd.test.scala

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//> using scala "2.13.14"
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//> using dep "com.github.rameloni::tywaves-demo-backend:0.3.0-SNAPSHOT"
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//> using dep "com.github.rameloni::tywaves-chisel-api:0.3.0-SNAPSHOT"
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//> using dep "org.chipsalliance::chisel:6.4.0"
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//> using plugin "org.chipsalliance:::chisel-plugin:6.4.0"
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//> using options "-unchecked", "-deprecation", "-language:reflectiveCalls", "-feature", "-Xcheckinit", "-Xfatal-warnings", "-Ywarn-dead-code", "-Ywarn-unused", "-Ymacro-annotations"

example/tydi-example.test.scala

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//> using scala "2.13.14"
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//> using dep "com.github.rameloni::tywaves-demo-backend:0.3.0-SNAPSHOT"
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//> using dep "com.github.rameloni::tywaves-chisel-api:0.3.0-SNAPSHOT"
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//> using dep "nl.tudelft::tydi-chisel::0.1.0"
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//> using plugin "org.chipsalliance:::chisel-plugin:6.4.0"
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//> using options "-unchecked", "-deprecation", "-language:reflectiveCalls", "-feature", "-Xcheckinit", "-Xfatal-warnings", "-Ywarn-dead-code", "-Ywarn-unused", "-Ymacro-annotations"

src/main/scala/tywaves/circuitmapper/TypedConverter.scala

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this.workingDir = Some(workingDir)
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hglddWithOptDir = workingDir + "/" + hglddWithOptDir
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hglddDebugDir = workingDir + "/" + hglddDebugDir
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// hglddDebugDir = workingDir + "/" + "support-artifacts"
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// Annotations for ChiselStage
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val annotations = Seq(ChiselGeneratorAnnotation(generateModule)) ++ defaultFirtoolOptAnno
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// Run without debug mode
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chiselStage.execute(
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chiselStageBaseArgs ++ Array("--target-dir", hglddWithOptDir),
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annotations,
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) // execute returns the passThrough annotations in CIRCT transform stage
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// Run without debug mode: TODO check it is actually not needed
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// chiselStage.execute(
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// chiselStageBaseArgs ++ Array("--target-dir", hglddWithOptDir),
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// annotations,
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// ) // execute returns the passThrough annotations in CIRCT transform stage
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// Run with debug mode
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val finalAnno = chiselStage.execute(

src/main/scala/tywaves/simulator/TywavesSimulator.scala

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if (containTywaves)
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settings ++ Seq(FirtoolArgs(Seq("-O=debug", "-g", "--emit-hgldd", "--split-verilog", "-o=WORK.v")))
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else settings
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simulator.simulate(module, finalSettings, simName)(body)
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if (simulator.finalTracePath.nonEmpty && containTywaves) {
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// Get the extra scopes created by ChiselSim backend: TOP, svsimTestbench, dut
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val extraScopes = Seq("TOP", Workspace.testbenchModuleName, "dut")
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// Create the debug info from the firtool and get the top module name
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// TODO: this may not be needed anymore, since the debug info can be generated directly from chiselsim, by giving the right options to firtool
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// But the problem is to call chiselstage with debug options
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TypedConverter.createDebugInfoHgldd(() => module, simulator.wantedWorkspacePath)
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// Run tywaves viewer if the Tywaves waveform generation is enabled by Tywaves(true)

src/test/scala/gcd/GCDTest.scala

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it("runs GCD correctly") {
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import TywavesSimulator._
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simulate(new GCD(), Seq(VcdTrace, WithTywavesWaveforms(false)), simName = "runs_GCD_correctly") {
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simulate(
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new GCD(),
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Seq(VcdTrace, WithTywavesWaveforms(false), WithFirtoolArgs(Seq("-g", "--emit-hgldd")), SaveWorkdir),
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simName = "runs_GCD_correctly",
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) {
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gcd =>
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gcd.io.a.poke(24.U)
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gcd.io.b.poke(36.U)

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