Add SIMD operations that use f16 and f128

[tgross35]

Eventually we will want to be able to make use of simd operations for f16 and f128, now that we have primitives to represent them. Possibilities that I know of:

• Aarch64 neon supports float16x{4,8} https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:@navigationhierarchiessimdisa=[Neon]&f:@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&q=.
  • Implementation: AArch64: Add NEON fp16 intrinsics stdarch#1726
  • Tracking issue: Tracking Issue for NEON fp16 intrinsics #136306
• Arm sve supports float16x{1,2} https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiessimdisa=[sve2,sve]&q=
  • We probably can't support this until our runtime-sized types story is better
• RISC-V apparently has both f16 and f128 https://five-embeddev.com/riscv-user-isa-manual/riscv-user-2.2/v.html
  • Similarly relies on the "V" extension which has runtime-sized types Tracking Issue for RISC-V Ratified Extensions Intrinsics #114544
• NVIDIA PTX has f16 SIMD
  • Implementation: NVPTX: Add f16 SIMD intrinsics stdarch#1626
  • Submodule Update stdarch submodule #128866
  • Tracking issue: Tracking Issue for NVPTX arch intrinsics #111199
• x86 with +avx512fp16
  • Implementation: Implement AVX512_FP16 stdarch#1605
  • Submodule: Update the stdarch submodule #128466
  • Tracking issue: Tracking Issue for AVX512_FP16 intrinsics #127213
• Portable SIMD should eventually be able to support these operations

Probably some work/research overlap with adding assembly #125398

Tracking issue: #116909

[tgross35]

@rustbot label +A-simd +T-libs +F-f16_and_f128 +E-help-wanted +C-feature-request -needs-triage

[kjetilkjeka]

Nvidia ptx (--target nvptx64-nvidia-cuda) also support arithmetic instructions for f16 and f16x2 SIMD.

Making this work is an important step for making the ptx target "feature complete" with languages traditionally used for GPGPU. Let me know if there's anything I can do to support this.

[tgross35]

Thanks, I'll add that to the top list.

It looks like it might not be too hard to add new simd intrinsics on that platform? I have no clue but https://github.com/rust-lang/stdarch/blob/df3618d9f35165f4bc548114e511c49c29e1fd9b/crates/core_arch/src/nvptx/mod.rs is pretty straightforward if you want to give it a shot at some point

[kjetilkjeka]

I just tested f16 on nvptx now and I don't think I realized how many of the pieces was already put together. That's great!

I looked a bit around in SIMD instructions for other arches and I think this is, as you say, pretty straightforward. I will give it a shot. Hopefully I will get around to creating a PR next week.

[tgross35]

That is great news! Note that unfortunately math symbols aren’t yet available on all targets so testing with the new types is kind of weird sometimes, but hopefully that will be resolved in a week or so with a compiler_builtins update.