Description
I have installed BLASYS from https://github.com/scale-lab/BLASYS, and LSOracle from https://github.com/Ace-Ma/LSOracle and I am trying to get an approximate circuit from the EPFL adder.v as input.
When I run python3 blasys.py -i ../../BLASYS/adder.v -tb adder_tb.v
I get
/----------------------------------------------------------------------------\
| |
| BLASYS -- Approximate Logic Synthesis Using Boolean Matrix Factorization |
| Version: 0.5-beta |
| |
| Copyright (C) 2019 SCALE Lab, Brown University |
| |
| Permission to use, copy, modify, and/or distribute this software for any |
| purpose with or without fee is hereby granted, provided that the above |
| copyright notice and this permission notice appear in all copies. |
| |
| THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| |
\----------------------------------------------------------------------------/
Checking software dependency ...
Create output directory...
Simulating truth table on input design...
Synthesizing input design with original partitions...
Original design area 995.0
Parsing input verilog into aig format ...
Partitioning input circuit...
Running command: ['lsoracle', '-c', 'read_aig top_20250331-164827/top.aig; partitioning 2 -c /home/baadalvm/BLASYS/config/test.ini; get_all_partitions top_20250331-164827/partition']
Subprocess call result: 0
['top_0', 'top_1']
Log File Content:
Partitioning stored AIG network
Partition 0:
Number of Logic Cones = 65
Partition 1:
Number of Logic Cones = 66
Number of partitions 0
Traceback (most recent call last):
File "/home/baadalvm/BLASYS/blasys.py", line 116, in <module>
main()
File "/home/baadalvm/BLASYS/blasys.py", line 86, in main
worker.recursive_partitioning(args.npart)
File "/home/baadalvm/BLASYS/utils/greedyWorker.py", line 290, in recursive_partitioning
create_wrapper(self.input, outfile, topfile, mapping, self)
File "/home/baadalvm/BLASYS/utils/utils.py", line 600, in create_wrapper
top_file = open(top)
^^^^^^^^^
FileNotFoundError: [Errno 2] No such file or directory: 'top_20250331-164827/partition/top.v'
The log output from the partitioning step shows that the network is being partitioned into two parts, as expected:
Partitioning stored AIG network
Partition 0:
Number of Logic Cones = 65
Partition 1:
Number of Logic Cones = 66
-----
It seems the partitioning step appears to create the two partitions (top_0 and top_1), however the top-level Verilog file (top.v) is not being generated or found in the top_20250331-164827/partition directory.
I have checked the partition directory, and it is empty - hence the top-level top.v file is missing in the partition directory but a top.v file exists in the top_20250331-164827 directory.
Could you please guide me on how to resolve this issue or please provide the LSOracle binary you were using (for Ubuntu 20.04)? I am wondering if there is something missing in the configuration or if I am using a different version of LSOracle.
It would be great if you could look at it the earliest as per your convenience.
Thank you so much for your time and help!