-
Notifications
You must be signed in to change notification settings - Fork 1
/
Copy pathhost.c
1572 lines (1303 loc) · 39.6 KB
/
host.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/*
This file is part of AVRtest -- A simple simulator for the
AVR family of 8-bit microcontrollers designed to test the compiler.
Copyright (C) 2019-2025 Free Software Foundation, Inc.
AVRtest is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
AVRtest is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with AVRtest; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include <stdint.h>
#include <stdlib.h>
#include <stdio.h>
#include <stdarg.h>
#include <string.h>
#include <math.h>
#include "testavr.h"
#include "options.h"
#include "host.h"
#define IN_AVRTEST
#include "avrtest.h"
#define LEN_LOG_STRING 500
#define LEN_LOG_XFMT 500
// LOG_XXX logs to -log=FILE.
#define LOGPRINT(FMT, ...) \
do { \
fprintf (program.log_stream, FMT, __VA_ARGS__); \
if (!log_unused && program.log_stream != stdout) \
printf (FMT, __VA_ARGS__); \
} while (0)
ATTR_PRINTF(1,2)
static void log_add_ (const char *fmt, ...)
{
va_list args;
va_start (args, fmt);
log_va (fmt, args);
va_end (args);
}
#define log_add(...) \
do { \
if (is_avrtest_log) \
log_add_ (__VA_ARGS__); \
} while (0)
#define str_append(str, ...) \
sprintf ((str) + strlen (str), __VA_ARGS__)
const layout_t
layout[LOG_X_sentinel] =
{
[LOG_STR_CMD] = { 2, "%s", false, false },
[LOG_PSTR_CMD] = { 2, "%s", false, true },
[LOG_ADDR_CMD] = { 2, " 0x%04x ", false, false },
[LOG_FLOAT_CMD] = { 4, " %.6f ", false, false },
[LOG_D64_CMD] = { 8, " %.6f ", false, false },
[LOG_F7T_CMD] = { 2, " %s ", false, false },
[LOG_U8_CMD] = { 1, " %u ", false, false },
[LOG_U16_CMD] = { 2, " %u ", false, false },
[LOG_U24_CMD] = { 3, " %u ", false, false },
[LOG_U32_CMD] = { 4, " %u ", false, false },
[LOG_U64_CMD] = { 8, " %llu ", false, false },
[LOG_S8_CMD] = { 1, " %d ", true, false },
[LOG_S16_CMD] = { 2, " %d ", true, false },
[LOG_S24_CMD] = { 3, " %d ", true, false },
[LOG_S32_CMD] = { 4, " %d ", true, false },
[LOG_S64_CMD] = { 8, " %lld ", true, false },
[LOG_X8_CMD] = { 1, " 0x%02x ", false, false },
[LOG_X16_CMD] = { 2, " 0x%04x ", false, false },
[LOG_X24_CMD] = { 3, " 0x%06x ", false, false },
[LOG_X32_CMD] = { 4, " 0x%08x ", false, false },
[LOG_X64_CMD] = { 8, " 0x%016llx ", false, false },
[LOG_UNSET_FMT_CMD] = { 0, NULL, false, false },
[LOG_SET_FMT_CMD] = { 2, NULL, false, false },
[LOG_SET_PFMT_CMD] = { 2, NULL, false, true },
[LOG_SET_FMT_ONCE_CMD] = { 2, NULL, false, false },
[LOG_SET_PFMT_ONCE_CMD] = { 2, NULL, false, true },
[LOG_TAG_FMT_CMD] = { 2, NULL, false, false },
[LOG_TAG_PFMT_CMD] = { 2, NULL, false, true },
};
static const layout_t lay_1 = { 1, NULL, false, false }; // 1 byte in RAM.
static const layout_t lay_2 = { 2, NULL, false, false }; // 2 bytes in RAM.
static const layout_t lay_4 = { 4, NULL, false, false }; // 4 bytes in RAM.
/* Copy a string from AVR target to the host, but not more than
LEN_MAX characters. */
char*
read_string (char *p, unsigned addr, bool flash_p, size_t len_max)
{
char c;
size_t n = 0;
if (flash_p
&& arch.flash_pm_offset
&& addr >= arch.flash_pm_offset)
{
// README states that LOG_PSTR etc. can be used to print strings in
// flash. This is ambiguous for devices that see flash in RAM:
// A variable can reside in flash due to __flash or PROGMEM and
// hence in .progmem.data, or it can be located in .rodata.
// If the address appears as a .rodata address, then access RAM
// space (which holds a copy of flash at arch.flash_pm_offset).
flash_p = false;
}
byte *p_avr = cpu_address (addr, flash_p ? AR_FLASH : AR_RAM);
while (++n < len_max && (c = *p_avr++))
if (c != '\r')
*p++ = c;
*p = '\0';
return p;
}
// IEEE-754 single
avr_float_t
decode_avr_float (unsigned val)
{
// float = s bbbbbbbb mmmmmmmmmmmmmmmmmmmmmmm
// 31
// s = sign (1)
// b = biased exponent
// m = mantissa
int one;
const int DIG_MANT = 23;
const int DIG_EXP = 8;
const int EXP_BIAS = 127;
avr_float_t af;
int r = (1 << DIG_EXP) -1;
unsigned mant = af.mant = val & ((1 << DIG_MANT) -1);
val >>= DIG_MANT;
af.exp_biased = val & r;
af.exp = af.exp_biased - EXP_BIAS;
val >>= DIG_EXP;
af.sign_bit = val & 1;
// Denorm?
if (af.exp_biased == 0)
af.fclass = FT_DENORM;
else if (af.exp_biased < r)
af.fclass = FT_NORM;
else if (mant == 0)
af.fclass = FT_INF;
else
af.fclass = FT_NAN;
switch (af.fclass)
{
case FT_NORM:
case FT_DENORM:
one = af.fclass == FT_NORM;
af.mant1 = mant | (one << DIG_MANT);
af.x = ldexp ((double) af.mant1, af.exp + 1 - one - DIG_MANT);
af.x = copysign (af.x, af.sign_bit ? -1.0 : 1.0);
break;
case FT_NAN:
af.x = nan ("");
break;
case FT_INF:
af.x = af.sign_bit ? -HUGE_VAL : HUGE_VAL;
break;
}
return af;
}
// IEEE-754 double
avr_float_t
decode_avr_double (uint64_t val)
{
// double = s bbbbbbbbbbb mmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmm
// 63
// s = sign (1)
// b = biased exponent
// m = mantissa
int one;
const int DIG_MANT = 52;
const int DIG_EXP = 11;
const int EXP_BIAS = 1023;
avr_float_t af;
int r = (1 << DIG_EXP) -1;
uint64_t mant = af.mant = val & (((uint64_t)1 << DIG_MANT) -1);
val >>= DIG_MANT;
af.exp_biased = val & r;
af.exp = af.exp_biased - EXP_BIAS;
val >>= DIG_EXP;
af.sign_bit = val & 1;
// Denorm?
if (af.exp_biased == 0)
af.fclass = FT_DENORM;
else if (af.exp_biased < r)
af.fclass = FT_NORM;
else if (mant == 0)
af.fclass = FT_INF;
else
af.fclass = FT_NAN;
switch (af.fclass)
{
case FT_NORM:
case FT_DENORM:
one = af.fclass == FT_NORM;
af.mant1 = mant | ((uint64_t)one << DIG_MANT);
af.x = ldexp ((double) af.mant1, af.exp + 1 - one - DIG_MANT);
af.x = copysign (af.x, af.sign_bit ? -1.0 : 1.0);
break;
case FT_NAN:
af.x = nan ("");
break;
case FT_INF:
af.x = af.sign_bit ? -HUGE_VAL : HUGE_VAL;
break;
}
return af;
}
/* Read a value as unsigned from REGNO. Bytesize (1..4) and signedness are
determined by respective layout[]. If the value is signed a cast to
signed will do the conversion. */
unsigned
get_reg_value (int regno, const layout_t *lay)
{
byte *p = cpu_address (regno, AR_REG);
unsigned val = 0;
if (lay->signed_p && (0x80 & p[lay->size - 1]))
val = -1U;
for (int n = lay->size; n;)
val = (val << 8) | p[--n];
return val;
}
/* Read a value as unsigned long long from R18. Bytesize (1..8) and
signedness are determined by respective layout[]. If the value is signed
a cast to signed will do the conversion. */
static unsigned long long
get_r18_value (const layout_t *lay)
{
byte *p = cpu_address (18, AR_REG);
unsigned long long val = 0;
if (lay->signed_p && (0x80 & p[lay->size - 1]))
val = -1ull;
for (int n = lay->size; n;)
val = (val << 8) | p[--n];
return val;
}
/* Write value VAL to register REGNO. */
static void
put_reg_value (int regno, int n_regs, uint64_t val)
{
byte *p = cpu_address (regno, AR_REG);
for (int i = 0; i < n_regs; ++i)
{
*p++ = val & 0xff;
val >>= 8;
}
}
/* Read a value as unsigned from ADDR. Bytesize (1..4) and signedness
are determined by respective layout[]. If the value is signed, then
a cast to signed will do the conversion. */
static unsigned
get_mem_value (unsigned addr, const layout_t *lay)
{
bool flash_p = lay->in_rom;
if (flash_p
&& arch.flash_pm_offset
&& addr >= arch.flash_pm_offset)
{
// "Flash" is ambiguous for devices that see flash in RAM:
// A variable can reside in flash due to __flash or PRGMEM and
// hence in .progmem.data, or it can be located in .rodata.
// If the address appears as a .rodata address, then access RAM
// (which holds a copy of flash at arch.flash_pm_offset).
flash_p = false;
}
byte *p = cpu_address (addr, flash_p ? AR_FLASH : AR_RAM);
unsigned val = 0;
if (lay->signed_p && (0x80 & p[lay->size - 1]))
val = -1U;
for (int n = lay->size; n;)
val = (val << 8) | p[--n];
return val;
}
static uint8_t
get_mem_byte (unsigned addr)
{
return get_mem_value (addr, & lay_1);
}
ticks_port_t ticks_port;
void
sys_ticks_cmd (int cfg)
{
// a prime m
const uint32_t prand_m = 0xfffffffb;
// phi (m)
// uint32_t prand_phi_m = m-1; // = 2 * 5 * 19 * 22605091
// a primitive root of (Z/m*Z)^*
const uint32_t prand_root = 0xcafebabe;
cfg &= 0xff;
ticks_port_t *tp = &ticks_port;
if (cfg & TICKS_RESET_ALL_CMD)
{
log_add ("ticks reset:");
if (cfg & TICKS_RESET_CYCLES_CMD)
{
log_add (" cycles");
tp->call.state = 0;
tp->n_cycles = program.n_cycles;
}
if (cfg & TICKS_RESET_INSNS_CMD)
{
log_add (" insns");
tp->n_insns = program.n_insns;
}
if (cfg & TICKS_RESET_PRAND_CMD)
{
log_add (" prand");
tp->pvalue = 0;
}
return;
}
if (cfg == TICKS_CYCLES_CALL_CMD)
{
tp->call.state = 1;
log_add ("ticks cycles call");
return;
}
const char *what = "???";
uint32_t value = 0;
switch (cfg)
{
case TICKS_GET_CYCLES_CMD:
if (tp->call.state == 3)
{
tp->call.state = 0;
what = "cycles.call";
value = tp->call.n_cycles;
}
else
{
what = "cycles";
value = (uint32_t) (program.n_cycles - tp->n_cycles);
}
break;
case TICKS_GET_INSNS_CMD:
what = "insn";
value = (uint32_t) (program.n_insns - tp->n_insns);
break;
case TICKS_GET_PRAND_CMD:
what = "prand";
value = tp->pvalue ? tp->pvalue : 1;
value = ((uint64_t) value * prand_root) % prand_m;
tp->pvalue = value;
break;
case TICKS_GET_RAND_CMD:
what = "rand";
value = rand();
value ^= (unsigned) rand() << 11;
value ^= (unsigned) rand() << 22;
break;
}
log_add ("ticks get %s: R22<-(%08x) = %u", what, value, value);
put_reg_value (22, 4, value);
}
static void
sys_misc_u32 (uint8_t what)
{
uint32_t a = (uint32_t) get_reg_value (22, & layout[LOG_U32_CMD]);
uint32_t b = (uint32_t) get_reg_value (18, & layout[LOG_U32_CMD]);
uint32_t c = 0;
const char *op = "???";
const char *name = "???";
switch (what)
{
default:
leave (LEAVE_USAGE, "unknown misc 32-bit arith function %u\n", what);
case AVRTEST_MISC_mulu32: op = "*"; name = "mul";
c = a * b;
break;
case AVRTEST_MISC_divu32: op = "/"; name = "div";
c = b == 0 ? UINT32_MAX : a / b;
break;
case AVRTEST_MISC_modu32: op = "%"; name = "mod";
c = b == 0 ? a : a % b;
break;
}
put_reg_value (22, 4, c);
log_add (" arith %su32: %u=0x%x %s %u=0x%x = %u=0x%x", name,
(unsigned) a, (unsigned) a, op, (unsigned) b, (unsigned) b,
(unsigned) c, (unsigned) c);
}
static void
sys_misc_s32 (uint8_t what)
{
int32_t a = (int32_t) get_reg_value (22, & layout[LOG_S32_CMD]);
int32_t b = (int32_t) get_reg_value (18, & layout[LOG_S32_CMD]);
int32_t c = 0;
bool sign;
const char *op = "???";
const char *name = "???";
switch (what)
{
default:
leave (LEAVE_USAGE, "unknown misc 32-bit arith function %u\n", what);
case AVRTEST_MISC_muls32: op = "*"; name = "mul";
c = a * b;
break;
case AVRTEST_MISC_divs32: op = "/"; name = "div";
sign = (a < 0) ^ (b < 0);
c = 0?0
: b == 0 ? sign ? 1 : -1
: a == INT32_MIN && b == -1 ? INT32_MIN
: a / b;
break;
case AVRTEST_MISC_mods32: op = "%"; name = "mod";
c = 0?0
: b == 0 ? a
: a == INT32_MIN && b == -1 ? 0
: a % b;
break;
}
put_reg_value (22, 4, c);
log_add (" arith %ss32: %d=0x%x %s %d=0x%x = %d=0x%x", name,
(signed) a, (unsigned) (uint32_t) a, op, (signed) b,
(unsigned) (uint32_t) b, (signed) c, (unsigned) (uint32_t) c);
}
void
sys_log_dump (int what)
{
what &= 0xff;
if (what >= LOG_X_sentinel)
{
log_add ("log: invalid cmd %d\n", what);
return;
}
static int fmt_once = 0;
static char xfmt[LEN_LOG_XFMT];
static char string[LEN_LOG_STRING];
const layout_t *lay = & layout[what];
unsigned val = get_reg_value (20, lay);
const char *fmt = fmt_once ? xfmt : lay->fmt;
if (fmt_once == 1)
fmt_once = 0;
switch (what)
{
default:
log_add ("log %d-byte value", lay->size);
LOGPRINT (fmt, val);
break;
case LOG_S64_CMD:
case LOG_U64_CMD:
case LOG_X64_CMD:
log_add ("log %d-byte value", lay->size);
LOGPRINT (fmt, get_r18_value (lay));
break;
case LOG_SET_FMT_ONCE_CMD:
case LOG_SET_PFMT_ONCE_CMD:
log_add ("log set format");
fmt_once = 1;
read_string (xfmt, val, lay->in_rom, sizeof (xfmt));
break;
case LOG_SET_FMT_CMD:
case LOG_SET_PFMT_CMD:
log_add ("log set format");
fmt_once = -1;
read_string (xfmt, val, lay->in_rom, sizeof (xfmt));
break;
case LOG_UNSET_FMT_CMD:
log_add ("log unset format");
fmt_once = 0;
break;
case LOG_PSTR_CMD:
case LOG_STR_CMD:
log_add ("log string");
read_string (string, val, lay->in_rom, sizeof (string));
LOGPRINT (fmt, string);
break;
case LOG_FLOAT_CMD:
{
log_add ("log float");
avr_float_t af = decode_avr_float (val);
LOGPRINT (fmt, af.x);
}
break;
case LOG_D64_CMD:
{
log_add ("log double");
avr_float_t af = decode_avr_double (get_r18_value (lay));
LOGPRINT (fmt, af.x);
}
break;
case LOG_F7T_CMD:
{
log_add ("log f7_t");
char txt[200];
const int n_mant = 7;
const unsigned addr = val;
const uint8_t flags = get_mem_byte (addr);
const uint8_t m_sign = 1 << 0;
const uint8_t m_zero = 1 << 1;
const uint8_t m_nan = 1 << 2;
const uint8_t m_plusx = 1 << 3;
const uint8_t m_inf = 1 << 7;
const uint8_t m_all = m_sign | m_inf | m_nan | m_zero | m_plusx;
sprintf (txt, "{ flags = ");
str_append (txt, flags <= 1 ? "%d" : "0x%02x", flags);
str_append (txt, " [%c", (flags & m_sign) ? '-' : '+');
if (flags & m_inf) str_append (txt, ",Inf");
if (flags & m_nan) str_append (txt, ",NaN");
if (flags & m_zero) str_append (txt, ",Zero");
if (flags & m_plusx) str_append (txt, ",PlusX");
if (flags & ~m_all) str_append (txt, ",???");
uint64_t mant = 0;
str_append (txt, "], mant = { 0x");
for (int i = n_mant - 1; i >= 0; --i)
{
uint8_t b = get_mem_byte (addr + 1 + i);
str_append (txt, "%02x ", b);
mant = (mant << 8) | b;
}
// mant_bits = 56 = 1 + IEEE_mant_bits + 3
const uint8_t msb = mant >> (8 * n_mant - 1);
// Make mant such that it has 13 + 1 nibbles at the low end.
mant <<= 1;
const uint8_t lsn = mant & 0xf;
// Make mant such that it has 13 nibbles at the low end.
mant >>= 4;
// mant = 0x1.[IEEE_mant_bits] | 3 extra f7 bits
mant &= (UINT64_C(1) << 52) - 1;
str_append (txt, "} = 0x%u.%013" PRIx64 "|%u, expo = %d }",
msb, mant, lsn,
get_mem_value (addr + 1 + n_mant, & layout[LOG_S16_CMD]));
LOGPRINT (fmt, txt);
}
break;
}
}
static int
is_special_ulp (const avr_float_t *x, const avr_float_t *y)
{
if (x->fclass == FT_NAN && y->fclass == FT_NAN)
return 0;
else if (x->fclass == FT_INF && y->fclass == FT_INF
&& x->sign_bit == y->sign_bit)
return 0;
else if (x->fclass >= FT_INF || y->fclass >= FT_INF)
return 12345;
if (x->mant1 == 0 && y->mant1 == 0)
return 0;
return -1;
}
// Emulating IEEE single functions.
#if __SIZEOF_FLOAT__ != 4
#define NO_FEMUL "host has no 32-bit IEEE single"
#endif
#if !defined NO_FEMUL && __FLT_MANT_DIG__ != 24
#define NO_FEMUL "host IEEE single mantissa != 24 bits"
#endif
#if !defined NO_FEMUL && __FLT_MAX_EXP__ != 128
#define NO_FEMUL "host IEEE single max exponent != 128"
#endif
#if !defined NO_FEMUL \
&& defined __FLOAT_WORD_ORDER__ \
&& defined __ORDER_LITTLE_ENDIAN__ \
&& __FLOAT_WORD_ORDER__ != __ORDER_LITTLE_ENDIAN__
#define NO_FEMUL "host IEEE single is not little endian"
#endif
#define PRIF "%e=%.6a"
#if defined NO_FEMUL
void sys_emul_float (uint8_t fid)
{
log_add ("not supported: %s", NO_FEMUL);
leave (LEAVE_FATAL, "IEEE single emulation failed: %s", NO_FEMUL);
}
static void sys_misc_fxtof (uint8_t fid)
{
log_add ("not supported: %s", NO_FEMUL);
leave (LEAVE_FATAL, "IEEE single emulation failed: %s", NO_FEMUL);
}
#else // float emulation is supported
static float
get_reg_float (int regno)
{
float f;
memcpy (&f, cpu_address (regno, AR_REG), sizeof (float));
return f;
}
static void
set_reg_float (int regno, float f)
{
memcpy (cpu_address (regno, AR_REG), &f, sizeof (float));
}
static avr_float_t
get_reg_avr_float (int regno)
{
uint32_t rval;
memcpy (&rval, cpu_address (regno, AR_REG), sizeof (rval));
return decode_avr_float ((unsigned) rval);
}
/* Error of X in units of ULPs (unit in the last place / unit of least
precision). Y is the reference / assumed correct value. */
static float
get_fulp (const avr_float_t *x, const avr_float_t *y)
{
int iulp = is_special_ulp (x, y);
if (iulp >= 0)
return iulp;
float hx = ldexpf (x->mant1, x->exp);
float hy = ldexpf (y->mant1, y->exp);
float ulp = ldexpf (1, y->exp);
float z = (hx - hy) / ulp;
return fabsf (z);
}
typedef struct
{
float (*fun) (float);
const char *name;
} func1f_t;
typedef struct
{
float (*fun) (float, float);
const char *name;
} func2f_t;
#define _(X) [AVRTEST_##X] = { X ## f, #X },
static const func1f_t func1f[] =
{
_(sin) _(asin) _(sinh) _(asinh)
_(cos) _(acos) _(cosh) _(acosh)
_(tan) _(atan) _(tanh) _(atanh)
_(exp) _(log) _(sqrt) _(cbrt)
_(trunc) _(ceil) _(floor) _(round)
_(log2) _(fabs)
};
#undef _
#define _(X) [AVRTEST_##X - AVRTEST_EMUL_2args] = { X ## f, #X },
static const func2f_t func2f[] =
{
_(pow) _(atan2) _(hypot)
_(fmin) _(fmax) _(fmod)
};
#undef _
static void
emul_float_misc (uint8_t fid)
{
switch (fid)
{
default:
leave (LEAVE_USAGE, "unknown IEEE single misc function %u\n", fid);
case AVRTEST_ldexp:
{
float x = get_reg_float (22);
int y = (int16_t) get_reg_value (20, & layout[LOG_S16_CMD]);
float z = ldexpf (x, y);
const char *name = "ldexp";
log_add ("emulate %sf(" PRIF ", %d) = " PRIF "", name, x,x, y, z,z);
set_reg_float (22, z);
break;
}
case AVRTEST_u32to:
{
uint32_t u32 = (uint32_t) get_reg_value (22, & layout[LOG_U32_CMD]);
float z = (float) u32;
log_add ("utof(%u=0x%x) = " PRIF, (unsigned) u32, (unsigned) u32, z,z);
set_reg_float (22, z);
break;
}
case AVRTEST_s32to:
{
int32_t s32 = (int32_t) get_reg_value (22, & layout[LOG_S32_CMD]);
float z = (float) s32;
log_add ("stof(%d=0x%x) = " PRIF, (signed) s32, (signed) s32, z,z);
set_reg_float (22, z);
break;
}
case AVRTEST_cmp:
{
float x = get_reg_float (22);
float y = get_reg_float (18);
int8_t z = 0?0
: x < y ? -1
: x > y ? +1
: x == y ? 0
: -128;
log_add ("cmpf(" PRIF ", " PRIF ") = %d", x,x, y,y, (signed) z);
put_reg_value (24, 1, z);
break;
}
} // switch
}
static void
emul_float2 (uint8_t fid)
{
float x = get_reg_float (22);
float y = get_reg_float (18);
float z = 0;
const char *name = "???";
switch (fid)
{
case AVRTEST_mul: name = "mul"; z = x * y; break;
case AVRTEST_div: name = "div"; z = x / y; break;
case AVRTEST_add: name = "add"; z = x + y; break;
case AVRTEST_sub: name = "sub"; z = x - y; break;
case AVRTEST_ulp: name = "ulp";
{
avr_float_t ax = get_reg_avr_float (22);
avr_float_t ay = get_reg_avr_float (18);
z = get_fulp (& ax, & ay);
break;
}
default:
fid -= AVRTEST_EMUL_2args;
if (fid >= ARRAY_SIZE (func2f) || ! func2f[fid].fun)
leave (LEAVE_FATAL, "unexpected func2f %u", fid + AVRTEST_EMUL_2args);
z = func2f[fid].fun (x, y);
name = func2f[fid].name;
break;
}
log_add ("emulate %sf(" PRIF ", " PRIF ") = " PRIF "", name, x,x, y,y, z,z);
set_reg_float (22, z);
}
// Emulate IEEE single functions like avrtest_sinf and avrtest_mulf.
void sys_emul_float (uint8_t fid)
{
if (fid >= AVRTEST_EMUL_sentinel)
leave (LEAVE_USAGE, "unknown IEEE single emulate function %u\n", fid);
if (fid >= AVRTEST_EMUL_misc)
{
emul_float_misc (fid);
return;
}
if (fid >= AVRTEST_EMUL_2args)
{
emul_float2 (fid);
return;
}
if (fid >= ARRAY_SIZE (func1f) || ! func1f[fid].fun)
leave (LEAVE_FATAL, "unexpected func1 %u", fid);
float x = get_reg_float (22);
float z = func1f[fid].fun (x);
log_add ("emulate %sf(" PRIF ") = " PRIF "", func1f[fid].name, x,x, z,z);
set_reg_float (22, z);
}
static void
sys_misc_fxtof (uint8_t fid)
{
// avrtest.h requires <stdfix.h> in order to make sure that types
// like _Accum are available and can be used in syscall prototypes.
// The conditional makes sure that avrtest.h works with C++ for example.
if (fid == AVRTEST_MISC_nofxtof)
leave (LEAVE_USAGE, "include <stdfix.h> prior to \"avrtest.h\" before"
" using fixed-point to/from float conversions");
bool sign = 0;
int size = 0;
int fbit = 0;
bool fxtof = 0;
const char *name = "???";
switch (fid)
{
#define CASE_FX(id, s, sz, fb) \
case AVRTEST_MISC_##id##tof: \
sign = s; size = sz; fbit = fb; name = #id; fxtof = 1; \
break; \
case AVRTEST_MISC_fto##id: \
sign = s; size = sz; fbit = fb; name = #id; fxtof = 0; \
break
CASE_FX (r, 1, 2, 15);
CASE_FX (k, 1, 4, 15);
CASE_FX (hr, 1, 1, 7);
CASE_FX (hk, 1, 2, 7);
CASE_FX (ur, 0, 2, 16);
CASE_FX (uk, 0, 4, 16);
CASE_FX (uhr, 0, 1, 8);
CASE_FX (uhk, 0, 2, 8);
#undef CASE_FX
}
int regno = size <= 2 ? 24 : 22;
int ndigs = 3 + fbit / log2 (10);
if (fxtof)
{
byte *p = cpu_address (regno, AR_REG);
unsigned val = 0;
for (int n = size; n; )
val = (val << 8) | p[--n];
float f = val;
if (sign)
{
unsigned smask = 1u << (8 * size - 1);
if (val & smask)
{
val |= -smask;
f = (signed) val;
}
}
f = ldexpf (f, -fbit);
set_reg_float (22, f);
log_add (" %stof(0x%0*x) = %.*f", name, 2 * size, val, ndigs, f);
}
else
{
// float -> fixed
const float f = get_reg_float (22);
float v = ldexpf (f, fbit);
int64_t v64 = v < 0 ? v - 0.5f : v + 0.5f;
const int64_t mask = (1ull << (8 * size)) - 1;
const int64_t ma = mask >> sign;
const int64_t mi = sign ? -ma - 1 : 0;
if (v64 < mi) v64 = mi;
if (v64 > ma) v64 = ma;
unsigned val = v64 & mask;
put_reg_value (regno, size, v64);
log_add (" fto%s(%.*f) = 0x%0*x", name, ndigs, f, 2 * size, val);
}
}
#endif // NO_FEMUL
// Emulating IEEE double functions.
#if __SIZEOF_DOUBLE__ == 8
typedef double host_double_t;
# define HOST_DOUBLE
# define DOUBLE_MANT_DIG __DBL_MANT_DIG__
# define DOUBLE_MAX_EXP __DBL_MAX_EXP__
# define PRID "%e=%.13a"
#elif __SIZEOF_LONG_DOUBLE__ == 8
typedef long double host_double_t;
# define HOST_LONG_DOUBLE
# define DOUBLE_MANT_DIG __LDBL_MANT_DIG__
# define DOUBLE_MAX_EXP __LDBL_MAX_EXP__
# define PRID "%Le=%.13La"
#else
#define NO_DEMUL "host has no 64-bit IEEE double"
#endif
#if !defined NO_DEMUL && DOUBLE_MANT_DIG != 53
#define NO_DEMUL "host IEEE double mantissa != 53 bits"
#endif
#if !defined NO_DEMUL && DOUBLE_MAX_EXP != 1024
#define NO_DEMUL "host IEEE double max exponent != 1024"
#endif
#if !defined NO_DEMUL \
&& defined __FLOAT_WORD_ORDER__ \
&& defined __ORDER_LITTLE_ENDIAN__ \
&& __FLOAT_WORD_ORDER__ != __ORDER_LITTLE_ENDIAN__
#define NO_DEMUL "host IEEE double is not little endian"
#endif