Open
Description
Let's use this issue to track the state of any larger refactors we are planning to do.
This is also the place for discussing new ideas on a higher level. More specific discussions related to the individual refactors should be taken into the respective sub-tickets.
- Refactor use of features for conditional compilation
- Refactor the RCC module (WIP Make freeze() fallible #153)
- Discussed in Thoughts on clock config #157
- Evaluation of approaches Add support for HSE bypass and CSS #156
- Previous attempt Added new clocks approach #159
- GPIO
- Refactor the GPIO module (done in GPIO features #129)
- Input Pin Type consistency
- Refactor CAN (WIP Can refactor #178)
- Exiting work is done over embedded-can, bxcan and stm32f1xx-hal
- Refactor ADC (WIP Adc refactor #175, Adc instance #281)
- breaking changes are needed to extend the unfinished feature set.
At least make it robust of breaking changes and future proof - Get inspired by the stm32f4xx-hal adc implementation
- Allow more devices
- breaking changes are needed to extend the unfinished feature set.
- Refactor RTC (WIP Rtc refactor #174)
- Add RTC example to prove rtc is working. See Initialization of real time clock on stm32f3 Discovery board #87
- Refactor peripheral access
- Resolve Improve race free register access ergonomics #37
- Possible solution Improve race free register access ergonomics #37 (comment)
- Serial
- UART Flow Control Uart Flow Control #128
- Parity configuration Add support for configuring parity and stop bits for Serial #231
- Incorporate alt-stm32f30x-hal
Whenever we refactor anything, we should be aware of the current state of the art. That means looking at the other HALs under stm32-rs and understanding the design decisions and trade-offs they made. This should help us come up with designs that are future-proof and maintainable.