UefiCpuPkg: Fix a bug about MP init on LoongArch

If the AP wakes up out of order for the 1st time, and the data in the
HOB is also out of order, then there will be a issue: if the big number
core wakes up before the small number core, the bit number core will
modify the APIC number in the CpuMpData, whichi will cause the small
number core can not be wake up. Using the APIC number from the HOB to
wake up the APs can fix it.

Signed-off-by: Chao Li <lichao@loongson.cn>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dongyan Qian <qiandongyan@loongson.cn>
Cc: Xiangdong Meng <mengxiangdong@loongson.cn>

Author: kilaterlee

UefiCpuPkg/Library/MpInitLib/LoongArch64/MpLib.c

@@ -14,7 +14,8 @@
 
 #define INVALID_APIC_ID  0xFFFFFFFF
 
-EFI_GUID  mCpuInitMpLibHobGuid = CPU_INIT_MP_LIB_HOB_GUID;
+EFI_GUID                 mCpuInitMpLibHobGuid    = CPU_INIT_MP_LIB_HOB_GUID;
+PROCESSOR_RESOURCE_DATA  *mProcessorResourceData = NULL;
 
 /**
   Get the Application Processors state.
@@ -223,12 +224,6 @@ CollectProcessorCount (
   IN CPU_MP_DATA  *CpuMpData
   )
 {
-  PROCESSOR_RESOURCE_DATA  *ProcessorResourceData;
-  CPU_INFO_IN_HOB          *CpuInfoInHob;
-  UINTN                    Index;
-
-  ProcessorResourceData = NULL;
-
   //
   // Set the default loop mode for APs.
   //
@@ -240,16 +235,11 @@ CollectProcessorCount (
   // as the first broadcast method to wake up all APs, and all of APs will read NODE0
   // Core0 Mailbox0 in an infinit loop.
   //
-  ProcessorResourceData = GetProcessorResourceDataFromGuidedHob ();
+  mProcessorResourceData = GetProcessorResourceDataFromGuidedHob ();
 
-  if (ProcessorResourceData != NULL) {
+  if (mProcessorResourceData != NULL) {
     CpuMpData->ApLoopMode = ApInHltLoop;
-    CpuMpData->CpuCount   = ProcessorResourceData->NumberOfProcessor;
-    CpuInfoInHob          = (CPU_INFO_IN_HOB *)(UINTN)(CpuMpData->CpuInfoInHob);
-
-    for (Index = 0; Index < CpuMpData->CpuCount; Index++) {
-      CpuInfoInHob[Index].ApicId = ProcessorResourceData->ApicId[Index];
-    }
+    CpuMpData->CpuCount   = mProcessorResourceData->NumberOfProcessor;
   }
 
   //
@@ -380,15 +370,15 @@ ApWakeupFunction (
     //
     InterlockedIncrement ((UINT32 *)&CpuMpData->FinishedCount);
 
-    while (TRUE) {
-      //
-      // Clean per-core mail box registers.
-      //
-      IoCsrWrite64 (LOONGARCH_IOCSR_MBUF0, 0x0);
-      IoCsrWrite64 (LOONGARCH_IOCSR_MBUF1, 0x0);
-      IoCsrWrite64 (LOONGARCH_IOCSR_MBUF2, 0x0);
-      IoCsrWrite64 (LOONGARCH_IOCSR_MBUF3, 0x0);
+    //
+    // Clean per-core mail box registers.
+    //
+    IoCsrWrite64 (LOONGARCH_IOCSR_MBUF0, 0x0);
+    IoCsrWrite64 (LOONGARCH_IOCSR_MBUF1, 0x0);
+    IoCsrWrite64 (LOONGARCH_IOCSR_MBUF2, 0x0);
+    IoCsrWrite64 (LOONGARCH_IOCSR_MBUF3, 0x0);
 
+    while (TRUE) {
       //
       // Enable IPI interrupt and global interrupt
       //
@@ -699,34 +689,34 @@ WakeUpAP (
     DEBUG ((DEBUG_INFO, "%a: func 0x%llx, ExchangeInfo 0x%llx\n", __func__, ApWakeupFunction, (UINTN)ExchangeInfo));
     if (CpuMpData->ApLoopMode == ApInHltLoop) {
       for (Index = 0; Index < CpuMpData->CpuCount; Index++) {
-        if (Index != CpuMpData->BspNumber) {
+        if (mProcessorResourceData->ApicId[Index] != CpuMpData->BspNumber) {
           IoCsrWrite64 (
             LOONGARCH_IOCSR_MBUF_SEND,
             (IOCSR_MBUF_SEND_BLOCKING |
              (IOCSR_MBUF_SEND_BOX_HI (0x3) << IOCSR_MBUF_SEND_BOX_SHIFT) |
-             (CpuInfoInHob[Index].ApicId << IOCSR_MBUF_SEND_CPU_SHIFT) |
+             (mProcessorResourceData->ApicId[Index] << IOCSR_MBUF_SEND_CPU_SHIFT) |
              ((UINTN)(ExchangeInfo) & IOCSR_MBUF_SEND_H32_MASK))
             );
           IoCsrWrite64 (
             LOONGARCH_IOCSR_MBUF_SEND,
             (IOCSR_MBUF_SEND_BLOCKING |
              (IOCSR_MBUF_SEND_BOX_LO (0x3) << IOCSR_MBUF_SEND_BOX_SHIFT) |
-             (CpuInfoInHob[Index].ApicId << IOCSR_MBUF_SEND_CPU_SHIFT) |
+             (mProcessorResourceData->ApicId[Index] << IOCSR_MBUF_SEND_CPU_SHIFT) |
              ((UINTN)ExchangeInfo) << IOCSR_MBUF_SEND_BUF_SHIFT)
             );
 
           IoCsrWrite64 (
             LOONGARCH_IOCSR_MBUF_SEND,
             (IOCSR_MBUF_SEND_BLOCKING |
              (IOCSR_MBUF_SEND_BOX_HI (0x0) << IOCSR_MBUF_SEND_BOX_SHIFT) |
-             (CpuInfoInHob[Index].ApicId << IOCSR_MBUF_SEND_CPU_SHIFT) |
+             (mProcessorResourceData->ApicId[Index] << IOCSR_MBUF_SEND_CPU_SHIFT) |
              ((UINTN)(ApWakeupFunction) & IOCSR_MBUF_SEND_H32_MASK))
             );
           IoCsrWrite64 (
             LOONGARCH_IOCSR_MBUF_SEND,
             (IOCSR_MBUF_SEND_BLOCKING |
              (IOCSR_MBUF_SEND_BOX_LO (0x0) << IOCSR_MBUF_SEND_BOX_SHIFT) |
-             (CpuInfoInHob[Index].ApicId << IOCSR_MBUF_SEND_CPU_SHIFT) |
+             (mProcessorResourceData->ApicId[Index] << IOCSR_MBUF_SEND_CPU_SHIFT) |
              ((UINTN)ApWakeupFunction) << IOCSR_MBUF_SEND_BUF_SHIFT)
             );
 
@@ -736,7 +726,7 @@ WakeUpAP (
           IoCsrWrite64 (
             LOONGARCH_IOCSR_IPI_SEND,
             (IOCSR_MBUF_SEND_BLOCKING |
-             (CpuInfoInHob[Index].ApicId << IOCSR_MBUF_SEND_CPU_SHIFT) |
+             (mProcessorResourceData->ApicId[Index] << IOCSR_MBUF_SEND_CPU_SHIFT) |
              0x2 // Bit 2
             )
             );
@@ -1360,7 +1350,7 @@ MpInitLibInitialize (
   //
   // Set BSP basic information
   //
-  InitializeApData (CpuMpData, 0, 0);
+  InitializeApData (CpuMpData, CpuMpData->BspNumber, 0);
 
   //
   // Set up APs wakeup signal buffer and initialization APs ApicId status.