Here we are implementing Risc-V single cycle microprocessor on Basys3 (Artix-7) .We are testing with Fibonaccie Series and showing on 7 segment display..
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Updated
Dec 7, 2022 - Tcl
Here we are implementing Risc-V single cycle microprocessor on Basys3 (Artix-7) .We are testing with Fibonaccie Series and showing on 7 segment display..
Magellan - A HW monitor/debugger for Basys 3
2110363 Hardware Synthesis Lab I (2022/1) - Term Project
Design and implementation of an electronic game using Verilog and the Basys3 Field Programmable Gate Array (FPGA) kit.
Basys 3 simple LED blinking program (on Hardware)
Asignatura optativa de la FDI - UCM sobre el diseño de circuitos de tamaño medio usando herramientas de descripcion de hardware automáticas (VHDL, Verilog sobre Vivado)
These are all implemented using Verilog for my Logic Design Laboratory Class (邏輯設計實驗), and I am using a Basys3 FPGA Board.
Implementation of a MIPS processor on a Xilinx Artix-7 FPGA.
Simple Nano Processor | Group Project for CS1050-Computer Organization & Digital Design | Semester 02
EE2026 Final Project. Use of a Basys 3 board, OLED screen & audio mod to develop an audiovisual game.
This Repository contains source files for a 4-bit nanoprocessor designed in VHDL using Xilinx Vivado
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