Skip to content

rtos/zephyr: riscv32 thread awareness support #69

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 3 commits into
base: zephyr-20220611
Choose a base branch
from

Conversation

alpsayin
Copy link

@alpsayin alpsayin commented Mar 3, 2025

Tested on a SiFive-FE310G variant with zephyr-sdk 0.16's riscv32-zephyr-gdb

@alpsayin alpsayin force-pushed the zephyr-20220611-riscv32 branch from 457ad09 to ffc6276 Compare March 3, 2025 15:08
alpsayin added 3 commits March 3, 2025 15:08
Tested on a SiFive-FE310G variant with zephyr-sdk 0.16's riscv32-zephyr-gdb

Signed-off-by: Alp Sayin <alpsayin@gmail.com>
Debug logs left here make it easier to trace openocd/zephyr's unwrapping
of the riscv stacks. And could be used for extending support for riscv64.

Signed-off-by: Alp Sayin <alpsayin@gmail.com>
Makes more sense to print thread IDs as hex since they're not just IDs,
they're thread structs' addresses.

Signed-off-by: Alp Sayin <alpsayin@gmail.com>
@alpsayin alpsayin force-pushed the zephyr-20220611-riscv32 branch from ffc6276 to 30ba6b3 Compare March 3, 2025 15:08
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

1 participant